Lines Matching refs:max_register
170 if (config->max_register == 0) { in gen_regmap()
171 config->max_register = param->from_reg; in gen_regmap()
173 config->max_register += (config->num_reg_defaults - 1) * in gen_regmap()
176 config->max_register += (BLOCK_TEST_SIZE * config->reg_stride); in gen_regmap()
179 size = array_size(config->max_register + 1, sizeof(*buf)); in gen_regmap()
710 config.max_register = BLOCK_TEST_SIZE; in stride()
782 config.max_register = test_range.range_max; in basic_ranges()
848 config.max_register = 300; in stress_insert()
855 buf_sz = array_size(sizeof(*vals), config.max_register); in stress_insert()
862 for (i = 0; i < config.max_register; i += 100) in stress_insert()
864 for (i = 0; i < config.max_register; i += 50) in stress_insert()
866 for (i = 0; i < config.max_register; i += 25) in stress_insert()
868 for (i = 0; i < config.max_register; i += 10) in stress_insert()
870 for (i = 0; i < config.max_register; i += 5) in stress_insert()
872 for (i = 0; i < config.max_register; i += 3) in stress_insert()
874 for (i = 0; i < config.max_register; i += 2) in stress_insert()
876 for (i = 0; i < config.max_register; i++) in stress_insert()
880 for (i = 0; i < config.max_register; i ++) { in stress_insert()
1252 config.max_register = param->from_reg + (num_ranges * BLOCK_TEST_SIZE); in cache_drop_with_non_contiguous_ranges()
1259 for (i = 0; i < config.max_register + 1; i++) in cache_drop_with_non_contiguous_ranges()
1290 for (i = 0; i < config.max_register + 1; i++) { in cache_drop_with_non_contiguous_ranges()
1369 KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, 0, config.max_register)); in cache_drop_all_and_sync_marked_dirty()
1377 for (i = 0; i <= config.max_register; i++) in cache_drop_all_and_sync_marked_dirty()
1409 KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, 0, config.max_register)); in cache_drop_all_and_sync_no_defaults()
1419 for (i = 0; i <= config.max_register; i++) in cache_drop_all_and_sync_no_defaults()
1452 KUNIT_EXPECT_EQ(test, 0, regcache_drop_region(map, 0, config.max_register)); in cache_drop_all_and_sync_has_defaults()
1462 for (i = 0; i <= config.max_register; i++) in cache_drop_all_and_sync_has_defaults()
1515 config.max_register = test_range.range_max; in cache_range_window_reg()
1578 .max_register = BLOCK_TEST_SIZE,
1602 size = array_size(config->max_register + 1, BITS_TO_BYTES(config->reg_bits)); in gen_raw_regmap()
1614 config->num_reg_defaults = config->max_register + 1; in gen_raw_regmap()
1679 for (i = 0; i < config.max_register + 1; i++) { in raw_read_defaults_single()
1702 val_len = array_size(sizeof(*rval), config.max_register + 1); in raw_read_defaults()
1710 for (i = 0; i < config.max_register + 1; i++) { in raw_read_defaults()
1768 for (i = 0; i < config.max_register + 1; i++) { in raw_write()
1877 for (i = 0; i < config.max_register + 1; i++) { in raw_sync()
1912 for (i = 0; i < config.max_register + 1; i++) in raw_sync()
1936 config.max_register = test_range.range_max; in raw_ranges()