Lines Matching refs:amdgpu_device
124 struct amdgpu_device *adev;
318 struct amdgpu_device;
364 void amdgpu_device_ip_get_clockgating_state(struct amdgpu_device *adev,
366 int amdgpu_device_ip_wait_for_idle(struct amdgpu_device *adev,
368 bool amdgpu_device_ip_is_idle(struct amdgpu_device *adev,
394 int amdgpu_device_ip_block_version_cmp(struct amdgpu_device *adev,
399 amdgpu_device_ip_get_ip_block(struct amdgpu_device *adev,
402 int amdgpu_device_ip_block_add(struct amdgpu_device *adev,
408 bool amdgpu_get_bios(struct amdgpu_device *adev);
409 bool amdgpu_read_bios(struct amdgpu_device *adev);
410 bool amdgpu_soc15_read_bios_from_rom(struct amdgpu_device *adev,
472 struct amdgpu_device *adev;
517 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
518 void amdgpu_device_wb_free(struct amdgpu_device *adev, u32 wb);
523 int amdgpu_benchmark(struct amdgpu_device *adev, int test_number);
592 bool (*read_disabled_bios)(struct amdgpu_device *adev);
593 bool (*read_bios_from_rom)(struct amdgpu_device *adev,
595 int (*read_register)(struct amdgpu_device *adev, u32 se_num,
597 void (*set_vga_state)(struct amdgpu_device *adev, bool state);
598 int (*reset)(struct amdgpu_device *adev);
599 enum amd_reset_method (*reset_method)(struct amdgpu_device *adev);
601 u32 (*get_xclk)(struct amdgpu_device *adev);
603 int (*set_uvd_clocks)(struct amdgpu_device *adev, u32 vclk, u32 dclk);
604 int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
606 int (*get_pcie_lanes)(struct amdgpu_device *adev);
607 void (*set_pcie_lanes)(struct amdgpu_device *adev, int lanes);
609 u32 (*get_config_memsize)(struct amdgpu_device *adev);
611 void (*flush_hdp)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
613 void (*invalidate_hdp)(struct amdgpu_device *adev,
616 bool (*need_full_reset)(struct amdgpu_device *adev);
618 void (*init_doorbell_index)(struct amdgpu_device *adev);
620 void (*get_pcie_usage)(struct amdgpu_device *adev, uint64_t *count0,
623 bool (*need_reset_on_init)(struct amdgpu_device *adev);
625 uint64_t (*get_pcie_replay_count)(struct amdgpu_device *adev);
627 int (*supports_baco)(struct amdgpu_device *adev);
629 void (*pre_asic_init)(struct amdgpu_device *adev);
631 int (*update_umd_stable_pstate)(struct amdgpu_device *adev, bool enter);
633 int (*query_video_codecs)(struct amdgpu_device *adev, bool encode,
638 ssize_t (*get_reg_state)(struct amdgpu_device *adev,
666 struct cgs_device *amdgpu_cgs_create_device(struct amdgpu_device *adev);
672 typedef uint32_t (*amdgpu_rreg_t)(struct amdgpu_device*, uint32_t);
673 typedef void (*amdgpu_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
675 typedef uint32_t (*amdgpu_rreg_ext_t)(struct amdgpu_device*, uint64_t);
676 typedef void (*amdgpu_wreg_ext_t)(struct amdgpu_device*, uint64_t, uint32_t);
678 typedef uint64_t (*amdgpu_rreg64_t)(struct amdgpu_device*, uint32_t);
679 typedef void (*amdgpu_wreg64_t)(struct amdgpu_device*, uint32_t, uint64_t);
681 typedef uint64_t (*amdgpu_rreg64_ext_t)(struct amdgpu_device*, uint64_t);
682 typedef void (*amdgpu_wreg64_ext_t)(struct amdgpu_device*, uint64_t, uint64_t);
684 typedef uint32_t (*amdgpu_block_rreg_t)(struct amdgpu_device*, uint32_t, uint32_t);
685 typedef void (*amdgpu_block_wreg_t)(struct amdgpu_device*, uint32_t, uint32_t, uint32_t);
749 int8_t (*logical_to_dev_inst)(struct amdgpu_device *adev,
752 uint32_t (*logical_to_dev_mask)(struct amdgpu_device *adev,
820 int (*init_mqd)(struct amdgpu_device *adev, void *mqd,
834 struct amdgpu_device { struct
1171 static inline uint32_t amdgpu_ip_version(const struct amdgpu_device *adev, in amdgpu_ip_version() argument
1180 static inline uint32_t amdgpu_ip_version_full(const struct amdgpu_device *adev, in amdgpu_ip_version_full()
1187 static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) in drm_to_adev()
1189 return container_of(ddev, struct amdgpu_device, ddev); in drm_to_adev()
1192 static inline struct drm_device *adev_to_drm(struct amdgpu_device *adev) in adev_to_drm()
1197 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_device *bdev) in amdgpu_ttm_adev()
1199 return container_of(bdev, struct amdgpu_device, mman.bdev); in amdgpu_ttm_adev()
1202 int amdgpu_device_init(struct amdgpu_device *adev,
1204 void amdgpu_device_fini_hw(struct amdgpu_device *adev);
1205 void amdgpu_device_fini_sw(struct amdgpu_device *adev);
1207 int amdgpu_gpu_wait_for_idle(struct amdgpu_device *adev);
1209 void amdgpu_device_mm_access(struct amdgpu_device *adev, loff_t pos,
1211 size_t amdgpu_device_aper_access(struct amdgpu_device *adev, loff_t pos,
1214 void amdgpu_device_vram_access(struct amdgpu_device *adev, loff_t pos,
1216 uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev,
1219 uint32_t amdgpu_device_rreg(struct amdgpu_device *adev,
1221 u32 amdgpu_device_indirect_rreg_ext(struct amdgpu_device *adev,
1223 uint32_t amdgpu_device_xcc_rreg(struct amdgpu_device *adev,
1226 void amdgpu_device_wreg(struct amdgpu_device *adev,
1229 void amdgpu_device_indirect_wreg_ext(struct amdgpu_device *adev,
1231 void amdgpu_device_xcc_wreg(struct amdgpu_device *adev,
1235 void amdgpu_mm_wreg_mmio_rlc(struct amdgpu_device *adev,
1237 void amdgpu_mm_wreg8(struct amdgpu_device *adev, uint32_t offset, uint8_t value);
1238 uint8_t amdgpu_mm_rreg8(struct amdgpu_device *adev, uint32_t offset);
1240 u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev,
1242 u64 amdgpu_device_indirect_rreg64(struct amdgpu_device *adev,
1244 u64 amdgpu_device_indirect_rreg64_ext(struct amdgpu_device *adev,
1246 void amdgpu_device_indirect_wreg(struct amdgpu_device *adev,
1248 void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
1250 void amdgpu_device_indirect_wreg64_ext(struct amdgpu_device *adev,
1252 u32 amdgpu_device_get_rev_id(struct amdgpu_device *adev);
1254 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
1256 void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev);
1258 int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
1264 int emu_soc_asic_init(struct amdgpu_device *adev);
1402 bool amdgpu_device_has_job_running(struct amdgpu_device *adev);
1403 bool amdgpu_device_should_recover_gpu(struct amdgpu_device *adev);
1404 int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
1407 void amdgpu_device_pci_config_reset(struct amdgpu_device *adev);
1408 int amdgpu_device_pci_reset(struct amdgpu_device *adev);
1409 bool amdgpu_device_need_post(struct amdgpu_device *adev);
1410 bool amdgpu_device_seamless_boot_supported(struct amdgpu_device *adev);
1411 bool amdgpu_device_should_use_aspm(struct amdgpu_device *adev);
1413 void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes,
1415 int amdgpu_device_resize_fb_bar(struct amdgpu_device *adev);
1416 void amdgpu_device_program_register_sequence(struct amdgpu_device *adev,
1420 int amdgpu_device_mode1_reset(struct amdgpu_device *adev);
1426 void amdgpu_device_detect_runtime_pm_mode(struct amdgpu_device *adev);
1427 bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
1428 struct amdgpu_device *peer_adev);
1432 void amdgpu_device_flush_hdp(struct amdgpu_device *adev,
1434 void amdgpu_device_invalidate_hdp(struct amdgpu_device *adev,
1437 void amdgpu_device_halt(struct amdgpu_device *adev);
1438 u32 amdgpu_device_pcie_port_rreg(struct amdgpu_device *adev,
1440 void amdgpu_device_pcie_port_wreg(struct amdgpu_device *adev,
1442 struct dma_fence *amdgpu_device_get_gang(struct amdgpu_device *adev);
1443 struct dma_fence *amdgpu_device_switch_gang(struct amdgpu_device *adev,
1445 bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev);
1476 int amdgpu_driver_load_kms(struct amdgpu_device *adev, unsigned long flags);
1483 int amdgpu_device_ip_suspend(struct amdgpu_device *adev);
1527 int amdgpu_acpi_init(struct amdgpu_device *adev);
1528 void amdgpu_acpi_fini(struct amdgpu_device *adev);
1529 bool amdgpu_acpi_is_pcie_performance_request_supported(struct amdgpu_device *adev);
1531 int amdgpu_acpi_pcie_performance_request(struct amdgpu_device *adev,
1533 int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev,
1536 int amdgpu_acpi_pcie_notify_device_ready(struct amdgpu_device *adev);
1537 int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev, u64 *tmr_offset,
1539 int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, int xcc_id,
1543 bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev);
1547 static inline int amdgpu_acpi_init(struct amdgpu_device *adev) { return 0; } in amdgpu_acpi_init()
1548 static inline int amdgpu_acpi_get_tmr_info(struct amdgpu_device *adev, in amdgpu_acpi_get_tmr_info()
1553 static inline int amdgpu_acpi_get_mem_info(struct amdgpu_device *adev, in amdgpu_acpi_get_mem_info()
1559 static inline void amdgpu_acpi_fini(struct amdgpu_device *adev) { } in amdgpu_acpi_fini()
1560 static inline bool amdgpu_acpi_should_gpu_reset(struct amdgpu_device *adev) { return false; } in amdgpu_acpi_should_gpu_reset()
1564 static inline int amdgpu_acpi_power_shift_control(struct amdgpu_device *adev, in amdgpu_acpi_power_shift_control()
1572 bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev);
1573 bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev);
1574 void amdgpu_choose_low_power_state(struct amdgpu_device *adev);
1576 static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { return false; } in amdgpu_acpi_is_s0ix_active()
1577 static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; } in amdgpu_acpi_is_s3_active()
1578 static inline void amdgpu_choose_low_power_state(struct amdgpu_device *adev) { } in amdgpu_choose_low_power_state()
1581 void amdgpu_register_gpu_instance(struct amdgpu_device *adev);
1582 void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev);
1593 bool amdgpu_device_skip_hw_access(struct amdgpu_device *adev);
1595 int amdgpu_device_set_cg_state(struct amdgpu_device *adev,
1597 int amdgpu_device_set_pg_state(struct amdgpu_device *adev,
1600 static inline bool amdgpu_device_has_timeouts_enabled(struct amdgpu_device *adev) in amdgpu_device_has_timeouts_enabled()
1611 static inline bool amdgpu_is_tmz(struct amdgpu_device *adev) in amdgpu_is_tmz()
1616 int amdgpu_in_reset(struct amdgpu_device *adev);