Lines Matching refs:gfx
51 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
52 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
53 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
62 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_queue_mask_bit_to_mec_queue()
63 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
64 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
65 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
66 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
74 adev->gfx.mec_bitmap[xcc_id].queue_bitmap); in amdgpu_gfx_is_mec_queue_enabled()
82 bit += me * adev->gfx.me.num_pipe_per_me in amdgpu_gfx_me_queue_to_bit()
83 * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()
84 bit += pipe * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()
93 *queue = bit % adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_bit_to_me_queue()
94 *pipe = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()
95 % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_bit_to_me_queue()
96 *me = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()
97 / adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_bit_to_me_queue()
104 adev->gfx.me.queue_bitmap); in amdgpu_gfx_is_me_queue_enabled()
154 return amdgpu_async_gfx_ring && adev->gfx.me.num_pipe_per_me > 1; in amdgpu_gfx_is_graphics_multipipe_capable()
173 return adev->gfx.mec.num_mec > 1; in amdgpu_gfx_is_compute_multipipe_capable()
186 adev->gfx.num_gfx_rings > 1 && pipe == 1 && queue == 0) { in amdgpu_gfx_is_high_priority_graphics_queue()
191 if (ring == &adev->gfx.gfx_ring[bit]) in amdgpu_gfx_is_high_priority_graphics_queue()
204 if (adev->gfx.num_compute_rings > 1 && in amdgpu_gfx_is_high_priority_compute_queue()
205 ring == &adev->gfx.compute_ring[0]) in amdgpu_gfx_is_high_priority_compute_queue()
215 int max_queues_per_mec = min(adev->gfx.mec.num_pipe_per_mec * in amdgpu_gfx_compute_queue_acquire()
216 adev->gfx.mec.num_queue_per_pipe, in amdgpu_gfx_compute_queue_acquire()
217 adev->gfx.num_compute_rings); in amdgpu_gfx_compute_queue_acquire()
218 int num_xcc = adev->gfx.xcc_mask ? NUM_XCC(adev->gfx.xcc_mask) : 1; in amdgpu_gfx_compute_queue_acquire()
225 pipe = i % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
226 queue = (i / adev->gfx.mec.num_pipe_per_mec) % in amdgpu_gfx_compute_queue_acquire()
227 adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_compute_queue_acquire()
229 set_bit(pipe * adev->gfx.mec.num_queue_per_pipe + queue, in amdgpu_gfx_compute_queue_acquire()
230 adev->gfx.mec_bitmap[j].queue_bitmap); in amdgpu_gfx_compute_queue_acquire()
237 set_bit(i, adev->gfx.mec_bitmap[j].queue_bitmap); in amdgpu_gfx_compute_queue_acquire()
243 bitmap_weight(adev->gfx.mec_bitmap[j].queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES)); in amdgpu_gfx_compute_queue_acquire()
251 int max_queues_per_me = adev->gfx.me.num_pipe_per_me * in amdgpu_gfx_graphics_queue_acquire()
252 adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_graphics_queue_acquire()
258 pipe = i % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_graphics_queue_acquire()
259 queue = (i / adev->gfx.me.num_pipe_per_me) % in amdgpu_gfx_graphics_queue_acquire()
260 adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_graphics_queue_acquire()
262 set_bit(pipe * adev->gfx.me.num_queue_per_pipe + queue, in amdgpu_gfx_graphics_queue_acquire()
263 adev->gfx.me.queue_bitmap); in amdgpu_gfx_graphics_queue_acquire()
267 set_bit(i, adev->gfx.me.queue_bitmap); in amdgpu_gfx_graphics_queue_acquire()
271 adev->gfx.num_gfx_rings = in amdgpu_gfx_graphics_queue_acquire()
272 bitmap_weight(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES); in amdgpu_gfx_graphics_queue_acquire()
281 queue_bit = adev->gfx.mec.num_mec in amdgpu_gfx_kiq_acquire()
282 * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_kiq_acquire()
283 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_kiq_acquire()
286 if (test_bit(queue_bit, adev->gfx.mec_bitmap[xcc_id].queue_bitmap)) in amdgpu_gfx_kiq_acquire()
312 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init_ring()
353 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_fini()
363 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init()
389 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mqd_sw_init()
428 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_mqd_sw_init()
429 ring = &adev->gfx.gfx_ring[i]; in amdgpu_gfx_mqd_sw_init()
441 adev->gfx.me.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
442 if (!adev->gfx.me.mqd_backup[i]) { in amdgpu_gfx_mqd_sw_init()
451 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_init()
452 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_mqd_sw_init()
453 ring = &adev->gfx.compute_ring[j]; in amdgpu_gfx_mqd_sw_init()
465 adev->gfx.mec.mqd_backup[j] = kmalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
466 if (!adev->gfx.mec.mqd_backup[j]) { in amdgpu_gfx_mqd_sw_init()
480 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mqd_sw_fini()
483 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_mqd_sw_fini()
484 ring = &adev->gfx.gfx_ring[i]; in amdgpu_gfx_mqd_sw_fini()
485 kfree(adev->gfx.me.mqd_backup[i]); in amdgpu_gfx_mqd_sw_fini()
492 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_fini()
493 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_mqd_sw_fini()
494 ring = &adev->gfx.compute_ring[j]; in amdgpu_gfx_mqd_sw_fini()
495 kfree(adev->gfx.mec.mqd_backup[j]); in amdgpu_gfx_mqd_sw_fini()
510 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_disable_kcq()
516 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_disable_kcq()
517 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_disable_kcq()
519 &adev->gfx.compute_ring[j], in amdgpu_gfx_disable_kcq()
530 adev->gfx.num_compute_rings)) { in amdgpu_gfx_disable_kcq()
535 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_disable_kcq()
536 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_disable_kcq()
538 &adev->gfx.compute_ring[j], in amdgpu_gfx_disable_kcq()
562 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_disable_kgq()
569 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_disable_kgq()
570 j = i + xcc_id * adev->gfx.num_gfx_rings; in amdgpu_gfx_disable_kgq()
572 &adev->gfx.gfx_ring[j], in amdgpu_gfx_disable_kgq()
585 adev->gfx.num_gfx_rings)) { in amdgpu_gfx_disable_kgq()
590 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_disable_kgq()
591 j = i + xcc_id * adev->gfx.num_gfx_rings; in amdgpu_gfx_disable_kgq()
593 &adev->gfx.gfx_ring[j], in amdgpu_gfx_disable_kgq()
598 if (adev->gfx.kiq[0].ring.sched.ready && !adev->job_hang) in amdgpu_gfx_disable_kgq()
620 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mes_enable_kcq()
643 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mes_enable_kcq()
644 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_mes_enable_kcq()
646 &adev->gfx.compute_ring[j]); in amdgpu_gfx_mes_enable_kcq()
658 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_enable_kcq()
670 if (!test_bit(i, adev->gfx.mec_bitmap[xcc_id].queue_bitmap)) in amdgpu_gfx_enable_kcq()
691 adev->gfx.num_compute_rings + in amdgpu_gfx_enable_kcq()
700 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_enable_kcq()
701 j = i + xcc_id * adev->gfx.num_compute_rings; in amdgpu_gfx_enable_kcq()
703 &adev->gfx.compute_ring[j]); in amdgpu_gfx_enable_kcq()
716 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_enable_kgq()
726 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_enable_kgq()
727 j = i + xcc_id * adev->gfx.num_gfx_rings; in amdgpu_gfx_enable_kgq()
729 &adev->gfx.gfx_ring[j]); in amdgpu_gfx_enable_kgq()
743 adev->gfx.num_gfx_rings); in amdgpu_gfx_enable_kgq()
750 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_enable_kgq()
751 j = i + xcc_id * adev->gfx.num_gfx_rings; in amdgpu_gfx_enable_kgq()
753 &adev->gfx.gfx_ring[j]); in amdgpu_gfx_enable_kgq()
783 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_gfx_off_ctrl()
790 if (WARN_ON_ONCE(adev->gfx.gfx_off_req_count == 0)) in amdgpu_gfx_off_ctrl()
793 adev->gfx.gfx_off_req_count--; in amdgpu_gfx_off_ctrl()
795 if (adev->gfx.gfx_off_req_count == 0 && in amdgpu_gfx_off_ctrl()
796 !adev->gfx.gfx_off_state) { in amdgpu_gfx_off_ctrl()
801 adev->gfx.gfx_off_state = true; in amdgpu_gfx_off_ctrl()
803 schedule_delayed_work(&adev->gfx.gfx_off_delay_work, in amdgpu_gfx_off_ctrl()
808 if (adev->gfx.gfx_off_req_count == 0) { in amdgpu_gfx_off_ctrl()
809 cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work); in amdgpu_gfx_off_ctrl()
811 if (adev->gfx.gfx_off_state && in amdgpu_gfx_off_ctrl()
813 adev->gfx.gfx_off_state = false; in amdgpu_gfx_off_ctrl()
815 if (adev->gfx.funcs->init_spm_golden) { in amdgpu_gfx_off_ctrl()
823 adev->gfx.gfx_off_req_count++; in amdgpu_gfx_off_ctrl()
827 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_gfx_off_ctrl()
834 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_set_gfx_off_residency()
838 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_set_gfx_off_residency()
847 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_residency()
851 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_residency()
860 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_entrycount()
864 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_entrycount()
874 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_status()
878 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_status()
898 if (adev->gfx.cp_ecc_error_irq.funcs) { in amdgpu_gfx_ras_late_init()
899 r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); in amdgpu_gfx_ras_late_init()
921 if (!adev->gfx.ras) in amdgpu_gfx_ras_sw_init()
924 ras = adev->gfx.ras; in amdgpu_gfx_ras_sw_init()
935 adev->gfx.ras_if = &ras->ras_block.ras_comm; in amdgpu_gfx_ras_sw_init()
951 if (adev->gfx.ras && adev->gfx.ras->poison_consumption_handler) in amdgpu_gfx_poison_consumption_handler()
952 return adev->gfx.ras->poison_consumption_handler(adev, entry); in amdgpu_gfx_poison_consumption_handler()
969 if (adev->gfx.ras && adev->gfx.ras->ras_block.hw_ops && in amdgpu_gfx_process_ras_data_cb()
970 adev->gfx.ras->ras_block.hw_ops->query_ras_error_count) in amdgpu_gfx_process_ras_data_cb()
971 adev->gfx.ras->ras_block.hw_ops->query_ras_error_count(adev, err_data); in amdgpu_gfx_process_ras_data_cb()
981 struct ras_common_if *ras_if = adev->gfx.ras_if; in amdgpu_gfx_cp_ecc_error_irq()
1002 int num_xcc = adev->gfx.xcc_mask ? NUM_XCC(adev->gfx.xcc_mask) : 1; in amdgpu_gfx_ras_error_func()
1020 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_kiq_rreg()
1091 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_kiq_wreg()
1173 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
1174 adev->gfx.pfp_fw_version = in amdgpu_gfx_cp_init_microcode()
1176 adev->gfx.pfp_feature_version = in amdgpu_gfx_cp_init_microcode()
1178 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
1183 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
1184 adev->gfx.pfp_fw_version = in amdgpu_gfx_cp_init_microcode()
1186 adev->gfx.pfp_feature_version = in amdgpu_gfx_cp_init_microcode()
1188 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
1194 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
1195 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
1200 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
1201 adev->gfx.me_fw_version = in amdgpu_gfx_cp_init_microcode()
1203 adev->gfx.me_feature_version = in amdgpu_gfx_cp_init_microcode()
1205 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
1210 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
1211 adev->gfx.me_fw_version = in amdgpu_gfx_cp_init_microcode()
1213 adev->gfx.me_feature_version = in amdgpu_gfx_cp_init_microcode()
1215 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
1221 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
1222 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
1227 adev->gfx.ce_fw->data; in amdgpu_gfx_cp_init_microcode()
1228 adev->gfx.ce_fw_version = in amdgpu_gfx_cp_init_microcode()
1230 adev->gfx.ce_feature_version = in amdgpu_gfx_cp_init_microcode()
1232 ucode_fw = adev->gfx.ce_fw; in amdgpu_gfx_cp_init_microcode()
1237 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1238 adev->gfx.mec_fw_version = in amdgpu_gfx_cp_init_microcode()
1240 adev->gfx.mec_feature_version = in amdgpu_gfx_cp_init_microcode()
1242 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1248 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1249 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1254 adev->gfx.mec2_fw->data; in amdgpu_gfx_cp_init_microcode()
1255 adev->gfx.mec2_fw_version = in amdgpu_gfx_cp_init_microcode()
1257 adev->gfx.mec2_feature_version = in amdgpu_gfx_cp_init_microcode()
1259 ucode_fw = adev->gfx.mec2_fw; in amdgpu_gfx_cp_init_microcode()
1265 adev->gfx.mec2_fw->data; in amdgpu_gfx_cp_init_microcode()
1266 ucode_fw = adev->gfx.mec2_fw; in amdgpu_gfx_cp_init_microcode()
1271 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1272 adev->gfx.mec_fw_version = in amdgpu_gfx_cp_init_microcode()
1274 adev->gfx.mec_feature_version = in amdgpu_gfx_cp_init_microcode()
1276 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1284 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1285 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1303 return !(xcc_id % (adev->gfx.num_xcc_per_xcp ? in amdgpu_gfx_is_master_xcc()
1304 adev->gfx.num_xcc_per_xcp : 1)); in amdgpu_gfx_is_master_xcc()
1330 num_xcc = NUM_XCC(adev->gfx.xcc_mask); in amdgpu_gfx_set_compute_partition()
1375 switch (NUM_XCC(adev->gfx.xcc_mask)) { in amdgpu_gfx_get_available_compute_partition()
1446 int num_xcc = NUM_XCC(adev->gfx.xcc_mask); in amdgpu_gfx_run_cleaner_shader()
1451 if (adev->gfx.num_xcc_per_xcp) in amdgpu_gfx_run_cleaner_shader()
1452 num_xcc_to_clear = adev->gfx.num_xcc_per_xcp; in amdgpu_gfx_run_cleaner_shader()
1457 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_run_cleaner_shader()
1458 ring = &adev->gfx.compute_ring[i + xcc_id * adev->gfx.num_compute_rings]; in amdgpu_gfx_run_cleaner_shader()
1658 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_cleaner_shader_sw_init()
1663 &adev->gfx.cleaner_shader_obj, in amdgpu_gfx_cleaner_shader_sw_init()
1664 &adev->gfx.cleaner_shader_gpu_addr, in amdgpu_gfx_cleaner_shader_sw_init()
1665 (void **)&adev->gfx.cleaner_shader_cpu_ptr); in amdgpu_gfx_cleaner_shader_sw_init()
1670 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_cleaner_shader_sw_fini()
1673 amdgpu_bo_free_kernel(&adev->gfx.cleaner_shader_obj, in amdgpu_gfx_cleaner_shader_sw_fini()
1674 &adev->gfx.cleaner_shader_gpu_addr, in amdgpu_gfx_cleaner_shader_sw_fini()
1675 (void **)&adev->gfx.cleaner_shader_cpu_ptr); in amdgpu_gfx_cleaner_shader_sw_fini()
1682 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_cleaner_shader_init()
1685 if (adev->gfx.cleaner_shader_cpu_ptr && cleaner_shader_ptr) in amdgpu_gfx_cleaner_shader_init()
1686 memcpy_toio(adev->gfx.cleaner_shader_cpu_ptr, cleaner_shader_ptr, in amdgpu_gfx_cleaner_shader_init()
1723 mutex_lock(&adev->gfx.kfd_sch_mutex); in amdgpu_gfx_kfd_sch_ctrl()
1730 if (WARN_ON_ONCE(adev->gfx.kfd_sch_req_count[idx] == 0)) { in amdgpu_gfx_kfd_sch_ctrl()
1735 adev->gfx.kfd_sch_req_count[idx]--; in amdgpu_gfx_kfd_sch_ctrl()
1737 if (adev->gfx.kfd_sch_req_count[idx] == 0 && in amdgpu_gfx_kfd_sch_ctrl()
1738 adev->gfx.kfd_sch_inactive[idx]) { in amdgpu_gfx_kfd_sch_ctrl()
1739 schedule_delayed_work(&adev->gfx.enforce_isolation[idx].work, in amdgpu_gfx_kfd_sch_ctrl()
1743 if (adev->gfx.kfd_sch_req_count[idx] == 0) { in amdgpu_gfx_kfd_sch_ctrl()
1744 cancel_delayed_work_sync(&adev->gfx.enforce_isolation[idx].work); in amdgpu_gfx_kfd_sch_ctrl()
1745 if (!adev->gfx.kfd_sch_inactive[idx]) { in amdgpu_gfx_kfd_sch_ctrl()
1747 adev->gfx.kfd_sch_inactive[idx] = true; in amdgpu_gfx_kfd_sch_ctrl()
1751 adev->gfx.kfd_sch_req_count[idx]++; in amdgpu_gfx_kfd_sch_ctrl()
1755 mutex_unlock(&adev->gfx.kfd_sch_mutex); in amdgpu_gfx_kfd_sch_ctrl()
1787 if (isolation_work->xcp_id == adev->gfx.gfx_ring[i].xcp_id) in amdgpu_gfx_enforce_isolation_handler()
1788 fences += amdgpu_fence_count_emitted(&adev->gfx.gfx_ring[i]); in amdgpu_gfx_enforce_isolation_handler()
1791 if (isolation_work->xcp_id == adev->gfx.compute_ring[i].xcp_id) in amdgpu_gfx_enforce_isolation_handler()
1792 fences += amdgpu_fence_count_emitted(&adev->gfx.compute_ring[i]); in amdgpu_gfx_enforce_isolation_handler()
1795 schedule_delayed_work(&adev->gfx.enforce_isolation[idx].work, in amdgpu_gfx_enforce_isolation_handler()
1800 WARN_ON_ONCE(!adev->gfx.kfd_sch_inactive[idx]); in amdgpu_gfx_enforce_isolation_handler()
1801 WARN_ON_ONCE(adev->gfx.kfd_sch_req_count[idx]); in amdgpu_gfx_enforce_isolation_handler()
1803 adev->gfx.kfd_sch_inactive[idx] = false; in amdgpu_gfx_enforce_isolation_handler()
1814 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_enforce_isolation_ring_begin_use()
1838 if (!adev->gfx.enable_cleaner_shader) in amdgpu_gfx_enforce_isolation_ring_end_use()