Lines Matching refs:amdgpu_device
52 void (*handle_ras_controller_intr_no_bifring)(struct amdgpu_device *adev);
53 void (*handle_ras_err_event_athub_intr_no_bifring)(struct amdgpu_device *adev);
54 int (*init_ras_controller_interrupt)(struct amdgpu_device *adev);
55 int (*init_ras_err_event_athub_interrupt)(struct amdgpu_device *adev);
60 u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev);
61 u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev);
62 u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
63 u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
64 u32 (*get_pcie_index_hi_offset)(struct amdgpu_device *adev);
65 u32 (*get_pcie_port_index_offset)(struct amdgpu_device *adev);
66 u32 (*get_pcie_port_data_offset)(struct amdgpu_device *adev);
67 u32 (*get_rev_id)(struct amdgpu_device *adev);
68 void (*mc_access_enable)(struct amdgpu_device *adev, bool enable);
69 u32 (*get_memsize)(struct amdgpu_device *adev);
70 void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
72 void (*vpe_doorbell_range)(struct amdgpu_device *adev, int instance,
74 void (*vcn_doorbell_range)(struct amdgpu_device *adev, bool use_doorbell,
76 void (*gc_doorbell_init)(struct amdgpu_device *adev);
77 void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
79 void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
81 void (*ih_doorbell_range)(struct amdgpu_device *adev,
83 void (*enable_doorbell_interrupt)(struct amdgpu_device *adev,
85 void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
87 void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev,
89 void (*get_clockgating_state)(struct amdgpu_device *adev,
91 void (*ih_control)(struct amdgpu_device *adev);
92 void (*init_registers)(struct amdgpu_device *adev);
93 void (*remap_hdp_registers)(struct amdgpu_device *adev);
94 void (*enable_aspm)(struct amdgpu_device *adev,
96 void (*program_aspm)(struct amdgpu_device *adev);
97 void (*apply_lc_spc_mode_wa)(struct amdgpu_device *adev);
98 void (*apply_l1_link_width_reconfig_wa)(struct amdgpu_device *adev);
99 void (*clear_doorbell_interrupt)(struct amdgpu_device *adev);
100 u32 (*get_rom_offset)(struct amdgpu_device *adev);
101 int (*get_compute_partition_mode)(struct amdgpu_device *adev);
102 u32 (*get_memory_partition_mode)(struct amdgpu_device *adev,
104 u64 (*get_pcie_replay_count)(struct amdgpu_device *adev);
105 void (*set_reg_remap)(struct amdgpu_device *adev);
117 int amdgpu_nbio_ras_sw_init(struct amdgpu_device *adev);
118 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
119 u64 amdgpu_nbio_get_pcie_replay_count(struct amdgpu_device *adev);