Lines Matching refs:gpu_addr
233 amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_emit_ib()
234 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff); in cik_sdma_ring_emit_ib()
475 WREG32(mmSDMA0_GFX_RB_BASE + sdma_offsets[i], ring->gpu_addr >> 8); in cik_sdma_gfx_resume()
476 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in cik_sdma_gfx_resume()
606 u64 gpu_addr; in cik_sdma_ring_test_ring() local
612 gpu_addr = adev->wb.gpu_addr + (index * 4); in cik_sdma_ring_test_ring()
621 amdgpu_ring_write(ring, lower_32_bits(gpu_addr)); in cik_sdma_ring_test_ring()
622 amdgpu_ring_write(ring, upper_32_bits(gpu_addr)); in cik_sdma_ring_test_ring()
658 u64 gpu_addr; in cik_sdma_ring_test_ib() local
665 gpu_addr = adev->wb.gpu_addr + (index * 4); in cik_sdma_ring_test_ib()
676 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
677 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
824 uint64_t addr = ring->fence_drv.gpu_addr; in cik_sdma_ring_emit_pipeline_sync()