Lines Matching refs:ib

223 				  struct amdgpu_ib *ib,  in cik_sdma_ring_emit_ib()  argument
233 amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_emit_ib()
234 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff); in cik_sdma_ring_emit_ib()
235 amdgpu_ring_write(ring, ib->length_dw); in cik_sdma_ring_emit_ib()
654 struct amdgpu_ib ib; in cik_sdma_ring_test_ib() local
668 memset(&ib, 0, sizeof(ib)); in cik_sdma_ring_test_ib()
670 AMDGPU_IB_POOL_DIRECT, &ib); in cik_sdma_ring_test_ib()
674 ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_ring_test_ib()
676 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
677 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
678 ib.ptr[3] = 1; in cik_sdma_ring_test_ib()
679 ib.ptr[4] = 0xDEADBEEF; in cik_sdma_ring_test_ib()
680 ib.length_dw = 5; in cik_sdma_ring_test_ib()
681 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in cik_sdma_ring_test_ib()
699 amdgpu_ib_free(adev, &ib, NULL); in cik_sdma_ring_test_ib()
716 static void cik_sdma_vm_copy_pte(struct amdgpu_ib *ib, in cik_sdma_vm_copy_pte() argument
722 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, in cik_sdma_vm_copy_pte()
724 ib->ptr[ib->length_dw++] = bytes; in cik_sdma_vm_copy_pte()
725 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_vm_copy_pte()
726 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cik_sdma_vm_copy_pte()
727 ib->ptr[ib->length_dw++] = upper_32_bits(src); in cik_sdma_vm_copy_pte()
728 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_copy_pte()
729 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_copy_pte()
743 static void cik_sdma_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in cik_sdma_vm_write_pte() argument
749 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_vm_write_pte()
751 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_write_pte()
752 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_write_pte()
753 ib->ptr[ib->length_dw++] = ndw; in cik_sdma_vm_write_pte()
755 ib->ptr[ib->length_dw++] = lower_32_bits(value); in cik_sdma_vm_write_pte()
756 ib->ptr[ib->length_dw++] = upper_32_bits(value); in cik_sdma_vm_write_pte()
773 static void cik_sdma_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe, in cik_sdma_vm_set_pte_pde() argument
778 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0); in cik_sdma_vm_set_pte_pde()
779 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in cik_sdma_vm_set_pte_pde()
780 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_set_pte_pde()
781 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in cik_sdma_vm_set_pte_pde()
782 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in cik_sdma_vm_set_pte_pde()
783 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in cik_sdma_vm_set_pte_pde()
784 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in cik_sdma_vm_set_pte_pde()
785 ib->ptr[ib->length_dw++] = incr; /* increment size */ in cik_sdma_vm_set_pte_pde()
786 ib->ptr[ib->length_dw++] = 0; in cik_sdma_vm_set_pte_pde()
787 ib->ptr[ib->length_dw++] = count; /* number of entries */ in cik_sdma_vm_set_pte_pde()
797 static void cik_sdma_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in cik_sdma_ring_pad_ib() argument
803 pad_count = (-ib->length_dw) & 7; in cik_sdma_ring_pad_ib()
806 ib->ptr[ib->length_dw++] = in cik_sdma_ring_pad_ib()
810 ib->ptr[ib->length_dw++] = in cik_sdma_ring_pad_ib()
1302 static void cik_sdma_emit_copy_buffer(struct amdgpu_ib *ib, in cik_sdma_emit_copy_buffer() argument
1308 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); in cik_sdma_emit_copy_buffer()
1309 ib->ptr[ib->length_dw++] = byte_count; in cik_sdma_emit_copy_buffer()
1310 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_emit_copy_buffer()
1311 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in cik_sdma_emit_copy_buffer()
1312 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in cik_sdma_emit_copy_buffer()
1313 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in cik_sdma_emit_copy_buffer()
1314 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in cik_sdma_emit_copy_buffer()
1327 static void cik_sdma_emit_fill_buffer(struct amdgpu_ib *ib, in cik_sdma_emit_fill_buffer() argument
1332 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, 0); in cik_sdma_emit_fill_buffer()
1333 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in cik_sdma_emit_fill_buffer()
1334 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in cik_sdma_emit_fill_buffer()
1335 ib->ptr[ib->length_dw++] = src_data; in cik_sdma_emit_fill_buffer()
1336 ib->ptr[ib->length_dw++] = byte_count; in cik_sdma_emit_fill_buffer()