Lines Matching refs:dev_priv
26 static void assert_fdi_tx(struct drm_i915_private *dev_priv, in assert_fdi_tx() argument
31 if (HAS_DDI(dev_priv)) { in assert_fdi_tx()
39 cur_state = intel_de_read(dev_priv, in assert_fdi_tx()
40 TRANS_DDI_FUNC_CTL(dev_priv, cpu_transcoder)) & TRANS_DDI_FUNC_ENABLE; in assert_fdi_tx()
42 cur_state = intel_de_read(dev_priv, FDI_TX_CTL(pipe)) & FDI_TX_ENABLE; in assert_fdi_tx()
44 I915_STATE_WARN(dev_priv, cur_state != state, in assert_fdi_tx()
59 static void assert_fdi_rx(struct drm_i915_private *dev_priv, in assert_fdi_rx() argument
64 cur_state = intel_de_read(dev_priv, FDI_RX_CTL(pipe)) & FDI_RX_ENABLE; in assert_fdi_rx()
65 I915_STATE_WARN(dev_priv, cur_state != state, in assert_fdi_rx()
122 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in intel_fdi_link_train() local
124 dev_priv->display.funcs.fdi->fdi_link_train(crtc, crtc_state); in intel_fdi_link_train()
187 struct drm_i915_private *dev_priv = to_i915(dev); in ilk_check_fdi_lanes() local
194 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
198 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
204 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ilk_check_fdi_lanes()
206 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
215 if (INTEL_NUM_PIPES(dev_priv) == 2) in ilk_check_fdi_lanes()
226 other_crtc = intel_crtc_for_pipe(dev_priv, PIPE_C); in ilk_check_fdi_lanes()
233 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
241 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
247 other_crtc = intel_crtc_for_pipe(dev_priv, PIPE_B); in ilk_check_fdi_lanes()
254 drm_dbg_kms(&dev_priv->drm, in ilk_check_fdi_lanes()
416 static void cpt_set_fdi_bc_bifurcation(struct drm_i915_private *dev_priv, bool enable) in cpt_set_fdi_bc_bifurcation() argument
420 temp = intel_de_read(dev_priv, SOUTH_CHICKEN1); in cpt_set_fdi_bc_bifurcation()
424 drm_WARN_ON(&dev_priv->drm, in cpt_set_fdi_bc_bifurcation()
425 intel_de_read(dev_priv, FDI_RX_CTL(PIPE_B)) & in cpt_set_fdi_bc_bifurcation()
427 drm_WARN_ON(&dev_priv->drm, in cpt_set_fdi_bc_bifurcation()
428 intel_de_read(dev_priv, FDI_RX_CTL(PIPE_C)) & in cpt_set_fdi_bc_bifurcation()
435 drm_dbg_kms(&dev_priv->drm, "%sabling fdi C rx\n", in cpt_set_fdi_bc_bifurcation()
437 intel_de_write(dev_priv, SOUTH_CHICKEN1, temp); in cpt_set_fdi_bc_bifurcation()
438 intel_de_posting_read(dev_priv, SOUTH_CHICKEN1); in cpt_set_fdi_bc_bifurcation()
444 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ivb_update_fdi_bc_bifurcation() local
451 cpt_set_fdi_bc_bifurcation(dev_priv, false); in ivb_update_fdi_bc_bifurcation()
453 cpt_set_fdi_bc_bifurcation(dev_priv, true); in ivb_update_fdi_bc_bifurcation()
457 cpt_set_fdi_bc_bifurcation(dev_priv, true); in ivb_update_fdi_bc_bifurcation()
468 struct drm_i915_private *dev_priv = to_i915(dev); in intel_fdi_normal_train() local
475 temp = intel_de_read(dev_priv, reg); in intel_fdi_normal_train()
476 if (IS_IVYBRIDGE(dev_priv)) { in intel_fdi_normal_train()
483 intel_de_write(dev_priv, reg, temp); in intel_fdi_normal_train()
486 temp = intel_de_read(dev_priv, reg); in intel_fdi_normal_train()
487 if (HAS_PCH_CPT(dev_priv)) { in intel_fdi_normal_train()
494 intel_de_write(dev_priv, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE); in intel_fdi_normal_train()
497 intel_de_posting_read(dev_priv, reg); in intel_fdi_normal_train()
501 if (IS_IVYBRIDGE(dev_priv)) in intel_fdi_normal_train()
502 intel_de_rmw(dev_priv, reg, 0, FDI_FS_ERRC_ENABLE | FDI_FE_ERRC_ENABLE); in intel_fdi_normal_train()
510 struct drm_i915_private *dev_priv = to_i915(dev); in ilk_fdi_link_train() local
519 intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe), in ilk_fdi_link_train()
520 intel_de_read(dev_priv, PIPE_DATA_M1(dev_priv, pipe)) & TU_SIZE_MASK); in ilk_fdi_link_train()
523 assert_transcoder_enabled(dev_priv, crtc_state->cpu_transcoder); in ilk_fdi_link_train()
528 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
531 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train()
532 intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
537 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
542 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ilk_fdi_link_train()
545 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
548 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ilk_fdi_link_train()
550 intel_de_posting_read(dev_priv, reg); in ilk_fdi_link_train()
554 intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe), in ilk_fdi_link_train()
556 intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe), in ilk_fdi_link_train()
561 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
562 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
565 drm_dbg_kms(&dev_priv->drm, "FDI train 1 done.\n"); in ilk_fdi_link_train()
566 intel_de_write(dev_priv, reg, temp | FDI_RX_BIT_LOCK); in ilk_fdi_link_train()
571 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in ilk_fdi_link_train()
574 intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), in ilk_fdi_link_train()
576 intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), in ilk_fdi_link_train()
578 intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe)); in ilk_fdi_link_train()
583 temp = intel_de_read(dev_priv, reg); in ilk_fdi_link_train()
584 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ilk_fdi_link_train()
587 intel_de_write(dev_priv, reg, in ilk_fdi_link_train()
589 drm_dbg_kms(&dev_priv->drm, "FDI train 2 done.\n"); in ilk_fdi_link_train()
594 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in ilk_fdi_link_train()
596 drm_dbg_kms(&dev_priv->drm, "FDI train done\n"); in ilk_fdi_link_train()
612 struct drm_i915_private *dev_priv = to_i915(dev); in gen6_fdi_link_train() local
621 intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe), in gen6_fdi_link_train()
622 intel_de_read(dev_priv, PIPE_DATA_M1(dev_priv, pipe)) & TU_SIZE_MASK); in gen6_fdi_link_train()
627 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
630 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
632 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
637 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
645 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in gen6_fdi_link_train()
647 intel_de_write(dev_priv, FDI_RX_MISC(pipe), in gen6_fdi_link_train()
651 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
652 if (HAS_PCH_CPT(dev_priv)) { in gen6_fdi_link_train()
659 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in gen6_fdi_link_train()
661 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
665 intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), in gen6_fdi_link_train()
667 intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe)); in gen6_fdi_link_train()
672 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
673 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in gen6_fdi_link_train()
675 intel_de_write(dev_priv, reg, in gen6_fdi_link_train()
677 drm_dbg_kms(&dev_priv->drm, in gen6_fdi_link_train()
687 drm_err(&dev_priv->drm, "FDI train 1 fail!\n"); in gen6_fdi_link_train()
691 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
694 if (IS_SANDYBRIDGE(dev_priv)) { in gen6_fdi_link_train()
699 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
702 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
703 if (HAS_PCH_CPT(dev_priv)) { in gen6_fdi_link_train()
710 intel_de_write(dev_priv, reg, temp); in gen6_fdi_link_train()
712 intel_de_posting_read(dev_priv, reg); in gen6_fdi_link_train()
716 intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), in gen6_fdi_link_train()
718 intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe)); in gen6_fdi_link_train()
723 temp = intel_de_read(dev_priv, reg); in gen6_fdi_link_train()
724 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in gen6_fdi_link_train()
726 intel_de_write(dev_priv, reg, in gen6_fdi_link_train()
728 drm_dbg_kms(&dev_priv->drm, in gen6_fdi_link_train()
738 drm_err(&dev_priv->drm, "FDI train 2 fail!\n"); in gen6_fdi_link_train()
740 drm_dbg_kms(&dev_priv->drm, "FDI train done.\n"); in gen6_fdi_link_train()
748 struct drm_i915_private *dev_priv = to_i915(dev); in ivb_manual_fdi_link_train() local
759 intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe), in ivb_manual_fdi_link_train()
760 intel_de_read(dev_priv, PIPE_DATA_M1(dev_priv, pipe)) & TU_SIZE_MASK); in ivb_manual_fdi_link_train()
765 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
768 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
770 intel_de_posting_read(dev_priv, reg); in ivb_manual_fdi_link_train()
773 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR before link train 0x%x\n", in ivb_manual_fdi_link_train()
774 intel_de_read(dev_priv, FDI_RX_IIR(pipe))); in ivb_manual_fdi_link_train()
780 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
783 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
786 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
790 intel_de_write(dev_priv, reg, temp); in ivb_manual_fdi_link_train()
794 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
801 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ivb_manual_fdi_link_train()
803 intel_de_write(dev_priv, FDI_RX_MISC(pipe), in ivb_manual_fdi_link_train()
807 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
810 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ivb_manual_fdi_link_train()
812 intel_de_posting_read(dev_priv, reg); in ivb_manual_fdi_link_train()
817 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
818 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ivb_manual_fdi_link_train()
821 (intel_de_read(dev_priv, reg) & FDI_RX_BIT_LOCK)) { in ivb_manual_fdi_link_train()
822 intel_de_write(dev_priv, reg, in ivb_manual_fdi_link_train()
824 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
832 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
838 intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), in ivb_manual_fdi_link_train()
841 intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), in ivb_manual_fdi_link_train()
844 intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe)); in ivb_manual_fdi_link_train()
849 temp = intel_de_read(dev_priv, reg); in ivb_manual_fdi_link_train()
850 drm_dbg_kms(&dev_priv->drm, "FDI_RX_IIR 0x%x\n", temp); in ivb_manual_fdi_link_train()
853 (intel_de_read(dev_priv, reg) & FDI_RX_SYMBOL_LOCK)) { in ivb_manual_fdi_link_train()
854 intel_de_write(dev_priv, reg, in ivb_manual_fdi_link_train()
856 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
864 drm_dbg_kms(&dev_priv->drm, in ivb_manual_fdi_link_train()
869 drm_dbg_kms(&dev_priv->drm, "FDI train done.\n"); in ivb_manual_fdi_link_train()
884 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in hsw_fdi_link_train() local
899 intel_de_write(dev_priv, FDI_RX_MISC(PIPE_A), in hsw_fdi_link_train()
906 rx_ctl_val = dev_priv->display.fdi.rx_config | FDI_RX_ENHANCE_FRAME_ENABLE | in hsw_fdi_link_train()
909 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
910 intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
915 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
918 drm_WARN_ON(&dev_priv->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
925 intel_de_write(dev_priv, DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
935 intel_de_write(dev_priv, DDI_BUF_CTL(PORT_E), in hsw_fdi_link_train()
939 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
944 intel_de_write(dev_priv, FDI_RX_TUSIZE1(PIPE_A), TU_SIZE(64)); in hsw_fdi_link_train()
948 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
949 intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
955 intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A), in hsw_fdi_link_train()
957 intel_de_posting_read(dev_priv, FDI_RX_MISC(PIPE_A)); in hsw_fdi_link_train()
962 temp = intel_de_read(dev_priv, DP_TP_STATUS(PORT_E)); in hsw_fdi_link_train()
964 drm_dbg_kms(&dev_priv->drm, in hsw_fdi_link_train()
974 drm_err(&dev_priv->drm, "FDI link training failed!\n"); in hsw_fdi_link_train()
979 intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), rx_ctl_val); in hsw_fdi_link_train()
980 intel_de_posting_read(dev_priv, FDI_RX_CTL(PIPE_A)); in hsw_fdi_link_train()
982 intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0); in hsw_fdi_link_train()
983 intel_de_posting_read(dev_priv, DDI_BUF_CTL(PORT_E)); in hsw_fdi_link_train()
986 intel_de_rmw(dev_priv, DP_TP_CTL(PORT_E), DP_TP_CTL_ENABLE, 0); in hsw_fdi_link_train()
987 intel_de_posting_read(dev_priv, DP_TP_CTL(PORT_E)); in hsw_fdi_link_train()
989 intel_wait_ddi_buf_idle(dev_priv, PORT_E); in hsw_fdi_link_train()
992 intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A), in hsw_fdi_link_train()
995 intel_de_posting_read(dev_priv, FDI_RX_MISC(PIPE_A)); in hsw_fdi_link_train()
999 intel_de_write(dev_priv, DP_TP_CTL(PORT_E), in hsw_fdi_link_train()
1008 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in hsw_fdi_disable() local
1016 intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_RX_ENABLE, 0); in hsw_fdi_disable()
1017 intel_de_rmw(dev_priv, DDI_BUF_CTL(PORT_E), DDI_BUF_CTL_ENABLE, 0); in hsw_fdi_disable()
1018 intel_wait_ddi_buf_idle(dev_priv, PORT_E); in hsw_fdi_disable()
1020 intel_de_rmw(dev_priv, FDI_RX_MISC(PIPE_A), in hsw_fdi_disable()
1023 intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_PCDCLK, 0); in hsw_fdi_disable()
1024 intel_de_rmw(dev_priv, FDI_RX_CTL(PIPE_A), FDI_RX_PLL_ENABLE, 0); in hsw_fdi_disable()
1030 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ilk_fdi_pll_enable() local
1037 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
1040 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_pll_enable()
1041 intel_de_write(dev_priv, reg, temp | FDI_RX_PLL_ENABLE); in ilk_fdi_pll_enable()
1043 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_enable()
1047 intel_de_rmw(dev_priv, reg, 0, FDI_PCDCLK); in ilk_fdi_pll_enable()
1048 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_enable()
1053 temp = intel_de_read(dev_priv, reg); in ilk_fdi_pll_enable()
1055 intel_de_write(dev_priv, reg, temp | FDI_TX_PLL_ENABLE); in ilk_fdi_pll_enable()
1057 intel_de_posting_read(dev_priv, reg); in ilk_fdi_pll_enable()
1065 struct drm_i915_private *dev_priv = to_i915(dev); in ilk_fdi_pll_disable() local
1069 intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), FDI_PCDCLK, 0); in ilk_fdi_pll_disable()
1072 intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), FDI_TX_PLL_ENABLE, 0); in ilk_fdi_pll_disable()
1073 intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe)); in ilk_fdi_pll_disable()
1077 intel_de_rmw(dev_priv, FDI_RX_CTL(pipe), FDI_RX_PLL_ENABLE, 0); in ilk_fdi_pll_disable()
1078 intel_de_posting_read(dev_priv, FDI_RX_CTL(pipe)); in ilk_fdi_pll_disable()
1084 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); in ilk_fdi_disable() local
1090 intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), FDI_TX_ENABLE, 0); in ilk_fdi_disable()
1091 intel_de_posting_read(dev_priv, FDI_TX_CTL(pipe)); in ilk_fdi_disable()
1094 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1096 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1097 intel_de_write(dev_priv, reg, temp & ~FDI_RX_ENABLE); in ilk_fdi_disable()
1099 intel_de_posting_read(dev_priv, reg); in ilk_fdi_disable()
1103 if (HAS_PCH_IBX(dev_priv)) in ilk_fdi_disable()
1104 intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe), in ilk_fdi_disable()
1108 intel_de_rmw(dev_priv, FDI_TX_CTL(pipe), in ilk_fdi_disable()
1112 temp = intel_de_read(dev_priv, reg); in ilk_fdi_disable()
1113 if (HAS_PCH_CPT(dev_priv)) { in ilk_fdi_disable()
1122 temp |= (intel_de_read(dev_priv, TRANSCONF(dev_priv, pipe)) & TRANSCONF_BPC_MASK) << 11; in ilk_fdi_disable()
1123 intel_de_write(dev_priv, reg, temp); in ilk_fdi_disable()
1125 intel_de_posting_read(dev_priv, reg); in ilk_fdi_disable()
1142 intel_fdi_init_hook(struct drm_i915_private *dev_priv) in intel_fdi_init_hook() argument
1144 if (IS_IRONLAKE(dev_priv)) { in intel_fdi_init_hook()
1145 dev_priv->display.funcs.fdi = &ilk_funcs; in intel_fdi_init_hook()
1146 } else if (IS_SANDYBRIDGE(dev_priv)) { in intel_fdi_init_hook()
1147 dev_priv->display.funcs.fdi = &gen6_funcs; in intel_fdi_init_hook()
1148 } else if (IS_IVYBRIDGE(dev_priv)) { in intel_fdi_init_hook()
1150 dev_priv->display.funcs.fdi = &ivb_funcs; in intel_fdi_init_hook()