Lines Matching refs:pvr_dev
34 pvr_meta_cr_read32(struct pvr_device *pvr_dev, u32 reg_addr, u32 *reg_value_out) in pvr_meta_cr_read32() argument
39 err = pvr_cr_poll_reg32(pvr_dev, ROGUE_CR_META_SP_MSLVCTRL1, in pvr_meta_cr_read32()
49 pvr_cr_write32(pvr_dev, ROGUE_CR_META_SP_MSLVCTRL0, in pvr_meta_cr_read32()
51 (void)pvr_cr_read32(pvr_dev, ROGUE_CR_META_SP_MSLVCTRL0); /* Fence write. */ in pvr_meta_cr_read32()
54 err = pvr_cr_poll_reg32(pvr_dev, ROGUE_CR_META_SP_MSLVCTRL1, in pvr_meta_cr_read32()
63 *reg_value_out = pvr_cr_read32(pvr_dev, ROGUE_CR_META_SP_MSLVDATAX); in pvr_meta_cr_read32()
69 pvr_meta_wrapper_init(struct pvr_device *pvr_dev) in pvr_meta_wrapper_init() argument
74 pvr_cr_write64(pvr_dev, ROGUE_CR_META_BOOT, ROGUE_CR_META_BOOT_MODE_EN); in pvr_meta_wrapper_init()
94 pvr_cr_write64(pvr_dev, ROGUE_CR_MTS_GARTEN_WRAPPER_CONFIG, garten_config); in pvr_meta_wrapper_init()
114 struct pvr_device *pvr_dev = to_pvr_device(drm_dev); in meta_ldr_cmd_loadmem() local
137 err = pvr_fw_find_mmu_segment(pvr_dev, offset, data_size, fw_code_ptr, fw_data_ptr, in meta_ldr_cmd_loadmem()
156 struct pvr_device *pvr_dev = to_pvr_device(drm_dev); in meta_ldr_cmd_zeromem() local
170 err = pvr_fw_find_mmu_segment(pvr_dev, offset, byte_count, fw_code_ptr, fw_data_ptr, in meta_ldr_cmd_zeromem()
254 process_ldr_command_stream(struct pvr_device *pvr_dev, const u8 *fw, u8 *fw_code_ptr, in process_ldr_command_stream() argument
258 struct drm_device *drm_dev = from_pvr_device(pvr_dev); in process_ldr_command_stream()
263 const u32 fw_size = pvr_dev->fw_dev.firmware->size; in process_ldr_command_stream()
269 err = PVR_FEATURE_VALUE(pvr_dev, meta_coremem_size, &coremem_size); in process_ldr_command_stream()
361 struct pvr_device *pvr_dev = to_pvr_device(gem_from_pvr_gem(fw_obj->gem)->dev); in get_fw_obj_gpu_addr() local
362 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in get_fw_obj_gpu_addr()
368 configure_seg_mmu(struct pvr_device *pvr_dev, u32 **boot_conf_ptr) in configure_seg_mmu() argument
370 const struct pvr_fw_layout_entry *layout_entries = pvr_dev->fw_dev.layout_entries; in configure_seg_mmu()
371 u32 num_layout_entries = pvr_dev->fw_dev.header->layout_entry_num; in configure_seg_mmu()
387 u64 seg_out_addr = get_fw_obj_gpu_addr(pvr_dev->fw_dev.mem.data_obj); in configure_seg_mmu()
456 pvr_meta_fw_process(struct pvr_device *pvr_dev, const u8 *fw, in pvr_meta_fw_process() argument
460 struct pvr_fw_device *fw_dev = &pvr_dev->fw_dev; in pvr_meta_fw_process()
470 configure_seg_mmu(pvr_dev, &boot_conf); in pvr_meta_fw_process()
473 err = process_ldr_command_stream(pvr_dev, fw, fw_code_ptr, fw_data_ptr, fw_core_code_ptr, in pvr_meta_fw_process()
498 pvr_meta_init(struct pvr_device *pvr_dev) in pvr_meta_init() argument
500 pvr_fw_heap_info_init(pvr_dev, ROGUE_FW_HEAP_META_SHIFT, 0); in pvr_meta_init()
519 pvr_meta_vm_map(struct pvr_device *pvr_dev, struct pvr_fw_object *fw_obj) in pvr_meta_vm_map() argument
523 return pvr_vm_map(pvr_dev->kernel_vm_ctx, pvr_obj, 0, fw_obj->fw_mm_node.start, in pvr_meta_vm_map()
528 pvr_meta_vm_unmap(struct pvr_device *pvr_dev, struct pvr_fw_object *fw_obj) in pvr_meta_vm_unmap() argument
530 pvr_vm_unmap(pvr_dev->kernel_vm_ctx, fw_obj->fw_mm_node.start, in pvr_meta_vm_unmap()