Lines Matching refs:cinfo
160 memset(&pll->cinfo, 0, sizeof(pll->cinfo)); in dss_pll_disable()
163 int dss_pll_set_config(struct dss_pll *pll, const struct dss_pll_clock_info *cinfo) in dss_pll_set_config() argument
167 r = pll->ops->set_config(pll, cinfo); in dss_pll_set_config()
171 pll->cinfo = *cinfo; in dss_pll_set_config()
273 unsigned long target_clkout, struct dss_pll_clock_info *cinfo) in dss_pll_calc_b() argument
316 cinfo->n = n; in dss_pll_calc_b()
317 cinfo->m = m; in dss_pll_calc_b()
318 cinfo->mf = mf; in dss_pll_calc_b()
319 cinfo->mX[0] = m2; in dss_pll_calc_b()
320 cinfo->sd = sd; in dss_pll_calc_b()
322 cinfo->fint = fint; in dss_pll_calc_b()
323 cinfo->clkdco = clkdco; in dss_pll_calc_b()
324 cinfo->clkout[0] = clkout; in dss_pll_calc_b()
397 const struct dss_pll_clock_info *cinfo) in dss_pll_write_config_type_a() argument
407 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
408 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
410 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
413 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
419 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
422 l = FLD_MOD(l, cinfo->mX[3] ? cinfo->mX[3] - 1 : 0, in dss_pll_write_config_type_a()
428 u32 f = cinfo->fint < 1000000 ? 0x3 : in dss_pll_write_config_type_a()
429 cinfo->fint < 1250000 ? 0x4 : in dss_pll_write_config_type_a()
430 cinfo->fint < 1500000 ? 0x5 : in dss_pll_write_config_type_a()
431 cinfo->fint < 1750000 ? 0x6 : in dss_pll_write_config_type_a()
436 u32 f = cinfo->clkdco < hw->clkdco_low ? 0x2 : 0x4; in dss_pll_write_config_type_a()
460 sleep_time = DIV_ROUND_UP(1000*1000*1000, cinfo->fint); in dss_pll_write_config_type_a()
503 l = FLD_MOD(l, cinfo->mX[0] ? 1 : 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
504 l = FLD_MOD(l, cinfo->mX[1] ? 1 : 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
506 l = FLD_MOD(l, cinfo->mX[2] ? 1 : 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
507 l = FLD_MOD(l, cinfo->mX[3] ? 1 : 0, 25, 25); /* M7_CLOCK_EN */ in dss_pll_write_config_type_a()
511 (cinfo->mX[0] ? BIT(7) : 0) | in dss_pll_write_config_type_a()
512 (cinfo->mX[1] ? BIT(8) : 0) | in dss_pll_write_config_type_a()
513 (cinfo->mX[2] ? BIT(10) : 0) | in dss_pll_write_config_type_a()
514 (cinfo->mX[3] ? BIT(11) : 0)); in dss_pll_write_config_type_a()
525 const struct dss_pll_clock_info *cinfo) in dss_pll_write_config_type_b() argument
532 l = FLD_MOD(l, cinfo->m, 20, 9); /* PLL_REGM */ in dss_pll_write_config_type_b()
533 l = FLD_MOD(l, cinfo->n - 1, 8, 1); /* PLL_REGN */ in dss_pll_write_config_type_b()
544 if (cinfo->clkdco > hw->clkdco_low) in dss_pll_write_config_type_b()
551 l = FLD_MOD(l, cinfo->sd, 17, 10); /* PLL_REGSD */ in dss_pll_write_config_type_b()
555 l = FLD_MOD(l, cinfo->mX[0], 24, 18); /* PLL_REGM2 */ in dss_pll_write_config_type_b()
556 l = FLD_MOD(l, cinfo->mf, 17, 0); /* PLL_REGM_F */ in dss_pll_write_config_type_b()