Lines Matching refs:ptdev
57 struct panthor_device *ptdev; member
172 struct panthor_device *ptdev; member
181 int panthor_device_init(struct panthor_device *ptdev);
182 void panthor_device_unplug(struct panthor_device *ptdev);
187 static inline void panthor_device_schedule_reset(struct panthor_device *ptdev) in panthor_device_schedule_reset() argument
189 if (!atomic_cmpxchg(&ptdev->reset.pending, 0, 1) && in panthor_device_schedule_reset()
190 atomic_read(&ptdev->pm.state) == PANTHOR_DEVICE_PM_STATE_ACTIVE) in panthor_device_schedule_reset()
191 queue_work(ptdev->reset.wq, &ptdev->reset.work); in panthor_device_schedule_reset()
199 static inline bool panthor_device_reset_is_pending(struct panthor_device *ptdev) in panthor_device_reset_is_pending() argument
201 return atomic_read(&ptdev->reset.pending) != 0; in panthor_device_reset_is_pending()
204 int panthor_device_mmap_io(struct panthor_device *ptdev,
273 const char *panthor_exception_name(struct panthor_device *ptdev,
290 struct panthor_device *ptdev = pirq->ptdev; \
294 if (!gpu_read(ptdev, __reg_prefix ## _INT_STAT)) \
297 gpu_write(ptdev, __reg_prefix ## _INT_MASK, 0); \
304 struct panthor_device *ptdev = pirq->ptdev; \
308 u32 status = gpu_read(ptdev, __reg_prefix ## _INT_RAWSTAT) & pirq->mask; \
313 gpu_write(ptdev, __reg_prefix ## _INT_CLEAR, status); \
315 __handler(ptdev, status); \
320 gpu_write(ptdev, __reg_prefix ## _INT_MASK, pirq->mask); \
328 gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, 0); \
337 gpu_write(pirq->ptdev, __reg_prefix ## _INT_CLEAR, mask); \
338 gpu_write(pirq->ptdev, __reg_prefix ## _INT_MASK, mask); \
341 static int panthor_request_ ## __name ## _irq(struct panthor_device *ptdev, \
345 pirq->ptdev = ptdev; \
349 return devm_request_threaded_irq(ptdev->base.dev, irq, \