Lines Matching refs:dpm_levels
2514 pi->dpm_table.sclk_table.dpm_levels[i].value, in ci_do_program_memory_timing_parameters()
2515 pi->dpm_table.mclk_table.dpm_levels[j].value, in ci_do_program_memory_timing_parameters()
2573 if (dpm_table->dpm_levels[i-1].enabled) in ci_get_dpm_level_enable_mask_value()
2591 (u8)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level()
2593 r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
3247 dpm_table->sclk_table.dpm_levels[i].value, in ci_populate_all_graphic_levels()
3293 if (dpm_table->mclk_table.dpm_levels[i].value == 0) in ci_populate_all_memory_levels()
3296 dpm_table->mclk_table.dpm_levels[i].value, in ci_populate_all_memory_levels()
3338 dpm_table->dpm_levels[i].enabled = false; in ci_reset_single_dpm_table()
3344 dpm_table->dpm_levels[index].value = pcie_gen; in ci_setup_pcie_table_entry()
3345 dpm_table->dpm_levels[index].param1 = pcie_lanes; in ci_setup_pcie_table_entry()
3346 dpm_table->dpm_levels[index].enabled = true; in ci_setup_pcie_table_entry()
3438 (pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count-1].value != in ci_setup_default_dpm_tables()
3440 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].value = in ci_setup_default_dpm_tables()
3442 pi->dpm_table.sclk_table.dpm_levels[pi->dpm_table.sclk_table.count].enabled = in ci_setup_default_dpm_tables()
3451 (pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count-1].value != in ci_setup_default_dpm_tables()
3453 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].value = in ci_setup_default_dpm_tables()
3455 pi->dpm_table.mclk_table.dpm_levels[pi->dpm_table.mclk_table.count].enabled = in ci_setup_default_dpm_tables()
3462 pi->dpm_table.vddc_table.dpm_levels[i].value = in ci_setup_default_dpm_tables()
3464 pi->dpm_table.vddc_table.dpm_levels[i].param1 = in ci_setup_default_dpm_tables()
3466 pi->dpm_table.vddc_table.dpm_levels[i].enabled = true; in ci_setup_default_dpm_tables()
3473 pi->dpm_table.vddci_table.dpm_levels[i].value = in ci_setup_default_dpm_tables()
3475 pi->dpm_table.vddci_table.dpm_levels[i].enabled = true; in ci_setup_default_dpm_tables()
3483 pi->dpm_table.mvdd_table.dpm_levels[i].value = in ci_setup_default_dpm_tables()
3485 pi->dpm_table.mvdd_table.dpm_levels[i].enabled = true; in ci_setup_default_dpm_tables()
3502 if (value == table->dpm_levels[i].value) { in ci_find_boot_level()
3666 if ((dpm_table->dpm_levels[i].value < low_limit) || in ci_trim_single_dpm_states()
3667 (dpm_table->dpm_levels[i].value > high_limit)) in ci_trim_single_dpm_states()
3668 dpm_table->dpm_levels[i].enabled = false; in ci_trim_single_dpm_states()
3670 dpm_table->dpm_levels[i].enabled = true; in ci_trim_single_dpm_states()
3683 if ((pcie_table->dpm_levels[i].value < speed_low) || in ci_trim_pcie_dpm_states()
3684 (pcie_table->dpm_levels[i].param1 < lanes_low) || in ci_trim_pcie_dpm_states()
3685 (pcie_table->dpm_levels[i].value > speed_high) || in ci_trim_pcie_dpm_states()
3686 (pcie_table->dpm_levels[i].param1 > lanes_high)) in ci_trim_pcie_dpm_states()
3687 pcie_table->dpm_levels[i].enabled = false; in ci_trim_pcie_dpm_states()
3689 pcie_table->dpm_levels[i].enabled = true; in ci_trim_pcie_dpm_states()
3693 if (pcie_table->dpm_levels[i].enabled) { in ci_trim_pcie_dpm_states()
3695 if (pcie_table->dpm_levels[j].enabled) { in ci_trim_pcie_dpm_states()
3696 if ((pcie_table->dpm_levels[i].value == pcie_table->dpm_levels[j].value) && in ci_trim_pcie_dpm_states()
3697 (pcie_table->dpm_levels[i].param1 == pcie_table->dpm_levels[j].param1)) in ci_trim_pcie_dpm_states()
3698 pcie_table->dpm_levels[j].enabled = false; in ci_trim_pcie_dpm_states()
3825 if (sclk == sclk_table->dpm_levels[i].value) in ci_find_dpm_states_clocks_in_dpm_table()
3841 if (mclk == mclk_table->dpm_levels[i].value) in ci_find_dpm_states_clocks_in_dpm_table()
3867 dpm_table->sclk_table.dpm_levels[dpm_table->sclk_table.count-1].value = sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()
3870 dpm_table->mclk_table.dpm_levels[dpm_table->mclk_table.count-1].value = mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()
4702 pi->dpm_table.mclk_table.dpm_levels[i].value, in ci_convert_mc_reg_table_to_smc()