Lines Matching refs:levels
801 trinity_program_power_level(rdev, &new_ps->levels[i], i); in trinity_program_power_levels_0_to_n()
921 if (new_ps->levels[new_ps->num_levels - 1].sclk >= in trinity_set_uvd_clock_before_set_eng_clock()
922 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_before_set_eng_clock()
935 if (new_ps->levels[new_ps->num_levels - 1].sclk < in trinity_set_uvd_clock_after_set_eng_clock()
936 current_ps->levels[current_ps->num_levels - 1].sclk) in trinity_set_uvd_clock_after_set_eng_clock()
1283 ps->levels[0] = pi->boot_pl; in trinity_patch_boot_state()
1306 pi->current_ps.levels[0] = pi->boot_pl; in trinity_construct_boot_state()
1361 current_vddc = current_ps->levels[current_index].vddc_index; in trinity_patch_thermal_state()
1362 current_sclk = current_ps->levels[current_index].sclk; in trinity_patch_thermal_state()
1368 ps->levels[0].vddc_index = current_vddc; in trinity_patch_thermal_state()
1370 if (ps->levels[0].sclk > current_sclk) in trinity_patch_thermal_state()
1371 ps->levels[0].sclk = current_sclk; in trinity_patch_thermal_state()
1373 ps->levels[0].ds_divider_index = in trinity_patch_thermal_state()
1374 trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr); in trinity_patch_thermal_state()
1375 ps->levels[0].ss_divider_index = ps->levels[0].ds_divider_index; in trinity_patch_thermal_state()
1376 ps->levels[0].allow_gnb_slow = 1; in trinity_patch_thermal_state()
1377 ps->levels[0].force_nbp_state = 0; in trinity_patch_thermal_state()
1378 ps->levels[0].display_wm = 0; in trinity_patch_thermal_state()
1379 ps->levels[0].vce_wm = in trinity_patch_thermal_state()
1380 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk); in trinity_patch_thermal_state()
1396 else if (ps->levels[index].sclk < 30000) in trinity_calculate_display_wm()
1515 if (ps->levels[i].vddc_index < min_voltage) in trinity_apply_state_adjust_rules()
1516 ps->levels[i].vddc_index = min_voltage; in trinity_apply_state_adjust_rules()
1518 if (ps->levels[i].sclk < min_sclk) in trinity_apply_state_adjust_rules()
1519 ps->levels[i].sclk = in trinity_apply_state_adjust_rules()
1525 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in trinity_apply_state_adjust_rules()
1526 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in trinity_apply_state_adjust_rules()
1529 if (ps->levels[i].vddc_index < min_vce_voltage) in trinity_apply_state_adjust_rules()
1530 ps->levels[i].vddc_index = min_vce_voltage; in trinity_apply_state_adjust_rules()
1533 ps->levels[i].ds_divider_index = in trinity_apply_state_adjust_rules()
1534 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr); in trinity_apply_state_adjust_rules()
1536 ps->levels[i].ss_divider_index = ps->levels[i].ds_divider_index; in trinity_apply_state_adjust_rules()
1538 ps->levels[i].allow_gnb_slow = 1; in trinity_apply_state_adjust_rules()
1539 ps->levels[i].force_nbp_state = 0; in trinity_apply_state_adjust_rules()
1540 ps->levels[i].display_wm = in trinity_apply_state_adjust_rules()
1542 ps->levels[i].vce_wm = in trinity_apply_state_adjust_rules()
1543 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk); in trinity_apply_state_adjust_rules()
1566 ps->levels[ps->num_levels - 1].allow_gnb_slow = 0; in trinity_apply_state_adjust_rules()
1665 struct trinity_pl *pl = &ps->levels[index]; in trinity_parse_pplib_clock_info()
1975 struct trinity_pl *pl = &ps->levels[i]; in trinity_dpm_print_power_state()
1997 pl = &ps->levels[current_index]; in trinity_dpm_debugfs_print_current_performance_level()
2018 pl = &ps->levels[current_index]; in trinity_dpm_get_current_sclk()
2050 return requested_state->levels[0].sclk; in trinity_dpm_get_sclk()
2052 return requested_state->levels[requested_state->num_levels - 1].sclk; in trinity_dpm_get_sclk()