Lines Matching refs:reg_offset
797 int reg_offset; member
811 .reg_offset = 0,
819 .reg_offset = 0,
827 .reg_offset = 1,
835 .reg_offset = 1,
842 .reg_offset = 1,
849 .reg_offset = 1,
856 .reg_offset = 1,
865 .reg_offset = 2,
872 .reg_offset = 2,
880 .reg_offset = 2,
888 .reg_offset = 0,
896 .reg_offset = 0,
904 .reg_offset = 1,
912 .reg_offset = 1,
920 .reg_offset = 2,
928 .reg_offset = 0,
936 .reg_offset = 0,
943 .reg_offset = 0,
950 .reg_offset = 0,
957 .reg_offset = 0,
964 .reg_offset = 0,
971 .reg_offset = 0,
979 .reg_offset = 1,
988 .reg_offset = 1,
997 .reg_offset = 1,
1006 .reg_offset = 2,
1014 .reg_offset = 2,
1022 .reg_offset = 2,
1030 .reg_offset = 3,
1038 .reg_offset = 3,
1047 .reg_offset = 0,
1056 .reg_offset = 0,
1065 .reg_offset = 0,
1075 .reg_offset = 1,
1084 .reg_offset = 1,
1092 .reg_offset = 0,
1100 .reg_offset = 0,
1108 .reg_offset = 0,
1116 .reg_offset = 0,
1124 .reg_offset = 1,
1132 .reg_offset = 1,
1140 .reg_offset = 0,
1149 .reg_offset = 0,
1157 .reg_offset = 0,
1166 .reg_offset = 0,
1174 .reg_offset = 0,
1182 .reg_offset = 1,
1190 .reg_offset = 1,
1199 .reg_offset = 9,
1209 .reg_offset = 9,
1219 .reg_offset = 9,
1229 .reg_offset = 9,
1239 .reg_offset = 10,
1249 .reg_offset = 10,
1259 .reg_offset = 10,
1269 .reg_offset = 10,
1278 .reg_offset = 0,
1288 .reg_offset = 0,
1298 .reg_offset = 1,
1306 .reg_offset = 1,
1314 .reg_offset = 2,
1322 .reg_offset = 2,
1330 .reg_offset = 3,
1339 .reg_offset = 3,
1348 .reg_offset = 20,
1358 .reg_offset = 21,
1368 .reg_offset = 21,
1378 .reg_offset = 22,
1387 .reg_offset = 23,
1395 .reg_offset = 0,
1402 .reg_offset = 1,
1411 .reg_offset = 2,
1419 .reg_offset = 3,
1427 .reg_offset = 4,
1436 .reg_offset = 5,
1444 .reg_offset = 6,
1453 .reg_offset = 7,
1461 .reg_offset = 8,
2072 int reg_offset = iqs7222_props[i].reg_offset; in iqs7222_parse_props() local
2097 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
2099 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
2107 setup[reg_offset] &= ~BIT(reg_shift); in iqs7222_parse_props()
2109 setup[reg_offset] |= BIT(reg_shift); in iqs7222_parse_props()
2130 setup[reg_offset] &= ~GENMASK(reg_shift + reg_width - 1, in iqs7222_parse_props()
2132 setup[reg_offset] |= (val / val_pitch << reg_shift); in iqs7222_parse_props()
2458 int count, error, reg_offset, i; in iqs7222_parse_sldr() local
2493 reg_offset = dev_desc->sldr_res < U16_MAX ? 0 : 1; in iqs7222_parse_sldr()
2496 sldr_setup[3 + reg_offset] &= ~GENMASK(ext_chan - 1, 0); in iqs7222_parse_sldr()
2499 sldr_setup[5 + reg_offset + i] = 0; in iqs7222_parse_sldr()
2513 sldr_setup[3 + reg_offset] |= BIT(chan_sel[i]); in iqs7222_parse_sldr()
2514 sldr_setup[5 + reg_offset + i] = chan_sel[i] * 42 + 1080; in iqs7222_parse_sldr()
2517 sldr_setup[4 + reg_offset] = dev_desc->touch_link; in iqs7222_parse_sldr()
2519 sldr_setup[4 + reg_offset] -= 2; in iqs7222_parse_sldr()
2529 if (reg_offset) { in iqs7222_parse_sldr()
2542 if (!(reg_offset ? sldr_setup[3] in iqs7222_parse_sldr()
2551 if (val > (reg_offset ? U16_MAX : U8_MAX * 4)) { in iqs7222_parse_sldr()
2557 if (reg_offset) { in iqs7222_parse_sldr()
2573 if (!reg_offset) { in iqs7222_parse_sldr()
2601 if (!reg_offset) in iqs7222_parse_sldr()
2618 if (reg_offset) in iqs7222_parse_sldr()
2637 : sldr_setup[3 + reg_offset], in iqs7222_parse_sldr()
2639 : sldr_setup[4 + reg_offset], in iqs7222_parse_sldr()
2646 if (!reg_offset) in iqs7222_parse_sldr()
2657 if (i && !reg_offset) in iqs7222_parse_sldr()
2659 else if (sldr_setup[4 + reg_offset] == dev_desc->touch_link) in iqs7222_parse_sldr()