Lines Matching refs:rtsx_pci_write_register
50 rtsx_pci_write_register(pcr, SD30_CLK_DRIVE_SEL, in rts5261_fill_driving()
53 rtsx_pci_write_register(pcr, SD30_CMD_DRIVE_SEL, in rts5261_fill_driving()
56 rtsx_pci_write_register(pcr, SD30_DAT_DRIVE_SEL, in rts5261_fill_driving()
63 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rts5261_force_power_down()
64 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rts5261_force_power_down()
65 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rts5261_force_power_down()
69 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rts5261_force_power_down()
73 rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1, in rts5261_force_power_down()
75 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); in rts5261_force_power_down()
76 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_force_power_down()
80 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_force_power_down()
83 rtsx_pci_write_register(pcr, RTS5261_FW_CTL, in rts5261_force_power_down()
85 rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG4, in rts5261_force_power_down()
90 rtsx_pci_write_register(pcr, RTS5261_REG_FPDCTL, in rts5261_force_power_down()
96 return rtsx_pci_write_register(pcr, OLT_LED_CTL, in rts5261_enable_auto_blink()
102 return rtsx_pci_write_register(pcr, OLT_LED_CTL, in rts5261_disable_auto_blink()
108 return rtsx_pci_write_register(pcr, GPIO_CTL, in rts5261_turn_on_led()
114 return rtsx_pci_write_register(pcr, GPIO_CTL, in rts5261_turn_off_led()
146 rtsx_pci_write_register(pcr, SD_CFG1, SD_MODE_SELECT_MASK in rts5261_sd_set_sample_push_timing_sd30()
148 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5261_sd_set_sample_push_timing_sd30()
149 rtsx_pci_write_register(pcr, CARD_CLK_SOURCE, 0xFF, in rts5261_sd_set_sample_push_timing_sd30()
151 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5261_sd_set_sample_push_timing_sd30()
163 rtsx_pci_write_register(pcr, REG_CRC_DUMMY_0, in rts5261_card_power_on()
166 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG1, in rts5261_card_power_on()
168 rtsx_pci_write_register(pcr, RTS5261_LDO1233318_POW_CTL, in rts5261_card_power_on()
171 rtsx_pci_write_register(pcr, RTS5261_LDO1233318_POW_CTL, in rts5261_card_power_on()
176 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN); in rts5261_card_power_on()
179 rtsx_pci_write_register(pcr, SD_CFG1, 0xFF, in rts5261_card_power_on()
182 rtsx_pci_write_register(pcr, SD_SAMPLE_POINT_CTL, in rts5261_card_power_on()
184 rtsx_pci_write_register(pcr, SD_PUSH_POINT_CTL, 0xFF, 0); in rts5261_card_power_on()
185 rtsx_pci_write_register(pcr, CARD_STOP, SD_STOP | SD_CLR_ERR, in rts5261_card_power_on()
189 rtsx_pci_write_register(pcr, SD_CFG3, SD30_CLK_END_EN, 0); in rts5261_card_power_on()
190 rtsx_pci_write_register(pcr, REG_SD_STOP_SDCLK_CFG, in rts5261_card_power_on()
206 rtsx_pci_write_register(pcr, RTS5261_CARD_PWR_CTL, in rts5261_switch_output_voltage()
217 rtsx_pci_write_register(pcr, RTS5261_DV3318_CFG, in rts5261_switch_output_voltage()
219 rtsx_pci_write_register(pcr, SD_PAD_CTL, in rts5261_switch_output_voltage()
229 rtsx_pci_write_register(pcr, RTS5261_DV3318_CFG, in rts5261_switch_output_voltage()
231 rtsx_pci_write_register(pcr, SD_PAD_CTL, in rts5261_switch_output_voltage()
248 rtsx_pci_write_register(pcr, RTS5260_DMA_RST_CTL_0, in rts5261_stop_cmd()
251 rtsx_pci_write_register(pcr, RBCTL, RB_FLUSH, RB_FLUSH); in rts5261_stop_cmd()
266 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_enable_ocp()
269 rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val); in rts5261_enable_ocp()
278 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rts5261_disable_ocp()
279 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_disable_ocp()
289 err = rtsx_pci_write_register(pcr, RTS5261_LDO1233318_POW_CTL, in rts5261_card_power_off()
292 rtsx_pci_write_register(pcr, REG_CRC_DUMMY_0, in rts5261_card_power_off()
307 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_init_ocp()
311 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_init_ocp()
314 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_init_ocp()
320 rtsx_pci_write_register(pcr, REG_OCPGLITCH, mask, val); in rts5261_init_ocp()
324 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_init_ocp()
337 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rts5261_clear_ocpstat()
340 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rts5261_clear_ocpstat()
354 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rts5261_process_ocp()
367 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_init_from_hw()
371 rtsx_pci_write_register(pcr, RTS5261_EFUSE_ADDR, in rts5261_init_from_hw()
373 rtsx_pci_write_register(pcr, RTS5261_EFUSE_CTL, in rts5261_init_from_hw()
392 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_init_from_hw()
441 rtsx_pci_write_register(pcr, 0xFF0C, 0xFF, (u8)(lval1 & 0xFF)); in rts5261_init_from_hw()
442 rtsx_pci_write_register(pcr, 0xFF0D, 0xFF, (u8)((lval1 >> 8) & 0xFF)); in rts5261_init_from_hw()
443 rtsx_pci_write_register(pcr, 0xFF0E, 0xFF, (u8)((lval1 >> 16) & 0xFF)); in rts5261_init_from_hw()
444 rtsx_pci_write_register(pcr, 0xFF0F, 0xFF, (u8)((lval1 >> 24) & 0xFF)); in rts5261_init_from_hw()
445 rtsx_pci_write_register(pcr, 0xFF10, 0xFF, (u8)(lval2 & 0xFF)); in rts5261_init_from_hw()
446 rtsx_pci_write_register(pcr, 0xFF11, 0xFF, (u8)((lval2 >> 8) & 0xFF)); in rts5261_init_from_hw()
447 rtsx_pci_write_register(pcr, 0xFF12, 0xFF, (u8)((lval2 >> 16) & 0xFF)); in rts5261_init_from_hw()
470 rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1, in rts5261_extra_init_hw()
477 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_extra_init_hw()
479 rtsx_pci_write_register(pcr, L1SUB_CONFIG1, in rts5261_extra_init_hw()
481 rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, 0); in rts5261_extra_init_hw()
487 rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG4, in rts5261_extra_init_hw()
491 rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG4, in rts5261_extra_init_hw()
493 rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, in rts5261_extra_init_hw()
496 rtsx_pci_write_register(pcr, PCLK_CTL, in rts5261_extra_init_hw()
499 rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0); in rts5261_extra_init_hw()
500 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, CLK_PM_EN, CLK_PM_EN); in rts5261_extra_init_hw()
503 rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x0F, 0x02); in rts5261_extra_init_hw()
509 rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x30); in rts5261_extra_init_hw()
511 rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00); in rts5261_extra_init_hw()
518 rtsx_pci_write_register(pcr, PETXCFG, in rts5261_extra_init_hw()
521 rtsx_pci_write_register(pcr, PETXCFG, in rts5261_extra_init_hw()
524 rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFB); in rts5261_extra_init_hw()
527 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x01); in rts5261_extra_init_hw()
528 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_extra_init_hw()
532 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); in rts5261_extra_init_hw()
533 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_extra_init_hw()
536 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, D3_DELINK_MODE_EN, 0x00); in rts5261_extra_init_hw()
539 rtsx_pci_write_register(pcr, RTS5261_FW_CTL, in rts5261_extra_init_hw()
554 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val); in rts5261_enable_aspm()
570 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val); in rts5261_disable_aspm()
571 rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); in rts5261_disable_aspm()
656 err = rtsx_pci_write_register(pcr, SD_CFG1, in rts5261_pci_switch_clock()
753 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5261_pci_switch_clock()