Lines Matching refs:rtsx_pci_write_register
49 rtsx_pci_write_register(pcr, SD30_CLK_DRIVE_SEL, in rts5264_fill_driving()
51 rtsx_pci_write_register(pcr, SD30_CMD_DRIVE_SEL, in rts5264_fill_driving()
53 rtsx_pci_write_register(pcr, SD30_DAT_DRIVE_SEL, in rts5264_fill_driving()
60 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rts5264_force_power_down()
61 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rts5264_force_power_down()
62 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rts5264_force_power_down()
66 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rts5264_force_power_down()
70 rtsx_pci_write_register(pcr, RTS5264_AUTOLOAD_CFG1, in rts5264_force_power_down()
72 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); in rts5264_force_power_down()
73 rtsx_pci_write_register(pcr, RTS5264_REG_PME_FORCE_CTL, in rts5264_force_power_down()
76 rtsx_pci_write_register(pcr, RTS5264_REG_PME_FORCE_CTL, in rts5264_force_power_down()
78 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x01); in rts5264_force_power_down()
79 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rts5264_force_power_down()
81 rtsx_pci_write_register(pcr, RTS5264_FW_CTL, in rts5264_force_power_down()
83 rtsx_pci_write_register(pcr, RTS5264_AUTOLOAD_CFG4, in rts5264_force_power_down()
87 rtsx_pci_write_register(pcr, RTS5264_REG_FPDCTL, in rts5264_force_power_down()
93 return rtsx_pci_write_register(pcr, OLT_LED_CTL, in rts5264_enable_auto_blink()
99 return rtsx_pci_write_register(pcr, OLT_LED_CTL, in rts5264_disable_auto_blink()
105 return rtsx_pci_write_register(pcr, GPIO_CTL, in rts5264_turn_on_led()
111 return rtsx_pci_write_register(pcr, GPIO_CTL, in rts5264_turn_off_led()
143 rtsx_pci_write_register(pcr, SD_CFG1, SD_MODE_SELECT_MASK in rts5264_sd_set_sample_push_timing_sd30()
145 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5264_sd_set_sample_push_timing_sd30()
146 rtsx_pci_write_register(pcr, CARD_CLK_SOURCE, 0xFF, in rts5264_sd_set_sample_push_timing_sd30()
148 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5264_sd_set_sample_push_timing_sd30()
160 rtsx_pci_write_register(pcr, REG_CRC_DUMMY_0, in rts5264_card_power_on()
163 rtsx_pci_write_register(pcr, RTS5264_LDO1_CFG1, in rts5264_card_power_on()
165 rtsx_pci_write_register(pcr, RTS5264_LDO1233318_POW_CTL, in rts5264_card_power_on()
167 rtsx_pci_write_register(pcr, RTS5264_LDO1233318_POW_CTL, in rts5264_card_power_on()
172 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN); in rts5264_card_power_on()
175 rtsx_pci_write_register(pcr, SD_CFG1, 0xFF, in rts5264_card_power_on()
177 rtsx_pci_write_register(pcr, SD_SAMPLE_POINT_CTL, in rts5264_card_power_on()
179 rtsx_pci_write_register(pcr, SD_PUSH_POINT_CTL, 0xFF, 0); in rts5264_card_power_on()
180 rtsx_pci_write_register(pcr, CARD_STOP, SD_STOP | SD_CLR_ERR, in rts5264_card_power_on()
184 rtsx_pci_write_register(pcr, SD_CFG3, SD30_CLK_END_EN, 0); in rts5264_card_power_on()
185 rtsx_pci_write_register(pcr, REG_SD_STOP_SDCLK_CFG, in rts5264_card_power_on()
198 rtsx_pci_write_register(pcr, RTS5264_CARD_PWR_CTL, in rts5264_switch_output_voltage()
203 rtsx_pci_write_register(pcr, RTS5264_LDO1233318_POW_CTL, in rts5264_switch_output_voltage()
205 rtsx_pci_write_register(pcr, RTS5264_DV3318_CFG, in rts5264_switch_output_voltage()
207 rtsx_pci_write_register(pcr, SD_PAD_CTL, in rts5264_switch_output_voltage()
211 rtsx_pci_write_register(pcr, RTS5264_LDO1233318_POW_CTL, in rts5264_switch_output_voltage()
213 rtsx_pci_write_register(pcr, RTS5264_DV3318_CFG, in rts5264_switch_output_voltage()
215 rtsx_pci_write_register(pcr, SD_PAD_CTL, in rts5264_switch_output_voltage()
232 rtsx_pci_write_register(pcr, DMACTL, DMA_RST, DMA_RST); in rts5264_stop_cmd()
233 rtsx_pci_write_register(pcr, RBCTL, RB_FLUSH, RB_FLUSH); in rts5264_stop_cmd()
247 err = rtsx_pci_write_register(pcr, RTS5264_LDO1233318_POW_CTL, in rts5264_card_power_off()
250 rtsx_pci_write_register(pcr, REG_CRC_DUMMY_0, in rts5264_card_power_off()
263 rtsx_pci_write_register(pcr, RTS5264_LDO1_CFG0, in rts5264_enable_ocp()
266 rtsx_pci_write_register(pcr, RTS5264_LDO2_CFG0, in rts5264_enable_ocp()
269 rtsx_pci_write_register(pcr, RTS5264_LDO3_CFG0, in rts5264_enable_ocp()
272 rtsx_pci_write_register(pcr, RTS5264_OVP_DET, in rts5264_enable_ocp()
278 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rts5264_enable_ocp()
282 rtsx_pci_write_register(pcr, RTS5264_OCP_VDD3_CTL, mask, val); in rts5264_enable_ocp()
286 rtsx_pci_write_register(pcr, RTS5264_OVP_CTL, mask, val); in rts5264_enable_ocp()
295 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rts5264_disable_ocp()
298 rtsx_pci_write_register(pcr, RTS5264_OCP_VDD3_CTL, mask, 0); in rts5264_disable_ocp()
301 rtsx_pci_write_register(pcr, RTS5264_OVP_CTL, mask, 0); in rts5264_disable_ocp()
303 rtsx_pci_write_register(pcr, RTS5264_LDO1_CFG0, in rts5264_disable_ocp()
305 rtsx_pci_write_register(pcr, RTS5264_LDO2_CFG0, in rts5264_disable_ocp()
307 rtsx_pci_write_register(pcr, RTS5264_LDO3_CFG0, in rts5264_disable_ocp()
309 rtsx_pci_write_register(pcr, RTS5264_OVP_DET, RTS5264_POW_VDET, 0); in rts5264_disable_ocp()
319 rtsx_pci_write_register(pcr, RTS5264_LDO1_CFG0, in rts5264_init_ocp()
321 rtsx_pci_write_register(pcr, RTS5264_LDO1_CFG0, in rts5264_init_ocp()
325 rtsx_pci_write_register(pcr, RTS5264_LDO2_CFG0, in rts5264_init_ocp()
327 rtsx_pci_write_register(pcr, RTS5264_LDO2_CFG0, in rts5264_init_ocp()
331 rtsx_pci_write_register(pcr, RTS5264_LDO3_CFG0, in rts5264_init_ocp()
333 rtsx_pci_write_register(pcr, RTS5264_LDO3_CFG0, in rts5264_init_ocp()
337 rtsx_pci_write_register(pcr, RTS5264_OVP_DET, in rts5264_init_ocp()
342 rtsx_pci_write_register(pcr, REG_OCPGLITCH, mask, val); in rts5264_init_ocp()
345 rtsx_pci_write_register(pcr, RTS5264_LDO1_CFG0, in rts5264_init_ocp()
347 rtsx_pci_write_register(pcr, RTS5264_LDO2_CFG0, in rts5264_init_ocp()
349 rtsx_pci_write_register(pcr, RTS5264_LDO3_CFG0, in rts5264_init_ocp()
351 rtsx_pci_write_register(pcr, RTS5264_OVP_DET, in rts5264_init_ocp()
374 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rts5264_clear_ocpstat()
375 rtsx_pci_write_register(pcr, RTS5264_OCP_VDD3_CTL, in rts5264_clear_ocpstat()
378 rtsx_pci_write_register(pcr, RTS5264_OVP_CTL, in rts5264_clear_ocpstat()
384 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rts5264_clear_ocpstat()
385 rtsx_pci_write_register(pcr, RTS5264_OCP_VDD3_CTL, in rts5264_clear_ocpstat()
387 rtsx_pci_write_register(pcr, RTS5264_OVP_CTL, in rts5264_clear_ocpstat()
405 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rts5264_process_ocp()
419 rtsx_pci_write_register(pcr, RTS5264_REG_PME_FORCE_CTL, in rts5264_init_from_hw()
423 rtsx_pci_write_register(pcr, RTS5264_EFUSE_ADDR, in rts5264_init_from_hw()
425 rtsx_pci_write_register(pcr, RTS5264_EFUSE_CTL, in rts5264_init_from_hw()
444 rtsx_pci_write_register(pcr, RTS5264_REG_PME_FORCE_CTL, in rts5264_init_from_hw()
488 rtsx_pci_write_register(pcr, 0xFF0C, 0xFF, (u8)(lval1 & 0xFF)); in rts5264_init_from_hw()
489 rtsx_pci_write_register(pcr, 0xFF0D, 0xFF, (u8)((lval1 >> 8) & 0xFF)); in rts5264_init_from_hw()
490 rtsx_pci_write_register(pcr, 0xFF0E, 0xFF, (u8)((lval1 >> 16) & 0xFF)); in rts5264_init_from_hw()
491 rtsx_pci_write_register(pcr, 0xFF0F, 0xFF, (u8)((lval1 >> 24) & 0xFF)); in rts5264_init_from_hw()
492 rtsx_pci_write_register(pcr, 0xFF10, 0xFF, (u8)(lval2 & 0xFF)); in rts5264_init_from_hw()
493 rtsx_pci_write_register(pcr, 0xFF11, 0xFF, (u8)((lval2 >> 8) & 0xFF)); in rts5264_init_from_hw()
494 rtsx_pci_write_register(pcr, 0xFF12, 0xFF, (u8)((lval2 >> 16) & 0xFF)); in rts5264_init_from_hw()
512 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0); in rts5264_init_from_cfg()
524 rtsx_pci_write_register(pcr, RTS5264_AUTOLOAD_CFG1, in rts5264_extra_init_hw()
526 rtsx_pci_write_register(pcr, REG_VREF, PWD_SUSPND_EN, PWD_SUSPND_EN); in rts5264_extra_init_hw()
532 rtsx_pci_write_register(pcr, RTS5264_REG_PME_FORCE_CTL, in rts5264_extra_init_hw()
534 rtsx_pci_write_register(pcr, RTS5264_AUTOLOAD_CFG2, in rts5264_extra_init_hw()
536 rtsx_pci_write_register(pcr, RTS5264_REG_LDO12_CFG, in rts5264_extra_init_hw()
538 rtsx_pci_write_register(pcr, CDGW, 0xFF, 0x01); in rts5264_extra_init_hw()
539 rtsx_pci_write_register(pcr, RTS5264_CKMUX_MBIAS_PWR, in rts5264_extra_init_hw()
541 rtsx_pci_write_register(pcr, RTS5264_CMD_OE_START_EARLY, in rts5264_extra_init_hw()
544 rtsx_pci_write_register(pcr, RTS5264_DAT_OE_START_EARLY, in rts5264_extra_init_hw()
547 rtsx_pci_write_register(pcr, SSC_DIV_N_0, 0xFF, 0x5D); in rts5264_extra_init_hw()
549 rtsx_pci_write_register(pcr, RTS5264_PWR_CUT, in rts5264_extra_init_hw()
551 rtsx_pci_write_register(pcr, L1SUB_CONFIG1, in rts5264_extra_init_hw()
553 rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, 0); in rts5264_extra_init_hw()
554 rtsx_pci_write_register(pcr, RTS5264_AUTOLOAD_CFG4, in rts5264_extra_init_hw()
558 rtsx_pci_write_register(pcr, RTS5264_AUTOLOAD_CFG4, in rts5264_extra_init_hw()
560 rtsx_pci_write_register(pcr, PCLK_CTL, in rts5264_extra_init_hw()
564 rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x0F, 0x02); in rts5264_extra_init_hw()
570 rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x30); in rts5264_extra_init_hw()
572 rtsx_pci_write_register(pcr, PETXCFG, 0x30, 0x00); in rts5264_extra_init_hw()
579 rtsx_pci_write_register(pcr, PETXCFG, in rts5264_extra_init_hw()
582 rtsx_pci_write_register(pcr, PETXCFG, in rts5264_extra_init_hw()
585 rtsx_pci_write_register(pcr, PWD_SUSPEND_EN, 0xFF, 0xFF); in rts5264_extra_init_hw()
586 rtsx_pci_write_register(pcr, RBCTL, U_AUTO_DMA_EN_MASK, 0); in rts5264_extra_init_hw()
587 rtsx_pci_write_register(pcr, RTS5264_AUTOLOAD_CFG4, in rts5264_extra_init_hw()
591 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); in rts5264_extra_init_hw()
592 rtsx_pci_write_register(pcr, RTS5264_REG_PME_FORCE_CTL, in rts5264_extra_init_hw()
595 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x01, 0x00); in rts5264_extra_init_hw()
596 rtsx_pci_write_register(pcr, RTS5264_REG_PME_FORCE_CTL, in rts5264_extra_init_hw()
599 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, D3_DELINK_MODE_EN, 0x00); in rts5264_extra_init_hw()
602 rtsx_pci_write_register(pcr, RTS5264_FW_CTL, in rts5264_extra_init_hw()
617 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val); in rts5264_enable_aspm()
633 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, mask, val); in rts5264_disable_aspm()
634 rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); in rts5264_disable_aspm()
726 err = rtsx_pci_write_register(pcr, SD_CFG1, in rts5264_pci_switch_clock()
833 err = rtsx_pci_write_register(pcr, CLK_CTL, CHANGE_CLK, 0); in rts5264_pci_switch_clock()