Lines Matching refs:phy_write_mmd
880 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_DEVID1, 0xB61A); in ksz8061_config_init()
1068 return phy_write_mmd(phydev, 2, reg, newval); in ksz9031_of_load_skew_values()
1076 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_HI, in ksz9031_center_flp_timing()
1081 result = phy_write_mmd(phydev, 0, MII_KSZ9031RN_FLP_BURST_TX_LO, in ksz9031_center_flp_timing()
1097 return phy_write_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD, in ksz9031_enable_edpd()
1135 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_CONTROL_PAD_SKEW, in ksz9031_config_rgmii_delay()
1141 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_RX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay()
1149 ret = phy_write_mmd(phydev, 2, MII_KSZ9031RN_TX_DATA_PAD_SKEW, in ksz9031_config_rgmii_delay()
1157 return phy_write_mmd(phydev, 2, MII_KSZ9031RN_CLK_PAD_SKEW, in ksz9031_config_rgmii_delay()
1310 return phy_write_mmd(phydev, 2, reg, newval); in ksz9131_of_load_skew_values()
1980 err = phy_write_mmd(phydev, errata->dev_addr, errata->reg_addr, errata->val); in ksz9477_phy_errata()
2168 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_DEVID1, 0xB61A); in ksz8061_resume()
4054 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4056 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4058 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4060 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4062 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4064 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4068 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4070 phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init()
4074 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4077 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4087 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4090 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4101 phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG, in lan8841_config_init()
4106 phy_write_mmd(phydev, MDIO_MMD_PMAPMD, in lan8841_config_init()
4108 phy_write_mmd(phydev, LAN8841_MMD_TIMER_REG, in lan8841_config_init()
4238 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_SEL, in lan8841_gpio_process_cap()
4262 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_SEL, 0); in lan8841_gpio_process_cap()
4450 phy_write_mmd(phydev, 2, LAN8841_PTP_RX_PARSE_CONFIG, rxcfg); in lan8841_hwtstamp()
4451 phy_write_mmd(phydev, 2, LAN8841_PTP_TX_PARSE_CONFIG, txcfg); in lan8841_hwtstamp()
4455 phy_write_mmd(phydev, 2, LAN8841_PTP_RX_TIMESTAMP_EN, pkt_ts_enable); in lan8841_hwtstamp()
4456 phy_write_mmd(phydev, 2, LAN8841_PTP_TX_TIMESTAMP_EN, pkt_ts_enable); in lan8841_hwtstamp()
4533 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_SEC_HI(event), in lan8841_ptp_set_target()
4538 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_SEC_LO(event), in lan8841_ptp_set_target()
4543 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_NS_HI(event) & 0x3fff, in lan8841_ptp_set_target()
4548 return phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_NS_LO(event), in lan8841_ptp_set_target()
4572 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_SEC_HI(event), in lan8841_ptp_set_reload()
4577 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_SEC_LO(event), in lan8841_ptp_set_reload()
4582 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_NS_HI(event) & 0x3fff, in lan8841_ptp_set_reload()
4587 return phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_TARGET_RELOAD_NS_LO(event), in lan8841_ptp_set_reload()
4609 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_LO, lower_16_bits(ts->tv_sec)); in lan8841_ptp_settime64()
4610 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_MID, upper_16_bits(ts->tv_sec)); in lan8841_ptp_settime64()
4611 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_SEC_HI, upper_32_bits(ts->tv_sec) & 0xffff); in lan8841_ptp_settime64()
4612 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_NS_LO, lower_16_bits(ts->tv_nsec)); in lan8841_ptp_settime64()
4613 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_SET_NS_HI, upper_16_bits(ts->tv_nsec) & 0x3fff); in lan8841_ptp_settime64()
4616 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_settime64()
4646 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_gettime64()
4675 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_getseconds()
4751 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_LO, sec); in lan8841_ptp_adjtime()
4752 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_HI, in lan8841_ptp_adjtime()
4754 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_adjtime()
4759 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_LO, in lan8841_ptp_adjtime()
4761 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_STEP_ADJ_HI, in lan8841_ptp_adjtime()
4763 phy_write_mmd(phydev, 2, LAN8841_PTP_CMD_CTL, in lan8841_ptp_adjtime()
4801 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_RATE_ADJ_HI, in lan8841_ptp_adjfine()
4804 phy_write_mmd(phydev, 2, LAN8841_PTP_LTC_RATE_ADJ_LO, lower_16_bits(rate)); in lan8841_ptp_adjfine()
5110 ret = phy_write_mmd(phydev, 2, LAN8841_PTP_GPIO_CAP_EN, tmp); in lan8841_ptp_extts_on()