Lines Matching refs:membase
387 return readl(port->membase + off); in lpuart32_read()
389 return ioread32be(port->membase + off); in lpuart32_read()
400 writel(val, port->membase + off); in lpuart32_write()
403 iowrite32be(val, port->membase + off); in lpuart32_write()
445 temp = readb(port->membase + UARTCR2); in lpuart_stop_tx()
447 writeb(temp, port->membase + UARTCR2); in lpuart_stop_tx()
463 temp = readb(port->membase + UARTCR2); in lpuart_stop_rx()
464 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2); in lpuart_stop_rx()
617 val = readb(sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
619 writeb(val, sport->port.membase + UARTCFIFO); in lpuart_flush_buffer()
626 while (!(readb(port->membase + offset) & bit)) in lpuart_wait_bit_set()
650 writeb(0, sport->port.membase + UARTCR2); in lpuart_poll_init()
652 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_poll_init()
655 sport->port.membase + UARTPFIFO); in lpuart_poll_init()
659 sport->port.membase + UARTCFIFO); in lpuart_poll_init()
662 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_poll_init()
663 readb(sport->port.membase + UARTDR); in lpuart_poll_init()
664 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_poll_init()
667 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_poll_init()
668 writeb(1, sport->port.membase + UARTRWFIFO); in lpuart_poll_init()
671 writeb(UARTCR2_RE | UARTCR2_TE, sport->port.membase + UARTCR2); in lpuart_poll_init()
681 writeb(c, port->membase + UARTDR); in lpuart_poll_put_char()
686 if (!(readb(port->membase + UARTSR1) & UARTSR1_RDRF)) in lpuart_poll_get_char()
689 return readb(port->membase + UARTDR); in lpuart_poll_get_char()
747 readb(port->membase + UARTTCFIFO) < sport->txfifo_size, in lpuart_transmit_buffer()
748 writeb(ch, port->membase + UARTDR)); in lpuart_transmit_buffer()
793 temp = readb(port->membase + UARTCR2); in lpuart_start_tx()
794 writeb(temp | UARTCR2_TIE, port->membase + UARTCR2); in lpuart_start_tx()
800 if (readb(port->membase + UARTSR1) & UARTSR1_TDRE) in lpuart_start_tx()
841 unsigned char sr1 = readb(port->membase + UARTSR1); in lpuart_tx_empty()
842 unsigned char sfifo = readb(port->membase + UARTSFIFO); in lpuart_tx_empty()
890 while (!(readb(sport->port.membase + UARTSFIFO) & UARTSFIFO_RXEMPT)) { in lpuart_rxint()
897 sr = readb(sport->port.membase + UARTSR1); in lpuart_rxint()
898 rx = readb(sport->port.membase + UARTDR); in lpuart_rxint()
943 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_rxint()
944 writeb(UARTSFIFO_RXOF, sport->port.membase + UARTSFIFO); in lpuart_rxint()
1043 sts = readb(sport->port.membase + UARTSR1); in lpuart_int()
1047 readb(sport->port.membase + UARTDR); in lpuart_int()
1050 writeb(UARTCFIFO_RXFLUSH, sport->port.membase + UARTCFIFO); in lpuart_int()
1127 unsigned char sr = readb(sport->port.membase + UARTSR1); in lpuart_copy_rx_to_tty()
1133 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1135 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1138 readb(sport->port.membase + UARTDR); in lpuart_copy_rx_to_tty()
1153 if (readb(sport->port.membase + UARTSFIFO) & in lpuart_copy_rx_to_tty()
1156 sport->port.membase + UARTSFIFO); in lpuart_copy_rx_to_tty()
1158 sport->port.membase + UARTCFIFO); in lpuart_copy_rx_to_tty()
1162 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_copy_rx_to_tty()
1423 writeb(readb(sport->port.membase + UARTCR5) | UARTCR5_RDMAS, in lpuart_start_rx_dma()
1424 sport->port.membase + UARTCR5); in lpuart_start_rx_dma()
1454 u8 modem = readb(sport->port.membase + UARTMODEM) & in lpuart_config_rs485()
1456 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1474 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_config_rs485()
1513 reg = readb(port->membase + UARTCR1); in lpuart_get_mctrl()
1536 reg = readb(port->membase + UARTCR1); in lpuart_set_mctrl()
1543 writeb(reg, port->membase + UARTCR1); in lpuart_set_mctrl()
1564 temp = readb(port->membase + UARTCR2) & ~UARTCR2_SBK; in lpuart_break_ctl()
1569 writeb(temp, port->membase + UARTCR2); in lpuart_break_ctl()
1611 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1615 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1617 val = readb(sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1619 sport->port.membase + UARTPFIFO); in lpuart_setup_watermark()
1623 sport->port.membase + UARTCFIFO); in lpuart_setup_watermark()
1626 if (readb(sport->port.membase + UARTSR1) & UARTSR1_RDRF) { in lpuart_setup_watermark()
1627 readb(sport->port.membase + UARTDR); in lpuart_setup_watermark()
1628 writeb(UARTSFIFO_RXUF, sport->port.membase + UARTSFIFO); in lpuart_setup_watermark()
1633 writeb(0, sport->port.membase + UARTTWFIFO); in lpuart_setup_watermark()
1634 writeb(sport->rx_watermark, sport->port.membase + UARTRWFIFO); in lpuart_setup_watermark()
1637 writeb(cr2_saved, sport->port.membase + UARTCR2); in lpuart_setup_watermark()
1646 cr2 = readb(sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1648 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_setup_watermark_enable()
1750 writeb(readb(sport->port.membase + UARTCR5) | in lpuart_tx_dma_startup()
1751 UARTCR5_TDMAS, sport->port.membase + UARTCR5); in lpuart_tx_dma_startup()
1785 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1787 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_rx_dma_startup()
1816 temp = readb(sport->port.membase + UARTPFIFO); in lpuart_startup()
1933 temp = readb(port->membase + UARTCR2); in lpuart_shutdown()
1936 writeb(temp, port->membase + UARTCR2); in lpuart_shutdown()
1983 cr1 = old_cr1 = readb(sport->port.membase + UARTCR1); in lpuart_set_termios()
1984 old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_set_termios()
1985 cr3 = readb(sport->port.membase + UARTCR3); in lpuart_set_termios()
1986 cr4 = readb(sport->port.membase + UARTCR4); in lpuart_set_termios()
1987 bdh = readb(sport->port.membase + UARTBDH); in lpuart_set_termios()
1988 modem = readb(sport->port.membase + UARTMODEM); in lpuart_set_termios()
2097 sport->port.membase + UARTCR2); in lpuart_set_termios()
2105 writeb(cr4 | brfa, sport->port.membase + UARTCR4); in lpuart_set_termios()
2106 writeb(bdh, sport->port.membase + UARTBDH); in lpuart_set_termios()
2107 writeb(sbr & 0xFF, sport->port.membase + UARTBDL); in lpuart_set_termios()
2108 writeb(cr3, sport->port.membase + UARTCR3); in lpuart_set_termios()
2109 writeb(cr1, sport->port.membase + UARTCR1); in lpuart_set_termios()
2110 writeb(modem, sport->port.membase + UARTMODEM); in lpuart_set_termios()
2113 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_set_termios()
2460 writeb(ch, port->membase + UARTDR); in lpuart_console_putchar()
2483 cr2 = old_cr2 = readb(sport->port.membase + UARTCR2); in lpuart_console_write()
2486 writeb(cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2493 writeb(old_cr2, sport->port.membase + UARTCR2); in lpuart_console_write()
2540 cr = readb(sport->port.membase + UARTCR2); in lpuart_console_get_options()
2547 cr = readb(sport->port.membase + UARTCR1); in lpuart_console_get_options()
2562 bdh = readb(sport->port.membase + UARTBDH); in lpuart_console_get_options()
2564 bdl = readb(sport->port.membase + UARTBDL); in lpuart_console_get_options()
2568 brfa = readb(sport->port.membase + UARTCR4); in lpuart_console_get_options()
2702 if (!device->port.membase) in lpuart_early_console_setup()
2712 if (!device->port.membase) in lpuart32_early_console_setup()
2727 if (!device->port.membase) in ls1028a_early_console_setup()
2749 if (!device->port.membase) in lpuart32_imx_early_console_setup()
2753 device->port.membase += IMX_REG_OFF; in lpuart32_imx_early_console_setup()
2819 global_addr = port->membase + UART_GLOBAL - IMX_REG_OFF; in lpuart_global_reset()
2849 sport->port.membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res); in lpuart_probe()
2850 if (IS_ERR(sport->port.membase)) in lpuart_probe()
2851 return PTR_ERR(sport->port.membase); in lpuart_probe()
2853 sport->port.membase += sdata->reg_off; in lpuart_probe()
3017 val = readb(sport->port.membase + UARTCR2); in serial_lpuart_enable_wakeup()
3022 writeb(val, sport->port.membase + UARTCR2); in serial_lpuart_enable_wakeup()
3096 temp = readb(sport->port.membase + UARTCR2); in lpuart_suspend()
3098 writeb(temp, sport->port.membase + UARTCR2); in lpuart_suspend()
3119 writeb(readb(sport->port.membase + UARTCR5) & in lpuart_suspend()
3120 ~UARTCR5_RDMAS, sport->port.membase + UARTCR5); in lpuart_suspend()
3132 temp = readb(sport->port.membase + UARTCR5); in lpuart_suspend()
3134 writeb(temp, sport->port.membase + UARTCR5); in lpuart_suspend()