Lines Matching refs:fifo_size
212 int fifo_size; member
491 unsigned int fifo_size, unsigned int trigger) in pch_uart_hal_set_fifo() argument
501 if (fifo_size & ~(PCH_UART_FCR_FIFOE | PCH_UART_FCR_FIFO256)) { in pch_uart_hal_set_fifo()
503 __func__, fifo_size); in pch_uart_hal_set_fifo()
513 switch (priv->fifo_size) { in pch_uart_hal_set_fifo()
532 dmamode | fifo_size | trigger | PCH_UART_FCR_RFR | PCH_UART_FCR_TFR; in pch_uart_hal_set_fifo()
812 int fifo_size; in handle_tx() local
823 fifo_size = max(priv->fifo_size, 1); in handle_tx()
830 fifo_size--; in handle_tx()
833 while (!uart_tx_stopped(port) && fifo_size && in handle_tx()
836 fifo_size--; in handle_tx()
856 int fifo_size; in dma_handle_tx() local
880 fifo_size = max(priv->fifo_size, 1); in dma_handle_tx()
886 fifo_size--; in dma_handle_tx()
897 if (bytes > fifo_size) { in dma_handle_tx()
898 num = bytes / fifo_size + 1; in dma_handle_tx()
899 size = fifo_size; in dma_handle_tx()
900 rem = bytes % fifo_size; in dma_handle_tx()
924 rem, fifo_size * i); in dma_handle_tx()
927 size, fifo_size * i); in dma_handle_tx()
940 sg->offset = tail + fifo_size * i; in dma_handle_tx()
1193 int fifo_size; in pch_uart_startup() local
1211 switch (priv->fifo_size) { in pch_uart_startup()
1213 fifo_size = PCH_UART_HAL_FIFO256; in pch_uart_startup()
1216 fifo_size = PCH_UART_HAL_FIFO64; in pch_uart_startup()
1219 fifo_size = PCH_UART_HAL_FIFO16; in pch_uart_startup()
1223 fifo_size = PCH_UART_HAL_FIFO_DIS; in pch_uart_startup()
1232 trigger_level = priv->fifo_size / 4; in pch_uart_startup()
1235 trigger_level = priv->fifo_size / 2; in pch_uart_startup()
1239 trigger_level = priv->fifo_size - (priv->fifo_size / 8); in pch_uart_startup()
1245 fifo_size, priv->trigger); in pch_uart_startup()
1326 if ((termios->c_cflag & CRTSCTS) && (priv->fifo_size == 256)) in pch_uart_set_termios()
1687 priv->fifo_size = fifosize; in pch_uart_init_port()