Lines Matching refs:gc
39 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_disable_reg() local
43 irq_gc_lock(gc); in irq_gc_mask_disable_reg()
44 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
46 irq_gc_unlock(gc); in irq_gc_mask_disable_reg()
59 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_set_bit() local
63 irq_gc_lock(gc); in irq_gc_mask_set_bit()
65 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_set_bit()
66 irq_gc_unlock(gc); in irq_gc_mask_set_bit()
79 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_clr_bit() local
83 irq_gc_lock(gc); in irq_gc_mask_clr_bit()
85 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_clr_bit()
86 irq_gc_unlock(gc); in irq_gc_mask_clr_bit()
99 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_unmask_enable_reg() local
103 irq_gc_lock(gc); in irq_gc_unmask_enable_reg()
104 irq_reg_writel(gc, mask, ct->regs.enable); in irq_gc_unmask_enable_reg()
106 irq_gc_unlock(gc); in irq_gc_unmask_enable_reg()
116 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_ack_set_bit() local
120 irq_gc_lock(gc); in irq_gc_ack_set_bit()
121 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_ack_set_bit()
122 irq_gc_unlock(gc); in irq_gc_ack_set_bit()
132 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_ack_clr_bit() local
136 irq_gc_lock(gc); in irq_gc_ack_clr_bit()
137 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_ack_clr_bit()
138 irq_gc_unlock(gc); in irq_gc_ack_clr_bit()
155 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_mask_disable_and_ack_set() local
159 irq_gc_lock(gc); in irq_gc_mask_disable_and_ack_set()
160 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_and_ack_set()
162 irq_reg_writel(gc, mask, ct->regs.ack); in irq_gc_mask_disable_and_ack_set()
163 irq_gc_unlock(gc); in irq_gc_mask_disable_and_ack_set()
172 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_eoi() local
176 irq_gc_lock(gc); in irq_gc_eoi()
177 irq_reg_writel(gc, mask, ct->regs.eoi); in irq_gc_eoi()
178 irq_gc_unlock(gc); in irq_gc_eoi()
192 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_gc_set_wake() local
195 if (!(mask & gc->wake_enabled)) in irq_gc_set_wake()
198 irq_gc_lock(gc); in irq_gc_set_wake()
200 gc->wake_active |= mask; in irq_gc_set_wake()
202 gc->wake_active &= ~mask; in irq_gc_set_wake()
203 irq_gc_unlock(gc); in irq_gc_set_wake()
218 void irq_init_generic_chip(struct irq_chip_generic *gc, const char *name, in irq_init_generic_chip() argument
222 struct irq_chip_type *ct = gc->chip_types; in irq_init_generic_chip()
225 raw_spin_lock_init(&gc->lock); in irq_init_generic_chip()
226 gc->num_ct = num_ct; in irq_init_generic_chip()
227 gc->irq_base = irq_base; in irq_init_generic_chip()
228 gc->reg_base = reg_base; in irq_init_generic_chip()
231 gc->chip_types->handler = handler; in irq_init_generic_chip()
249 struct irq_chip_generic *gc; in irq_alloc_generic_chip() local
251 gc = kzalloc(struct_size(gc, chip_types, num_ct), GFP_KERNEL); in irq_alloc_generic_chip()
252 if (gc) { in irq_alloc_generic_chip()
253 irq_init_generic_chip(gc, name, num_ct, irq_base, reg_base, in irq_alloc_generic_chip()
256 return gc; in irq_alloc_generic_chip()
261 irq_gc_init_mask_cache(struct irq_chip_generic *gc, enum irq_gc_flags flags) in irq_gc_init_mask_cache() argument
263 struct irq_chip_type *ct = gc->chip_types; in irq_gc_init_mask_cache()
264 u32 *mskptr = &gc->mask_cache, mskreg = ct->regs.mask; in irq_gc_init_mask_cache()
267 for (i = 0; i < gc->num_ct; i++) { in irq_gc_init_mask_cache()
274 *mskptr = irq_reg_readl(gc, mskreg); in irq_gc_init_mask_cache()
289 struct irq_chip_generic *gc; in irq_domain_alloc_generic_chips() local
298 if (d->gc) in irq_domain_alloc_generic_chips()
306 gc_sz = struct_size(gc, chip_types, info->num_ct); in irq_domain_alloc_generic_chips()
307 dgc_sz = struct_size(dgc, gc, numchips); in irq_domain_alloc_generic_chips()
319 d->gc = dgc; in irq_domain_alloc_generic_chips()
325 dgc->gc[i] = gc = tmp; in irq_domain_alloc_generic_chips()
326 irq_init_generic_chip(gc, info->name, info->num_ct, in irq_domain_alloc_generic_chips()
330 gc->domain = d; in irq_domain_alloc_generic_chips()
332 gc->reg_readl = &irq_readl_be; in irq_domain_alloc_generic_chips()
333 gc->reg_writel = &irq_writel_be; in irq_domain_alloc_generic_chips()
337 ret = info->init(gc); in irq_domain_alloc_generic_chips()
343 list_add_tail(&gc->list, &gc_list); in irq_domain_alloc_generic_chips()
353 dgc->exit(dgc->gc[i]); in irq_domain_alloc_generic_chips()
354 irq_remove_generic_chip(dgc->gc[i], ~0U, 0, 0); in irq_domain_alloc_generic_chips()
356 d->gc = NULL; in irq_domain_alloc_generic_chips()
368 struct irq_domain_chip_generic *dgc = d->gc; in irq_domain_remove_generic_chips()
376 dgc->exit(dgc->gc[i]); in irq_domain_remove_generic_chips()
377 irq_remove_generic_chip(dgc->gc[i], ~0U, 0, 0); in irq_domain_remove_generic_chips()
379 d->gc = NULL; in irq_domain_remove_generic_chips()
418 struct irq_domain_chip_generic *dgc = d->gc; in __irq_get_domain_generic_chip()
426 return dgc->gc[idx]; in __irq_get_domain_generic_chip()
437 struct irq_chip_generic *gc = __irq_get_domain_generic_chip(d, hw_irq); in irq_get_domain_generic_chip() local
439 return !IS_ERR(gc) ? gc : NULL; in irq_get_domain_generic_chip()
457 struct irq_domain_chip_generic *dgc = d->gc; in irq_map_generic_chip()
458 struct irq_chip_generic *gc; in irq_map_generic_chip() local
464 gc = __irq_get_domain_generic_chip(d, hw_irq); in irq_map_generic_chip()
465 if (IS_ERR(gc)) in irq_map_generic_chip()
466 return PTR_ERR(gc); in irq_map_generic_chip()
470 if (test_bit(idx, &gc->unused)) in irq_map_generic_chip()
473 if (test_bit(idx, &gc->installed)) in irq_map_generic_chip()
476 ct = gc->chip_types; in irq_map_generic_chip()
480 if (!gc->installed) { in irq_map_generic_chip()
481 raw_spin_lock_irqsave(&gc->lock, flags); in irq_map_generic_chip()
482 irq_gc_init_mask_cache(gc, dgc->gc_flags); in irq_map_generic_chip()
483 raw_spin_unlock_irqrestore(&gc->lock, flags); in irq_map_generic_chip()
487 set_bit(idx, &gc->installed); in irq_map_generic_chip()
498 irq_domain_set_info(d, virq, hw_irq, chip, gc, ct->handler, NULL, NULL); in irq_map_generic_chip()
506 struct irq_domain_chip_generic *dgc = d->gc; in irq_unmap_generic_chip()
508 struct irq_chip_generic *gc; in irq_unmap_generic_chip() local
511 gc = irq_get_domain_generic_chip(d, hw_irq); in irq_unmap_generic_chip()
512 if (!gc) in irq_unmap_generic_chip()
517 clear_bit(irq_idx, &gc->installed); in irq_unmap_generic_chip()
542 void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk, in irq_setup_generic_chip() argument
546 struct irq_chip_type *ct = gc->chip_types; in irq_setup_generic_chip()
551 list_add_tail(&gc->list, &gc_list); in irq_setup_generic_chip()
554 irq_gc_init_mask_cache(gc, flags); in irq_setup_generic_chip()
556 for (i = gc->irq_base; msk; msk >>= 1, i++) { in irq_setup_generic_chip()
570 d->mask = 1 << (i - gc->irq_base); in irq_setup_generic_chip()
573 irq_set_chip_data(i, gc); in irq_setup_generic_chip()
576 gc->irq_cnt = i - gc->irq_base; in irq_setup_generic_chip()
589 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); in irq_setup_alt_chip() local
590 struct irq_chip_type *ct = gc->chip_types; in irq_setup_alt_chip()
593 for (i = 0; i < gc->num_ct; i++, ct++) { in irq_setup_alt_chip()
613 void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk, in irq_remove_generic_chip() argument
619 list_del(&gc->list); in irq_remove_generic_chip()
631 if (gc->domain) { in irq_remove_generic_chip()
632 virq = irq_find_mapping(gc->domain, gc->irq_base + i); in irq_remove_generic_chip()
636 virq = gc->irq_base + i; in irq_remove_generic_chip()
648 static struct irq_data *irq_gc_get_irq_data(struct irq_chip_generic *gc) in irq_gc_get_irq_data() argument
652 if (!gc->domain) in irq_gc_get_irq_data()
653 return irq_get_irq_data(gc->irq_base); in irq_gc_get_irq_data()
659 if (!gc->installed) in irq_gc_get_irq_data()
662 virq = irq_find_mapping(gc->domain, gc->irq_base + __ffs(gc->installed)); in irq_gc_get_irq_data()
669 struct irq_chip_generic *gc; in irq_gc_suspend() local
671 list_for_each_entry(gc, &gc_list, list) { in irq_gc_suspend()
672 struct irq_chip_type *ct = gc->chip_types; in irq_gc_suspend()
675 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_suspend()
681 if (gc->suspend) in irq_gc_suspend()
682 gc->suspend(gc); in irq_gc_suspend()
689 struct irq_chip_generic *gc; in irq_gc_resume() local
691 list_for_each_entry(gc, &gc_list, list) { in irq_gc_resume()
692 struct irq_chip_type *ct = gc->chip_types; in irq_gc_resume()
694 if (gc->resume) in irq_gc_resume()
695 gc->resume(gc); in irq_gc_resume()
698 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_resume()
712 struct irq_chip_generic *gc; in irq_gc_shutdown() local
714 list_for_each_entry(gc, &gc_list, list) { in irq_gc_shutdown()
715 struct irq_chip_type *ct = gc->chip_types; in irq_gc_shutdown()
718 struct irq_data *data = irq_gc_get_irq_data(gc); in irq_gc_shutdown()