Lines Matching refs:snd_sof_dsp_read
138 status = snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->acp_error_stat); in config_dma_channel()
139 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, acp_dma_dscr_err_sts_0 + in config_dma_channel()
280 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD); in configure_and_run_sha_dma()
332 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SHA_PSP_ACK); in configure_and_run_sha_dma()
355 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DMA_CNTL_0 + ch * sizeof(u32)); in acp_dma_status()
373 dst[j] = snd_sof_dsp_read(sdev, ACP_DSP_BAR, reg_offset + i); in memcpy_from_scratch()
405 while (snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->hw_semaphore_offset) && --count) in acp_irq_thread()
431 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, base + DSP_SW_INTR_STAT_OFFSET); in acp_irq_handler()
438 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->ext_intr_stat); in acp_irq_handler()
458 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->ext_intr_stat1); in acp_irq_handler()
483 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, base + PGFSM_STATUS_OFFSET); in acp_power_on()
603 sdw0_en = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SW0_EN); in check_acp_sdw_enable_status()
604 sdw1_en = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SW1_EN); in check_acp_sdw_enable_status()