Lines Matching refs:sdev

45 static void hda_get_interfaces(struct snd_sof_dev *sdev, u32 *interface_mask)  in hda_get_interfaces()  argument
49 chip = get_chip_info(sdev->pdata); in hda_get_interfaces()
85 u32 hda_get_interface_mask(struct snd_sof_dev *sdev) in hda_get_interface_mask() argument
89 hda_get_interfaces(sdev, interface_mask); in hda_get_interface_mask()
91 return interface_mask[sdev->dspless_mode_selected]; in hda_get_interface_mask()
95 bool hda_is_chain_dma_supported(struct snd_sof_dev *sdev, u32 dai_type) in hda_is_chain_dma_supported() argument
100 if (sdev->dspless_mode_selected) in hda_is_chain_dma_supported()
103 hda_get_interfaces(sdev, interface_mask); in hda_is_chain_dma_supported()
115 chip = get_chip_info(sdev->pdata); in hda_is_chain_dma_supported()
129 static int hda_dsp_core_reset_enter(struct snd_sof_dev *sdev, unsigned int core_mask) in hda_dsp_core_reset_enter() argument
137 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_enter()
142 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_enter()
148 dev_err(sdev->dev, in hda_dsp_core_reset_enter()
155 adspcs = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_enter()
159 dev_err(sdev->dev, in hda_dsp_core_reset_enter()
168 static int hda_dsp_core_reset_leave(struct snd_sof_dev *sdev, unsigned int core_mask) in hda_dsp_core_reset_leave() argument
175 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_leave()
182 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_leave()
189 dev_err(sdev->dev, in hda_dsp_core_reset_leave()
196 adspcs = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_leave()
199 dev_err(sdev->dev, in hda_dsp_core_reset_leave()
208 int hda_dsp_core_stall_reset(struct snd_sof_dev *sdev, unsigned int core_mask) in hda_dsp_core_stall_reset() argument
211 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_stall_reset()
217 return hda_dsp_core_reset_enter(sdev, core_mask); in hda_dsp_core_stall_reset()
221 bool hda_dsp_core_is_enabled(struct snd_sof_dev *sdev, unsigned int core_mask) in hda_dsp_core_is_enabled() argument
226 val = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPCS); in hda_dsp_core_is_enabled()
240 dev_dbg(sdev->dev, "DSP core(s) enabled? %d : core_mask %x\n", in hda_dsp_core_is_enabled()
247 int hda_dsp_core_run(struct snd_sof_dev *sdev, unsigned int core_mask) in hda_dsp_core_run() argument
252 ret = hda_dsp_core_reset_leave(sdev, core_mask); in hda_dsp_core_run()
257 dev_dbg(sdev->dev, "unstall/run core: core_mask = %x\n", core_mask); in hda_dsp_core_run()
258 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_run()
264 if (!hda_dsp_core_is_enabled(sdev, core_mask)) { in hda_dsp_core_run()
265 hda_dsp_core_stall_reset(sdev, core_mask); in hda_dsp_core_run()
266 dev_err(sdev->dev, "error: DSP start core failed: core_mask %x\n", in hda_dsp_core_run()
279 int hda_dsp_core_power_up(struct snd_sof_dev *sdev, unsigned int core_mask) in hda_dsp_core_power_up() argument
281 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_core_power_up()
294 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPCS, in hda_dsp_core_power_up()
300 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_dsp_core_power_up()
306 dev_err(sdev->dev, in hda_dsp_core_power_up()
313 adspcs = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in hda_dsp_core_power_up()
317 dev_err(sdev->dev, in hda_dsp_core_power_up()
327 static int hda_dsp_core_power_down(struct snd_sof_dev *sdev, unsigned int core_mask) in hda_dsp_core_power_down() argument
333 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_power_down()
337 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_dsp_core_power_down()
343 dev_err(sdev->dev, in hda_dsp_core_power_down()
350 int hda_dsp_enable_core(struct snd_sof_dev *sdev, unsigned int core_mask) in hda_dsp_enable_core() argument
352 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_enable_core()
360 if (!core_mask || hda_dsp_core_is_enabled(sdev, core_mask)) in hda_dsp_enable_core()
364 ret = hda_dsp_core_power_up(sdev, core_mask); in hda_dsp_enable_core()
366 dev_err(sdev->dev, "error: dsp core power up failed: core_mask %x\n", in hda_dsp_enable_core()
371 return hda_dsp_core_run(sdev, core_mask); in hda_dsp_enable_core()
375 int hda_dsp_core_reset_power_down(struct snd_sof_dev *sdev, in hda_dsp_core_reset_power_down() argument
378 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_core_reset_power_down()
390 ret = hda_dsp_core_stall_reset(sdev, core_mask); in hda_dsp_core_reset_power_down()
392 dev_err(sdev->dev, "error: dsp core reset failed: core_mask %x\n", in hda_dsp_core_reset_power_down()
398 ret = hda_dsp_core_power_down(sdev, core_mask); in hda_dsp_core_reset_power_down()
400 dev_err(sdev->dev, "error: dsp core power down fail mask %x: %d\n", in hda_dsp_core_reset_power_down()
406 if (hda_dsp_core_is_enabled(sdev, core_mask)) { in hda_dsp_core_reset_power_down()
407 dev_err(sdev->dev, "error: dsp core disable fail mask %x: %d\n", in hda_dsp_core_reset_power_down()
416 void hda_dsp_ipc_int_enable(struct snd_sof_dev *sdev) in hda_dsp_ipc_int_enable() argument
418 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ipc_int_enable()
421 if (sdev->dspless_mode_selected) in hda_dsp_ipc_int_enable()
425 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl, in hda_dsp_ipc_int_enable()
430 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIC, in hda_dsp_ipc_int_enable()
435 void hda_dsp_ipc_int_disable(struct snd_sof_dev *sdev) in hda_dsp_ipc_int_disable() argument
437 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ipc_int_disable()
440 if (sdev->dspless_mode_selected) in hda_dsp_ipc_int_disable()
444 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIC, in hda_dsp_ipc_int_disable()
448 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl, in hda_dsp_ipc_int_disable()
453 static int hda_dsp_wait_d0i3c_done(struct snd_sof_dev *sdev) in hda_dsp_wait_d0i3c_done() argument
456 struct snd_sof_pdata *pdata = sdev->pdata; in hda_dsp_wait_d0i3c_done()
460 while (snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, chip->d0i3_offset) & in hda_dsp_wait_d0i3c_done()
470 static int hda_dsp_send_pm_gate_ipc(struct snd_sof_dev *sdev, u32 flags) in hda_dsp_send_pm_gate_ipc() argument
472 const struct sof_ipc_pm_ops *pm_ops = sof_ipc_get_ops(sdev, pm); in hda_dsp_send_pm_gate_ipc()
475 return pm_ops->set_pm_gate(sdev, flags); in hda_dsp_send_pm_gate_ipc()
480 static int hda_dsp_update_d0i3c_register(struct snd_sof_dev *sdev, u8 value) in hda_dsp_update_d0i3c_register() argument
482 struct snd_sof_pdata *pdata = sdev->pdata; in hda_dsp_update_d0i3c_register()
490 ret = hda_dsp_wait_d0i3c_done(sdev); in hda_dsp_update_d0i3c_register()
492 dev_err(sdev->dev, "CIP timeout before D0I3C update!\n"); in hda_dsp_update_d0i3c_register()
497 snd_sof_dsp_update8(sdev, HDA_DSP_HDA_BAR, chip->d0i3_offset, in hda_dsp_update_d0i3c_register()
507 ret = hda_dsp_wait_d0i3c_done(sdev); in hda_dsp_update_d0i3c_register()
509 dev_err(sdev->dev, "CIP timeout after D0I3C update!\n"); in hda_dsp_update_d0i3c_register()
513 reg = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, chip->d0i3_offset); in hda_dsp_update_d0i3c_register()
516 dev_err(sdev->dev, "failed to update D0I3C!\n"); in hda_dsp_update_d0i3c_register()
520 trace_sof_intel_D0I3C_updated(sdev, reg); in hda_dsp_update_d0i3c_register()
529 static bool hda_dsp_d0i3_streaming_applicable(struct snd_sof_dev *sdev) in hda_dsp_d0i3_streaming_applicable() argument
536 list_for_each_entry(spcm, &sdev->pcm_list, list) { in hda_dsp_d0i3_streaming_applicable()
553 static int hda_dsp_set_D0_state(struct snd_sof_dev *sdev, in hda_dsp_set_D0_state() argument
567 switch (sdev->dsp_power_state.state) { in hda_dsp_set_D0_state()
575 dev_err(sdev->dev, "error: transition from %d to %d not allowed\n", in hda_dsp_set_D0_state()
576 sdev->dsp_power_state.state, target_state->state); in hda_dsp_set_D0_state()
590 if (!sdev->fw_trace_is_supported || in hda_dsp_set_D0_state()
592 sdev->system_suspend_target != SOF_SUSPEND_NONE) in hda_dsp_set_D0_state()
595 if (hda_dsp_d0i3_streaming_applicable(sdev)) in hda_dsp_set_D0_state()
603 ret = hda_dsp_update_d0i3c_register(sdev, value); in hda_dsp_set_D0_state()
612 ret = hda_dsp_send_pm_gate_ipc(sdev, flags); in hda_dsp_set_D0_state()
614 dev_err(sdev->dev, in hda_dsp_set_D0_state()
629 hda_dsp_update_d0i3c_register(sdev, value); in hda_dsp_set_D0_state()
635 static void hda_dsp_state_log(struct snd_sof_dev *sdev) in hda_dsp_state_log() argument
637 switch (sdev->dsp_power_state.state) { in hda_dsp_state_log()
639 switch (sdev->dsp_power_state.substate) { in hda_dsp_state_log()
641 dev_dbg(sdev->dev, "Current DSP power state: D0I0\n"); in hda_dsp_state_log()
644 dev_dbg(sdev->dev, "Current DSP power state: D0I3\n"); in hda_dsp_state_log()
647 dev_dbg(sdev->dev, "Unknown DSP D0 substate: %d\n", in hda_dsp_state_log()
648 sdev->dsp_power_state.substate); in hda_dsp_state_log()
653 dev_dbg(sdev->dev, "Current DSP power state: D1\n"); in hda_dsp_state_log()
656 dev_dbg(sdev->dev, "Current DSP power state: D2\n"); in hda_dsp_state_log()
659 dev_dbg(sdev->dev, "Current DSP power state: D3\n"); in hda_dsp_state_log()
662 dev_dbg(sdev->dev, "Unknown DSP power state: %d\n", in hda_dsp_state_log()
663 sdev->dsp_power_state.state); in hda_dsp_state_log()
675 static int hda_dsp_set_power_state(struct snd_sof_dev *sdev, in hda_dsp_set_power_state() argument
682 ret = hda_dsp_set_D0_state(sdev, target_state); in hda_dsp_set_power_state()
686 if (sdev->dsp_power_state.state == SOF_DSP_PM_D0 && in hda_dsp_set_power_state()
687 sdev->dsp_power_state.substate == SOF_HDA_DSP_PM_D0I0) in hda_dsp_set_power_state()
690 dev_err(sdev->dev, in hda_dsp_set_power_state()
692 sdev->dsp_power_state.state, target_state->state); in hda_dsp_set_power_state()
695 dev_err(sdev->dev, "error: target state unsupported %d\n", in hda_dsp_set_power_state()
700 dev_err(sdev->dev, in hda_dsp_set_power_state()
706 sdev->dsp_power_state = *target_state; in hda_dsp_set_power_state()
707 hda_dsp_state_log(sdev); in hda_dsp_set_power_state()
711 int hda_dsp_set_power_state_ipc3(struct snd_sof_dev *sdev, in hda_dsp_set_power_state_ipc3() argument
722 sdev->system_suspend_target == SOF_SUSPEND_S0IX) in hda_dsp_set_power_state_ipc3()
723 return hda_dsp_set_power_state(sdev, target_state); in hda_dsp_set_power_state_ipc3()
729 if (target_state->state == sdev->dsp_power_state.state && in hda_dsp_set_power_state_ipc3()
730 target_state->substate == sdev->dsp_power_state.substate) in hda_dsp_set_power_state_ipc3()
733 return hda_dsp_set_power_state(sdev, target_state); in hda_dsp_set_power_state_ipc3()
737 int hda_dsp_set_power_state_ipc4(struct snd_sof_dev *sdev, in hda_dsp_set_power_state_ipc4() argument
741 if (target_state->state == sdev->dsp_power_state.state && in hda_dsp_set_power_state_ipc4()
742 target_state->substate == sdev->dsp_power_state.substate) in hda_dsp_set_power_state_ipc4()
745 return hda_dsp_set_power_state(sdev, target_state); in hda_dsp_set_power_state_ipc4()
779 static int hda_suspend(struct snd_sof_dev *sdev, bool runtime_suspend) in hda_suspend() argument
781 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_suspend()
783 struct hdac_bus *bus = sof_to_bus(sdev); in hda_suspend()
795 if (sdev->system_suspend_target > SOF_SUSPEND_S3 || in hda_suspend()
797 sdev->system_suspend_target == SOF_SUSPEND_S3)) in hda_suspend()
804 if (imr_lost || sdev->fw_state == SOF_FW_CRASHED || in hda_suspend()
805 sdev->fw_state == SOF_FW_BOOT_FAILED) in hda_suspend()
808 ret = chip->disable_interrupts(sdev); in hda_suspend()
813 synchronize_irq(sdev->ipc_irq); in hda_suspend()
815 hda_codec_jack_wake_enable(sdev, runtime_suspend); in hda_suspend()
820 if (sdev->dspless_mode_selected) in hda_suspend()
823 ret = chip->power_down_dsp(sdev); in hda_suspend()
825 dev_err(sdev->dev, "failed to power down DSP during suspend\n"); in hda_suspend()
831 sdev->dsp_core_ref_count[j] = 0; in hda_suspend()
834 hda_dsp_ctrl_ppcap_enable(sdev, false); in hda_suspend()
835 hda_dsp_ctrl_ppcap_int_enable(sdev, false); in hda_suspend()
839 hda_dsp_ctrl_stop_chip(sdev); in hda_suspend()
842 snd_sof_pci_update_bits(sdev, PCI_PGCTL, in hda_suspend()
846 ret = hda_dsp_ctrl_link_reset(sdev, true); in hda_suspend()
848 dev_err(sdev->dev, in hda_suspend()
854 hda_codec_i915_display_power(sdev, false); in hda_suspend()
859 static int hda_resume(struct snd_sof_dev *sdev, bool runtime_resume) in hda_resume() argument
865 hda_codec_i915_display_power(sdev, true); in hda_resume()
871 snd_sof_pci_update_bits(sdev, PCI_TCSEL, 0x07, 0); in hda_resume()
874 ret = hda_dsp_ctrl_init_chip(sdev); in hda_resume()
876 dev_err(sdev->dev, in hda_resume()
883 hda_codec_jack_wake_enable(sdev, false); in hda_resume()
884 if (sdev->system_suspend_target == SOF_SUSPEND_NONE) in hda_resume()
885 hda_codec_jack_check(sdev); in hda_resume()
888 if (!sdev->dspless_mode_selected) { in hda_resume()
890 hda_dsp_ctrl_ppcap_enable(sdev, true); in hda_resume()
891 hda_dsp_ctrl_ppcap_int_enable(sdev, true); in hda_resume()
894 chip = get_chip_info(sdev->pdata); in hda_resume()
896 hda_sdw_int_enable(sdev, true); in hda_resume()
900 hda_codec_i915_display_power(sdev, false); in hda_resume()
905 int hda_dsp_resume(struct snd_sof_dev *sdev) in hda_dsp_resume() argument
907 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_resume()
908 struct hdac_bus *bus = sof_to_bus(sdev); in hda_dsp_resume()
909 struct pci_dev *pci = to_pci_dev(sdev->dev); in hda_dsp_resume()
917 if (sdev->dsp_power_state.state == SOF_DSP_PM_D0) { in hda_dsp_resume()
920 dev_err(sdev->dev, in hda_dsp_resume()
927 hda_codec_resume_cmd_io(sdev); in hda_dsp_resume()
930 ret = snd_sof_dsp_set_power_state(sdev, &target_state); in hda_dsp_resume()
932 dev_err(sdev->dev, "error: setting dsp state %d substate %d\n", in hda_dsp_resume()
939 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, in hda_dsp_resume()
950 ret = hda_resume(sdev, false); in hda_dsp_resume()
954 return snd_sof_dsp_set_power_state(sdev, &target_state); in hda_dsp_resume()
958 int hda_dsp_runtime_resume(struct snd_sof_dev *sdev) in hda_dsp_runtime_resume() argument
966 ret = hda_resume(sdev, true); in hda_dsp_runtime_resume()
970 return snd_sof_dsp_set_power_state(sdev, &target_state); in hda_dsp_runtime_resume()
974 int hda_dsp_runtime_idle(struct snd_sof_dev *sdev) in hda_dsp_runtime_idle() argument
976 struct hdac_bus *hbus = sof_to_bus(sdev); in hda_dsp_runtime_idle()
979 dev_dbg(sdev->dev, "some codecs still powered (%08X), not idle\n", in hda_dsp_runtime_idle()
988 int hda_dsp_runtime_suspend(struct snd_sof_dev *sdev) in hda_dsp_runtime_suspend() argument
990 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_runtime_suspend()
996 if (!sdev->dspless_mode_selected) { in hda_dsp_runtime_suspend()
1002 ret = hda_suspend(sdev, true); in hda_dsp_runtime_suspend()
1006 return snd_sof_dsp_set_power_state(sdev, &target_state); in hda_dsp_runtime_suspend()
1010 int hda_dsp_suspend(struct snd_sof_dev *sdev, u32 target_state) in hda_dsp_suspend() argument
1012 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_suspend()
1013 struct hdac_bus *bus = sof_to_bus(sdev); in hda_dsp_suspend()
1014 struct pci_dev *pci = to_pci_dev(sdev->dev); in hda_dsp_suspend()
1022 if (!sdev->dspless_mode_selected) { in hda_dsp_suspend()
1029 ret = snd_sof_dsp_set_power_state(sdev, &target_dsp_state); in hda_dsp_suspend()
1031 dev_err(sdev->dev, "error: setting dsp state %d substate %d\n", in hda_dsp_suspend()
1039 snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, HDA_VS_INTEL_EM2, in hda_dsp_suspend()
1043 hda_codec_suspend_cmd_io(sdev); in hda_dsp_suspend()
1048 dev_err(sdev->dev, in hda_dsp_suspend()
1061 ret = hda_suspend(sdev, false); in hda_dsp_suspend()
1067 return snd_sof_dsp_set_power_state(sdev, &target_dsp_state); in hda_dsp_suspend()
1071 static unsigned int hda_dsp_check_for_dma_streams(struct snd_sof_dev *sdev) in hda_dsp_check_for_dma_streams() argument
1073 struct hdac_bus *bus = sof_to_bus(sdev); in hda_dsp_check_for_dma_streams()
1081 val = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, in hda_dsp_check_for_dma_streams()
1090 static int hda_dsp_s5_quirk(struct snd_sof_dev *sdev) in hda_dsp_s5_quirk() argument
1106 ret = hda_dsp_ctrl_link_reset(sdev, false); in hda_dsp_s5_quirk()
1113 ret = hda_dsp_ctrl_link_reset(sdev, true); in hda_dsp_s5_quirk()
1120 int hda_dsp_shutdown_dma_flush(struct snd_sof_dev *sdev) in hda_dsp_shutdown_dma_flush() argument
1126 active_streams = hda_dsp_check_for_dma_streams(sdev); in hda_dsp_shutdown_dma_flush()
1128 sdev->system_suspend_target = SOF_SUSPEND_S3; in hda_dsp_shutdown_dma_flush()
1129 ret = snd_sof_suspend(sdev->dev); in hda_dsp_shutdown_dma_flush()
1132 dev_warn(sdev->dev, in hda_dsp_shutdown_dma_flush()
1135 ret2 = hda_dsp_s5_quirk(sdev); in hda_dsp_shutdown_dma_flush()
1137 dev_err(sdev->dev, "shutdown recovery failed (%d)\n", ret2); in hda_dsp_shutdown_dma_flush()
1144 int hda_dsp_shutdown(struct snd_sof_dev *sdev) in hda_dsp_shutdown() argument
1146 sdev->system_suspend_target = SOF_SUSPEND_S3; in hda_dsp_shutdown()
1147 return snd_sof_suspend(sdev->dev); in hda_dsp_shutdown()
1151 int hda_dsp_set_hw_params_upon_resume(struct snd_sof_dev *sdev) in hda_dsp_set_hw_params_upon_resume() argument
1156 ret = hda_dsp_dais_suspend(sdev); in hda_dsp_set_hw_params_upon_resume()
1158 dev_warn(sdev->dev, "%s: failure in hda_dsp_dais_suspend\n", __func__); in hda_dsp_set_hw_params_upon_resume()
1170 struct snd_sof_dev *sdev = dev_get_drvdata(bus->dev); in hda_dsp_d0i3_work() local
1178 if (!snd_sof_dsp_only_d0i3_compatible_stream_active(sdev)) in hda_dsp_d0i3_work()
1183 ret = snd_sof_dsp_set_power_state(sdev, &target_state); in hda_dsp_d0i3_work()
1185 dev_err_ratelimited(sdev->dev, in hda_dsp_d0i3_work()
1191 int hda_dsp_core_get(struct snd_sof_dev *sdev, int core) in hda_dsp_core_get() argument
1193 const struct sof_ipc_pm_ops *pm_ops = sdev->ipc->ops->pm; in hda_dsp_core_get()
1197 ret = hda_dsp_enable_core(sdev, BIT(core)); in hda_dsp_core_get()
1199 dev_err(sdev->dev, "failed to power up core %d with err: %d\n", in hda_dsp_core_get()
1205 if (sdev->fw_state != SOF_FW_BOOT_COMPLETE || core == SOF_DSP_PRIMARY_CORE) in hda_dsp_core_get()
1213 ret = pm_ops->set_core_state(sdev, core, true); in hda_dsp_core_get()
1215 dev_err(sdev->dev, "failed to enable secondary core '%d' failed with %d\n", in hda_dsp_core_get()
1224 ret1 = hda_dsp_core_reset_power_down(sdev, BIT(core)); in hda_dsp_core_get()
1226 dev_err(sdev->dev, "failed to power down core: %d with err: %d\n", core, ret1); in hda_dsp_core_get()
1233 void hda_common_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable) in hda_common_enable_sdw_irq() argument
1237 hdev = sdev->pdata->hw_pdata; in hda_common_enable_sdw_irq()
1242 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIC2, in hda_common_enable_sdw_irq()
1248 void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable) in hda_sdw_int_enable() argument
1250 u32 interface_mask = hda_get_interface_mask(sdev); in hda_sdw_int_enable()
1256 chip = get_chip_info(sdev->pdata); in hda_sdw_int_enable()
1258 chip->enable_sdw_irq(sdev, enable); in hda_sdw_int_enable()
1262 int hda_sdw_check_lcount_common(struct snd_sof_dev *sdev) in hda_sdw_check_lcount_common() argument
1268 hdev = sdev->pdata->hw_pdata; in hda_sdw_check_lcount_common()
1271 caps = snd_sof_dsp_read(sdev, HDA_DSP_BAR, ctx->shim_base + SDW_SHIM_LCAP); in hda_sdw_check_lcount_common()
1276 dev_err(sdev->dev, in hda_sdw_check_lcount_common()
1286 int hda_sdw_check_lcount_ext(struct snd_sof_dev *sdev) in hda_sdw_check_lcount_ext() argument
1293 bus = sof_to_bus(sdev); in hda_sdw_check_lcount_ext()
1295 hdev = sdev->pdata->hw_pdata; in hda_sdw_check_lcount_ext()
1302 dev_err(sdev->dev, in hda_sdw_check_lcount_ext()
1312 int hda_sdw_check_lcount(struct snd_sof_dev *sdev) in hda_sdw_check_lcount() argument
1316 chip = get_chip_info(sdev->pdata); in hda_sdw_check_lcount()
1318 return chip->read_sdw_lcount(sdev); in hda_sdw_check_lcount()
1324 void hda_sdw_process_wakeen(struct snd_sof_dev *sdev) in hda_sdw_process_wakeen() argument
1326 u32 interface_mask = hda_get_interface_mask(sdev); in hda_sdw_process_wakeen()
1332 chip = get_chip_info(sdev->pdata); in hda_sdw_process_wakeen()
1334 chip->sdw_process_wakeen(sdev); in hda_sdw_process_wakeen()
1340 int hda_dsp_disable_interrupts(struct snd_sof_dev *sdev) in hda_dsp_disable_interrupts() argument
1342 hda_sdw_int_enable(sdev, false); in hda_dsp_disable_interrupts()
1343 hda_dsp_ipc_int_disable(sdev); in hda_dsp_disable_interrupts()
1488 void hda_dsp_get_state(struct snd_sof_dev *sdev, const char *level) in hda_dsp_get_state() argument
1490 const struct sof_intel_dsp_desc *chip = get_chip_info(sdev->pdata); in hda_dsp_get_state()
1494 fsr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg); in hda_dsp_get_state()
1520 dev_printk(level, sdev->dev, "%#010x: unknown ROM status value\n", fsr); in hda_dsp_get_state()
1532 dev_printk(level, sdev->dev, in hda_dsp_get_state()
1537 dev_printk(level, sdev->dev, "%#010x: module: %s, state: %s, %s\n", in hda_dsp_get_state()
1542 error_code = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + 4); in hda_dsp_get_state()
1552 dev_printk(level, sdev->dev, "status code: %#x (%s)\n", error_code, in hda_dsp_get_state()
1555 dev_printk(level, sdev->dev, "error code: %#x (%s)\n", error_code, in hda_dsp_get_state()
1560 static void hda_dsp_get_registers(struct snd_sof_dev *sdev, in hda_dsp_get_registers() argument
1565 u32 offset = sdev->dsp_oops_offset; in hda_dsp_get_registers()
1568 sof_mailbox_read(sdev, offset, xoops, sizeof(*xoops)); in hda_dsp_get_registers()
1574 dev_err(sdev->dev, "invalid header size 0x%x. FW oops is bogus\n", in hda_dsp_get_registers()
1579 sof_block_read(sdev, sdev->mmio_bar, offset, in hda_dsp_get_registers()
1584 sof_block_read(sdev, sdev->mmio_bar, offset, stack, in hda_dsp_get_registers()
1589 void hda_dsp_dump_ext_rom_status(struct snd_sof_dev *sdev, const char *level, in hda_dsp_dump_ext_rom_status() argument
1598 chip = get_chip_info(sdev->pdata); in hda_dsp_dump_ext_rom_status()
1600 value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + i * 0x4); in hda_dsp_dump_ext_rom_status()
1604 dev_printk(level, sdev->dev, "extended rom status: %s", msg); in hda_dsp_dump_ext_rom_status()
1608 void hda_dsp_dump(struct snd_sof_dev *sdev, u32 flags) in hda_dsp_dump() argument
1616 hda_dsp_get_state(sdev, level); in hda_dsp_dump()
1619 if (flags & SOF_DBG_DUMP_REGS && sdev->pdata->ipc_type == SOF_IPC_TYPE_3) { in hda_dsp_dump()
1620 u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS); in hda_dsp_dump()
1621 u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); in hda_dsp_dump()
1623 hda_dsp_get_registers(sdev, &xoops, &panic_info, stack, in hda_dsp_dump()
1625 sof_print_oops_and_stack(sdev, level, status, panic, &xoops, in hda_dsp_dump()
1628 hda_dsp_dump_ext_rom_status(sdev, level, flags); in hda_dsp_dump()