Lines Matching defs:mx6_ddr_sysinfo
414 struct mx6_ddr_sysinfo { struct
415 u8 dsize; /* size of bus (in dwords: 0=16bit,1=32bit,2=64bit) */
416 u8 cs_density; /* density per chip select (Gb) */
417 u8 ncs; /* number chip selects used (1|2) */
418 char cs1_mirror;/* enable address mirror (0|1) */
419 char bi_on; /* Bank interleaving enable */
420 u8 rtt_nom; /* Rtt_Nom (DDR3_RTT_*) */
421 u8 rtt_wr; /* Rtt_Wr (DDR3_RTT_*) */
422 u8 ralat; /* Read Additional Latency (0-7) */
423 u8 walat; /* Write Additional Latency (0-3) */
424 u8 mif3_mode; /* Command prediction working mode */
425 u8 rst_to_cke; /* Time from SDE enable to CKE rise */
426 u8 sde_to_rst; /* Time from SDE enable until DDR reset# is high */
427 u8 pd_fast_exit;/* enable precharge powerdown fast-exit */
428 u8 ddr_type; /* DDR type: DDR3(0) or LPDDR2(1) */
429 u8 refsel; /* REF_SEL field of register MDREF */
430 u8 refr; /* REFR field of register MDREF */