Lines Matching refs:idx
36 static inline phys_addr_t get_law_base_addr(int idx) in get_law_base_addr() argument
40 ((u64)in_be32(LAWBARH_ADDR(idx)) << 32) | in get_law_base_addr()
41 in_be32(LAWBARL_ADDR(idx)); in get_law_base_addr()
43 return (phys_addr_t)in_be32(LAWBAR_ADDR(idx)) << LAWBAR_SHIFT; in get_law_base_addr()
47 static inline void set_law_base_addr(int idx, phys_addr_t addr) in set_law_base_addr() argument
50 out_be32(LAWBARL_ADDR(idx), addr & 0xffffffff); in set_law_base_addr()
51 out_be32(LAWBARH_ADDR(idx), (u64)addr >> 32); in set_law_base_addr()
53 out_be32(LAWBAR_ADDR(idx), addr >> LAWBAR_SHIFT); in set_law_base_addr()
57 void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id) in set_law() argument
59 gd->arch.used_laws |= (1 << idx); in set_law()
61 out_be32(LAWAR_ADDR(idx), 0); in set_law()
62 set_law_base_addr(idx, addr); in set_law()
63 out_be32(LAWAR_ADDR(idx), LAW_EN | ((u32)id << 20) | (u32)sz); in set_law()
66 in_be32(LAWAR_ADDR(idx)); in set_law()
69 void disable_law(u8 idx) in disable_law() argument
71 gd->arch.used_laws &= ~(1 << idx); in disable_law()
73 out_be32(LAWAR_ADDR(idx), 0); in disable_law()
74 set_law_base_addr(idx, 0); in disable_law()
77 in_be32(LAWAR_ADDR(idx)); in disable_law()
103 u32 idx = ffz(gd->arch.used_laws); in set_next_law() local
105 if (idx >= FSL_HW_NUM_LAWS) in set_next_law()
108 set_law(idx, addr, sz, id); in set_next_law()
110 return idx; in set_next_law()
117 u32 idx; in set_last_law() local
124 idx = __ilog2(~(gd->arch.used_laws)); in set_last_law()
126 if (idx >= FSL_HW_NUM_LAWS) in set_last_law()
129 set_law(idx, addr, sz, id); in set_last_law()
131 return idx; in set_last_law()