Lines Matching refs:regs
98 uintptr_t regs; member
102 static void mvebu_lcd_conf_mbus_registers(uintptr_t regs) in mvebu_lcd_conf_mbus_registers() argument
111 writel(0, regs + MVEBU_LCD_WIN_CONTROL(i)); in mvebu_lcd_conf_mbus_registers()
112 writel(0, regs + MVEBU_LCD_WIN_BASE(i)); in mvebu_lcd_conf_mbus_registers()
113 writel(0, regs + MVEBU_LCD_WIN_REMAP(i)); in mvebu_lcd_conf_mbus_registers()
121 regs + MVEBU_LCD_WIN_CONTROL(i)); in mvebu_lcd_conf_mbus_registers()
123 writel(cs->base & 0xffff0000, regs + MVEBU_LCD_WIN_BASE(i)); in mvebu_lcd_conf_mbus_registers()
129 uintptr_t regs) in mvebu_lcd_register_init() argument
137 mvebu_lcd_conf_mbus_registers(regs); in mvebu_lcd_register_init()
151 writel(lcd_info->fb_base, regs + MVEBU_LCD_CFG_GRA_START_ADDR0); in mvebu_lcd_register_init()
152 writel(lcd_info->fb_base, regs + MVEBU_LCD_CFG_GRA_START_ADDR1); in mvebu_lcd_register_init()
162 writel(0x80100000 + 2 * x, regs + MVEBU_LCD_CFG_GRA_PITCH); in mvebu_lcd_register_init()
169 writel(0x00000000, regs + MVEBU_LCD_SPU_GRA_OVSA_HPXL_VLN); in mvebu_lcd_register_init()
177 writel((y << 16) | x, regs + MVEBU_LCD_SPU_GRA_HPXL_VLN); in mvebu_lcd_register_init()
185 writel((y << 16) | x, regs + MVEBU_LCD_SPU_GZM_HPXL_VLN); in mvebu_lcd_register_init()
192 writel((y << 16) | x, regs + MVEBU_LCD_SPU_HWC_OVSA_HPXL_VLN); in mvebu_lcd_register_init()
199 writel(0x00000000, regs + MVEBU_LCD_SPU_HWC_HPXL_VLN); in mvebu_lcd_register_init()
221 writel(val, regs + MVEBU_LCD_SPUT_V_H_TOTAL); in mvebu_lcd_register_init()
228 writel((y << 16) | x, regs + MVEBU_LCD_SPU_V_H_ACTIVE); in mvebu_lcd_register_init()
238 regs + MVEBU_LCD_SPU_H_PORCH); in mvebu_lcd_register_init()
248 regs + MVEBU_LCD_SPU_V_PORCH); in mvebu_lcd_register_init()
255 writel(0x00FF00FF, regs + MVEBU_LCD_SPU_BLANKCOLOR); in mvebu_lcd_register_init()
272 writel(0x00000780, regs + MVEBU_LCD_CFG_RDREG4F); in mvebu_lcd_register_init()
303 writel(0x88111100, regs + MVEBU_LCD_SPU_DMA_CTRL0); in mvebu_lcd_register_init()
320 writel(0x20010000, regs + MVEBU_LCD_SPU_DMA_CTRL1); in mvebu_lcd_register_init()
329 writel(0x0000C000, regs + MVEBU_LCD_SPU_SRAM_CTRL); in mvebu_lcd_register_init()
336 writel(0x00000000, regs + MVEBU_LCD_SPU_SRAM_PARA1); in mvebu_lcd_register_init()
346 writel(0x00000000, regs + MVEBU_LCD_SPU_CONTRAST); in mvebu_lcd_register_init()
353 writel(0x10001000, regs + MVEBU_LCD_SPU_SATURATION); in mvebu_lcd_register_init()
360 writel(0x00000000, regs + MVEBU_LCD_SPU_CBSH_HUE); in mvebu_lcd_register_init()
380 writel(0x6000080F, regs + MVEBU_LCD_SPU_DUMB_CTRL); in mvebu_lcd_register_init()
398 writel(0x000000C0, regs + MVEBU_LCD_SPU_IOPAD_CONTROL); in mvebu_lcd_register_init()
403 writel(0x00000000, regs + MVEBU_LCD_SPU_IRQ_ENA_2); in mvebu_lcd_register_init()
408 writel(0x00000000, regs + MVEBU_LCD_SPU_IRQ_ENA); in mvebu_lcd_register_init()
431 writel(0x00000000, regs + MVEBU_LCD_ADLL_CTRL); in mvebu_lcd_register_init()
437 writel(0x00000018, regs + MVEBU_LCD_CLK_DIS); in mvebu_lcd_register_init()
443 writel(0x00000000, regs + MVEBU_LCD_VGA_HVSYNC_DELAY); in mvebu_lcd_register_init()
455 writel(0x8FF40007, regs + MVEBU_LCD_CLK_CFG_1); in mvebu_lcd_register_init()
460 writel(0x94000174, regs + MVEBU_LCD_CLK_CFG_0); in mvebu_lcd_register_init()
469 writel(0x80000001, regs + MVEBU_LCD_CFG_SCLK_DIV); in mvebu_lcd_register_init()
484 writel(0x940021B4, regs + MVEBU_LCD_CLK_CFG_0); in mvebu_lcd_register_init()
497 writel(0x8FF40007, regs + MVEBU_LCD_CLK_CFG_1); in mvebu_lcd_register_init()
511 writel(0xC0000201, regs + MVEBU_LCD_LVDS_CLK_CFG); in mvebu_lcd_register_init()
516 writel(0x140021B4, regs + MVEBU_LCD_CLK_CFG_0); in mvebu_lcd_register_init()
524 writel(0x8FF60007, regs + MVEBU_LCD_CLK_CFG_1); in mvebu_lcd_register_init()
537 priv->regs = dev_read_addr(dev); in mvebu_video_probe()
538 if (priv->regs == FDT_ADDR_T_NONE) { in mvebu_video_probe()
559 mvebu_lcd_register_init(&lcd_info, priv->regs); in mvebu_video_probe()