1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * WORK Microwave work_92105 board configuration file 4 * 5 * (C) Copyright 2014 DENX Software Engineering GmbH 6 * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr> 7 */ 8 9 #ifndef __CONFIG_WORK_92105_H__ 10 #define __CONFIG_WORK_92105_H__ 11 12 /* SoC and board defines */ 13 #include <linux/sizes.h> 14 #include <asm/arch/cpu.h> 15 16 /* 17 * Memory configurations 18 */ 19 #define CFG_SYS_SDRAM_BASE EMC_DYCS0_BASE 20 #define CFG_SYS_SDRAM_SIZE SZ_128M 21 22 /* 23 * U-Boot General Configurations 24 */ 25 26 /* 27 * NAND chip timings for FIXME: which one? 28 */ 29 30 #define CFG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333 31 #define CFG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000 32 #define CFG_LPC32XX_NAND_MLC_NAND_TA 18181818 33 #define CFG_LPC32XX_NAND_MLC_RD_HIGH 31250000 34 #define CFG_LPC32XX_NAND_MLC_RD_LOW 45454545 35 #define CFG_LPC32XX_NAND_MLC_WR_HIGH 40000000 36 #define CFG_LPC32XX_NAND_MLC_WR_LOW 83333333 37 38 /* 39 * NAND 40 */ 41 42 /* driver configuration */ 43 #define CFG_SYS_MAX_NAND_CHIPS 1 44 #define CFG_SYS_NAND_BASE MLC_NAND_BASE 45 46 /* 47 * GPIO 48 */ 49 50 /* 51 * Environment 52 */ 53 54 /* 55 * SPL 56 */ 57 58 /* SPL will be executed at offset 0 */ 59 /* SPL will use SRAM as stack */ 60 /* Use the framework and generic lib */ 61 /* SPL will use serial */ 62 /* SPL will load U-Boot from NAND offset 0x40000 */ 63 /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_TEXT_BASE */ 64 #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE 65 #define CFG_SYS_NAND_U_BOOT_DST CONFIG_TEXT_BASE 66 67 /* 68 * Include SoC specific configuration 69 */ 70 #include <asm/arch/config.h> 71 72 #endif /* __CONFIG_WORK_92105_H__*/ 73