1menu "ARM architecture" 2 depends on ARM 3 4config SYS_ARCH 5 default "arm" 6 7config ARM64 8 bool 9 select PHYS_64BIT 10 select SYS_CACHE_SHIFT_6 11 imply SPL_SEPARATE_BSS 12 13config ARM64_CRC32 14 bool "Enable support for CRC32 instruction" 15 depends on ARM64 && CC_IS_GCC 16 default y 17 help 18 ARMv8 implements dedicated crc32 instruction for crc32 calculation. 19 This is faster than software crc32 calculation. This instruction may 20 not be present on all ARMv8.0, but is always present on ARMv8.1 and 21 newer. 22 23config COUNTER_FREQUENCY 24 int "Timer clock frequency" 25 depends on ARM64 || CPU_V7A 26 default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL 27 default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \ 28 ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036 29 default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A 30 default 100000000 if ARCH_ZYNQMP 31 default 0 32 help 33 For platforms with ARMv8-A and ARMv7-A which features a system 34 counter, those platforms needs software to program the counter 35 frequency. Setup time clock frequency for certain platform. 36 0 means no need to configure the system counter frequency. 37 For platforms needs the frequency set in U-Boot with a 38 pre-defined value, should have the macro defined as a non-zero value. 39 40config POSITION_INDEPENDENT 41 bool "Generate position-independent pre-relocation code" 42 depends on ARM64 || CPU_V7A 43 help 44 U-Boot expects to be linked to a specific hard-coded address, and to 45 be loaded to and run from that address. This option lifts that 46 restriction, thus allowing the code to be loaded to and executed from 47 almost any 4K aligned address. This logic relies on the relocation 48 information that is embedded in the binary to support U-Boot 49 relocating itself to the top-of-RAM later during execution. 50 51config INIT_SP_RELATIVE 52 bool "Specify the early stack pointer relative to the .bss section" 53 depends on ARM64 54 default n if ARCH_QEMU 55 default y if POSITION_INDEPENDENT 56 help 57 U-Boot typically uses a hard-coded value for the stack pointer 58 before relocation. Enable this option to instead calculate the 59 initial SP at run-time. This is useful to avoid hard-coding addresses 60 into U-Boot, so that it can be loaded and executed at arbitrary 61 addresses and thus avoid using arbitrary addresses at runtime. 62 63 If this option is enabled, the early stack pointer is set to 64 &_bss_start with a offset value added. The offset is specified by 65 SYS_INIT_SP_BSS_OFFSET. 66 67config SYS_INIT_SP_BSS_OFFSET 68 int "Early stack offset from the .bss base address" 69 depends on ARM64 70 depends on INIT_SP_RELATIVE 71 default 524288 72 help 73 This option's value is the offset added to &_bss_start in order to 74 calculate the stack pointer. This offset should be large enough so 75 that the early malloc region, global data (gd), and early stack usage 76 do not overlap any appended DTB. 77 78config SPL_SYS_NO_VECTOR_TABLE 79 depends on SPL 80 bool 81 82config LINUX_KERNEL_IMAGE_HEADER 83 depends on ARM64 84 bool 85 help 86 Place a Linux kernel image header at the start of the U-Boot binary. 87 The format of the header is described in the Linux kernel source at 88 Documentation/arm64/booting.txt. This feature is useful since the 89 image header reports the amount of memory (BSS and similar) that 90 U-Boot needs to use, but which isn't part of the binary. 91 92config LNX_KRNL_IMG_TEXT_OFFSET_BASE 93 depends on LINUX_KERNEL_IMAGE_HEADER 94 hex 95 help 96 The value subtracted from CONFIG_TEXT_BASE to calculate the 97 TEXT_OFFSET value written to the Linux kernel image header. 98 99config GICV2 100 bool 101 102config GICV3 103 bool 104 105config GIC_V3_ITS 106 bool "ARM GICV3 ITS" 107 select IRQ 108 help 109 ARM GICV3 Interrupt translation service (ITS). 110 Basic support for programming locality specific peripheral 111 interrupts (LPI) configuration tables and enable LPI tables. 112 LPI configuration table can be used by u-boot or Linux. 113 ARM GICV3 has limitation, once the LPI table is enabled, LPI 114 configuration table can not be re-programmed, unless GICV3 reset. 115 116config STATIC_RELA 117 bool 118 default y if ARM64 119 120config DMA_ADDR_T_64BIT 121 bool 122 default y if ARM64 123 124config HAS_VBAR 125 bool 126 127config HAS_THUMB2 128 bool 129 130config GPIO_EXTRA_HEADER 131 bool 132 133# Used for compatibility with asm files copied from the kernel 134config ARM_ASM_UNIFIED 135 bool 136 default y 137 138# Used for compatibility with asm files copied from the kernel 139config THUMB2_KERNEL 140 bool 141 142config SYS_ICACHE_OFF 143 bool "Do not enable icache" 144 help 145 Do not enable instruction cache in U-Boot. 146 147config SPL_SYS_ICACHE_OFF 148 bool "Do not enable icache in SPL" 149 depends on SPL 150 default SYS_ICACHE_OFF 151 help 152 Do not enable instruction cache in SPL. 153 154config SYS_DCACHE_OFF 155 bool "Do not enable dcache" 156 help 157 Do not enable data cache in U-Boot. 158 159config SPL_SYS_DCACHE_OFF 160 bool "Do not enable dcache in SPL" 161 depends on SPL 162 default SYS_DCACHE_OFF 163 help 164 Do not enable data cache in SPL. 165 166config SYS_ARM_CACHE_CP15 167 bool "CP15 based cache enabling support" 168 help 169 Select this if your processor suports enabling caches by using 170 CP15 registers. 171 172config SYS_ARM_MMU 173 bool "MMU-based Paged Memory Management Support" 174 select SYS_ARM_CACHE_CP15 175 help 176 Select if you want MMU-based virtualised addressing space 177 support via paged memory management. 178 179config SYS_ARM_MPU 180 bool 'Use the ARM v7 PMSA Compliant MPU' 181 help 182 Some ARM systems without an MMU have instead a Memory Protection 183 Unit (MPU) that defines the type and permissions for regions of 184 memory. 185 If your CPU has an MPU then you should choose 'y' here unless you 186 know that you do not want to use the MPU. 187 188# If set, the workarounds for these ARM errata are applied early during U-Boot 189# startup. Note that in general these options force the workarounds to be 190# applied; no CPU-type/version detection exists, unlike the similar options in 191# the Linux kernel. Do not set these options unless they apply! Also note that 192# the following can be machine-specific errata. These do have ability to 193# provide rudimentary version and machine-specific checks, but expect no 194# product checks: 195# CONFIG_ARM_ERRATA_430973 196# CONFIG_ARM_ERRATA_454179 197# CONFIG_ARM_ERRATA_621766 198# CONFIG_ARM_ERRATA_798870 199# CONFIG_ARM_ERRATA_801819 200# CONFIG_ARM_CORTEX_A8_CVE_2017_5715 201# CONFIG_ARM_CORTEX_A15_CVE_2017_5715 202 203config ARM_ERRATA_430973 204 bool 205 206config ARM_ERRATA_454179 207 bool 208 209config ARM_ERRATA_621766 210 bool 211 212config ARM_ERRATA_716044 213 bool 214 215config ARM_ERRATA_725233 216 bool 217 218config ARM_ERRATA_742230 219 bool 220 221config ARM_ERRATA_743622 222 bool 223 224config ARM_ERRATA_751472 225 bool 226 227config ARM_ERRATA_761320 228 bool 229 230config ARM_ERRATA_773022 231 bool 232 233config ARM_ERRATA_774769 234 bool 235 236config ARM_ERRATA_794072 237 bool 238 239config ARM_ERRATA_798870 240 bool 241 242config ARM_ERRATA_801819 243 bool 244 245config ARM_ERRATA_826974 246 bool 247 248config ARM_ERRATA_828024 249 bool 250 251config ARM_ERRATA_829520 252 bool 253 254config ARM_ERRATA_833069 255 bool 256 257config ARM_ERRATA_833471 258 bool 259 260config ARM_ERRATA_845369 261 bool 262 263config ARM_ERRATA_852421 264 bool 265 266config ARM_ERRATA_852423 267 bool 268 269config ARM_ERRATA_855873 270 bool 271 272config ARM_CORTEX_A8_CVE_2017_5715 273 bool 274 275config ARM_CORTEX_A15_CVE_2017_5715 276 bool 277 278config CPU_ARM720T 279 bool 280 select SYS_CACHE_SHIFT_5 281 imply SYS_ARM_MMU 282 283config CPU_ARM920T 284 bool 285 select SYS_CACHE_SHIFT_5 286 imply SYS_ARM_MMU 287 288config CPU_ARM926EJS 289 bool 290 select SYS_CACHE_SHIFT_5 291 imply SYS_ARM_MMU 292 imply SPL_SEPARATE_BSS 293 294config CPU_ARM946ES 295 bool 296 select SYS_CACHE_SHIFT_5 297 imply SYS_ARM_MMU 298 299config CPU_ARM1136 300 bool 301 select SYS_CACHE_SHIFT_5 302 imply SYS_ARM_MMU 303 imply SPL_SEPARATE_BSS 304 305config CPU_ARM1176 306 bool 307 select HAS_VBAR 308 select SYS_CACHE_SHIFT_5 309 imply SYS_ARM_MMU 310 311config CPU_V7A 312 bool 313 select HAS_THUMB2 314 select HAS_VBAR 315 select SYS_CACHE_SHIFT_6 316 imply SYS_ARM_MMU 317 318config CPU_V7M 319 bool 320 select HAS_THUMB2 321 select SYS_ARM_MPU 322 select SYS_CACHE_SHIFT_5 323 select SYS_THUMB_BUILD 324 select THUMB2_KERNEL 325 326config CPU_V7R 327 bool 328 select HAS_THUMB2 329 select SYS_ARM_CACHE_CP15 330 select SYS_ARM_MPU 331 select SYS_CACHE_SHIFT_6 332 333config SYS_CPU 334 default "arm720t" if CPU_ARM720T 335 default "arm920t" if CPU_ARM920T 336 default "arm926ejs" if CPU_ARM926EJS 337 default "arm946es" if CPU_ARM946ES 338 default "arm1136" if CPU_ARM1136 339 default "arm1176" if CPU_ARM1176 340 default "armv7" if CPU_V7A 341 default "armv7" if CPU_V7R 342 default "armv7m" if CPU_V7M 343 default "armv8" if ARM64 344 345config SYS_ARM_ARCH 346 int 347 default 4 if CPU_ARM720T 348 default 4 if CPU_ARM920T 349 default 5 if CPU_ARM926EJS 350 default 5 if CPU_ARM946ES 351 default 6 if CPU_ARM1136 352 default 6 if CPU_ARM1176 353 default 7 if CPU_V7A 354 default 7 if CPU_V7M 355 default 7 if CPU_V7R 356 default 8 if ARM64 357 358choice 359 prompt "Select the ARM data write cache policy" 360 default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || TARGET_BCMNS || RZA1 361 default SYS_ARM_CACHE_WRITEBACK 362 363config SYS_ARM_CACHE_WRITEBACK 364 bool "Write-back (WB)" 365 help 366 A write updates the cache only and marks the cache line as dirty. 367 External memory is updated only when the line is evicted or explicitly 368 cleaned. 369 370config SYS_ARM_CACHE_WRITETHROUGH 371 bool "Write-through (WT)" 372 help 373 A write updates both the cache and the external memory system. 374 This does not mark the cache line as dirty. 375 376config SYS_ARM_CACHE_WRITEALLOC 377 bool "Write allocation (WA)" 378 help 379 A cache line is allocated on a write miss. This means that executing a 380 store instruction on the processor might cause a burst read to occur. 381 There is a linefill to obtain the data for the cache line, before the 382 write is performed. 383endchoice 384 385config ARCH_VERY_EARLY_INIT 386 bool 387 388config SPL_ARCH_VERY_EARLY_INIT 389 bool 390 391config ARCH_CPU_INIT 392 bool "Enable ARCH_CPU_INIT" 393 help 394 Some architectures require a call to arch_cpu_init(). 395 Say Y here to enable it 396 397config SYS_ARCH_TIMER 398 bool "ARM Generic Timer support" 399 depends on CPU_V7A || ARM64 400 default y if ARM64 401 help 402 The ARM Generic Timer (aka arch-timer) provides an architected 403 interface to a timer source on an SoC. 404 It is mandatory for ARMv8 implementation and widely available 405 on ARMv7 systems. 406 407config ARM_SMCCC 408 bool "Support for ARM SMC Calling Convention (SMCCC)" 409 depends on CPU_V7A || ARM64 410 select ARM_PSCI_FW 411 help 412 Say Y here if you want to enable ARM SMC Calling Convention. 413 This should be enabled if U-Boot needs to communicate with system 414 firmware (for example, PSCI) according to SMCCC. 415 416config SYS_THUMB_BUILD 417 bool "Build U-Boot using the Thumb instruction set" 418 depends on !ARM64 419 help 420 Use this flag to build U-Boot using the Thumb instruction set for 421 ARM architectures. Thumb instruction set provides better code 422 density. For ARM architectures that support Thumb2 this flag will 423 result in Thumb2 code generated by GCC. 424 425config SPL_SYS_THUMB_BUILD 426 bool "Build SPL using the Thumb instruction set" 427 default y if SYS_THUMB_BUILD 428 depends on !ARM64 && SPL 429 help 430 Use this flag to build SPL using the Thumb instruction set for 431 ARM architectures. Thumb instruction set provides better code 432 density. For ARM architectures that support Thumb2 this flag will 433 result in Thumb2 code generated by GCC. 434 435config TPL_SYS_THUMB_BUILD 436 bool "Build TPL using the Thumb instruction set" 437 default y if SYS_THUMB_BUILD 438 depends on TPL && !ARM64 439 help 440 Use this flag to build TPL using the Thumb instruction set for 441 ARM architectures. Thumb instruction set provides better code 442 density. For ARM architectures that support Thumb2 this flag will 443 result in Thumb2 code generated by GCC. 444 445config SYS_L2_PL310 446 bool "ARM PL310 L2 cache controller" 447 help 448 Enable support for ARM PL310 L2 cache controller in U-Boot 449 450config SPL_SYS_L2_PL310 451 bool "ARM PL310 L2 cache controller in SPL" 452 help 453 Enable support for ARM PL310 L2 cache controller in SPL 454 455config SYS_L2CACHE_OFF 456 bool "L2cache off" 457 help 458 If SoC does not support L2CACHE or one does not want to enable 459 L2CACHE, choose this option. 460 461config ENABLE_ARM_SOC_BOOT0_HOOK 462 bool "prepare BOOT0 header" 463 help 464 If the SoC's BOOT0 requires a header area filled with (magic) 465 values, then choose this option, and create a file included as 466 <asm/arch/boot0.h> which contains the required assembler code. 467 468config USE_ARCH_MEMCPY 469 bool "Use an assembly optimized implementation of memcpy" 470 default y if !ARM64 471 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400)) 472 help 473 Enable the generation of an optimized version of memcpy. 474 Such an implementation may be faster under some conditions 475 but may increase the binary size. 476 477config SPL_USE_ARCH_MEMCPY 478 bool "Use an assembly optimized implementation of memcpy for SPL" 479 default y if USE_ARCH_MEMCPY 480 depends on SPL 481 help 482 Enable the generation of an optimized version of memcpy. 483 Such an implementation may be faster under some conditions 484 but may increase the binary size. 485 486config TPL_USE_ARCH_MEMCPY 487 bool "Use an assembly optimized implementation of memcpy for TPL" 488 default y if USE_ARCH_MEMCPY 489 depends on TPL 490 help 491 Enable the generation of an optimized version of memcpy. 492 Such an implementation may be faster under some conditions 493 but may increase the binary size. 494 495config USE_ARCH_MEMMOVE 496 bool "Use an assembly optimized implementation of memmove" if !ARM64 497 default USE_ARCH_MEMCPY if ARM64 498 depends on ARM64 499 help 500 Enable the generation of an optimized version of memmove. 501 Such an implementation may be faster under some conditions 502 but may increase the binary size. 503 504config SPL_USE_ARCH_MEMMOVE 505 bool "Use an assembly optimized implementation of memmove for SPL" if !ARM64 506 default SPL_USE_ARCH_MEMCPY if ARM64 507 depends on SPL && ARM64 508 help 509 Enable the generation of an optimized version of memmove. 510 Such an implementation may be faster under some conditions 511 but may increase the binary size. 512 513config TPL_USE_ARCH_MEMMOVE 514 bool "Use an assembly optimized implementation of memmove for TPL" if !ARM64 515 default TPL_USE_ARCH_MEMCPY if ARM64 516 depends on TPL && ARM64 517 help 518 Enable the generation of an optimized version of memmove. 519 Such an implementation may be faster under some conditions 520 but may increase the binary size. 521 522config USE_ARCH_MEMSET 523 bool "Use an assembly optimized implementation of memset" 524 default y if !ARM64 525 depends on !ARM64 || (ARM64 && (GCC_VERSION >= 90400)) 526 help 527 Enable the generation of an optimized version of memset. 528 Such an implementation may be faster under some conditions 529 but may increase the binary size. 530 531config SPL_USE_ARCH_MEMSET 532 bool "Use an assembly optimized implementation of memset for SPL" 533 default y if USE_ARCH_MEMSET 534 depends on SPL 535 help 536 Enable the generation of an optimized version of memset. 537 Such an implementation may be faster under some conditions 538 but may increase the binary size. 539 540config TPL_USE_ARCH_MEMSET 541 bool "Use an assembly optimized implementation of memset for TPL" 542 default y if USE_ARCH_MEMSET 543 depends on TPL 544 help 545 Enable the generation of an optimized version of memset. 546 Such an implementation may be faster under some conditions 547 but may increase the binary size. 548 549config ARM64_SUPPORT_AARCH32 550 bool "ARM64 system support AArch32 execution state" 551 depends on ARM64 552 default y if !TARGET_THUNDERX_88XX 553 help 554 This ARM64 system supports AArch32 execution state. 555 556config IPROC 557 bool 558 559config S5P 560 def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX 561 562choice 563 prompt "Target select" 564 default TARGET_HIKEY 565 566config ARCH_AT91 567 bool "Atmel AT91" 568 select GPIO_EXTRA_HEADER 569 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB 570 select SPL_SEPARATE_BSS if SPL 571 572config ARCH_DAVINCI 573 bool "TI DaVinci" 574 select CPU_ARM926EJS 575 select GPIO_EXTRA_HEADER 576 select SPL_DM_SPI if SPL 577 imply CMD_SAVES 578 help 579 Support for TI's DaVinci platform. 580 581config ARCH_HISTB 582 bool "Hisilicon HiSTB SoCs" 583 select DM 584 select DM_SERIAL 585 select OF_CONTROL 586 select PL01X_SERIAL 587 imply CMD_DM 588 help 589 Support for HiSTB SoCs. 590 591config ARCH_KIRKWOOD 592 bool "Marvell Kirkwood" 593 select ARCH_MISC_INIT 594 select BOARD_EARLY_INIT_F 595 select CPU_ARM926EJS 596 select GPIO_EXTRA_HEADER 597 select TIMER 598 599config ARCH_MVEBU 600 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)" 601 select ARCH_EARLY_INIT_R if ARM64 602 select DM 603 select DM_SERIAL 604 select DM_SPI 605 select DM_SPI_FLASH 606 select GPIO_EXTRA_HEADER 607 select SPL_DM_SPI if SPL 608 select SPL_DM_SPI_FLASH if SPL 609 select SPL_TIMER if SPL 610 select TIMER if !ARM64 611 select OF_CONTROL 612 select OF_SEPARATE 613 select SPI 614 imply CMD_DM 615 616config ARCH_ORION5X 617 bool "Marvell Orion" 618 select CPU_ARM926EJS 619 select GPIO_EXTRA_HEADER 620 select SPL_SEPARATE_BSS if SPL 621 select TIMER 622 623config TARGET_STV0991 624 bool "Support stv0991" 625 select CPU_V7A 626 select DM 627 select DM_SERIAL 628 select DM_SPI 629 select DM_SPI_FLASH 630 select GPIO_EXTRA_HEADER 631 select PL01X_SERIAL 632 select SPI 633 select SPI_FLASH 634 imply CMD_DM 635 636config ARCH_BCM283X 637 bool "Broadcom BCM283X family" 638 select DM 639 select DM_GPIO 640 select DM_SERIAL 641 select GPIO_EXTRA_HEADER 642 select OF_CONTROL 643 select PL01X_SERIAL 644 select SERIAL_SEARCH_ALL 645 imply CMD_DM 646 imply FAT_WRITE 647 648config ARCH_BCMSTB 649 bool "Broadcom BCM7XXX family" 650 select CPU_V7A 651 select DM 652 select GPIO_EXTRA_HEADER 653 select OF_CONTROL 654 imply CMD_DM 655 imply OF_HAS_PRIOR_STAGE 656 help 657 This enables support for Broadcom ARM-based set-top box 658 chipsets, including the 7445 family of chips. 659 660config ARCH_BCMBCA 661 bool "Broadcom broadband chip family" 662 select DM 663 select OF_CONTROL 664 imply CMD_DM 665 666config TARGET_VEXPRESS_CA9X4 667 bool "Support vexpress_ca9x4" 668 select CPU_V7A 669 select PL011_SERIAL 670 671config TARGET_BCMCYGNUS 672 bool "Support bcmcygnus" 673 select CPU_V7A 674 select GPIO_EXTRA_HEADER 675 select IPROC 676 imply BCM_SF2_ETH 677 imply BCM_SF2_ETH_GMAC 678 imply CMD_HASH 679 imply CRC32_VERIFY 680 imply FAT_WRITE 681 imply HASH_VERIFY 682 imply NETDEVICES 683 684config TARGET_BCMNS 685 bool "Support Broadcom Northstar" 686 select CPU_V7A 687 select DM 688 select DM_GPIO 689 select DM_SERIAL 690 select OF_CONTROL 691 select TIMER 692 select SYS_NS16550 693 select ARM_GLOBAL_TIMER 694 imply SYS_THUMB_BUILD 695 imply MTD_RAW_NAND 696 imply NAND_BRCMNAND 697 imply NAND_BRCMNAND_IPROC 698 help 699 Support for Broadcom Northstar SoCs. NS is a dual-core 32-bit 700 ARMv7 Cortex-A9 SoC family including BCM4708, BCM47094, 701 BCM5301x etc. 702 703config TARGET_BCMNS2 704 bool "Support Broadcom Northstar2" 705 select ARM64 706 select GPIO_EXTRA_HEADER 707 help 708 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit 709 ARMv8 Cortex-A57 processors targeting a broad range of networking 710 applications. 711 712config TARGET_BCMNS3 713 bool "Support Broadcom NS3" 714 select ARM64 715 select BOARD_LATE_INIT 716 help 717 Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit 718 ARMv8 Cortex-A72 processors targeting a broad range of networking 719 applications. 720 721config ARCH_EXYNOS 722 bool "Samsung EXYNOS" 723 select DM 724 select DM_GPIO 725 select DM_I2C 726 select DM_KEYBOARD 727 select DM_SERIAL 728 select DM_SPI 729 select DM_SPI_FLASH 730 select SPI 731 select GPIO_EXTRA_HEADER 732 imply SYS_THUMB_BUILD 733 imply CMD_DM 734 imply FAT_WRITE 735 736config ARCH_S5PC1XX 737 bool "Samsung S5PC1XX" 738 select CPU_V7A 739 select DM 740 select DM_GPIO 741 select DM_I2C 742 select DM_SERIAL 743 select GPIO_EXTRA_HEADER 744 imply CMD_DM 745 746config ARCH_HIGHBANK 747 bool "Calxeda Highbank" 748 select CPU_V7A 749 select PL01X_SERIAL 750 select DM 751 select DM_SERIAL 752 select OF_CONTROL 753 select CLK 754 select CLK_CCF 755 select AHCI 756 select PHYS_64BIT 757 select TIMER 758 select SP804_TIMER 759 imply OF_HAS_PRIOR_STAGE 760 761config ARCH_INTEGRATOR 762 bool "ARM Ltd. Integrator family" 763 select DM 764 select DM_SERIAL 765 select GPIO_EXTRA_HEADER 766 select PL01X_SERIAL 767 imply CMD_DM 768 769config ARCH_IPQ40XX 770 bool "Qualcomm IPQ40xx SoCs" 771 select CPU_V7A 772 select DM 773 select DM_GPIO 774 select DM_SERIAL 775 select DM_RESET 776 select GPIO_EXTRA_HEADER 777 select MSM_SMEM 778 select PINCTRL 779 select CLK 780 select SMEM 781 select OF_CONTROL 782 imply CMD_DM 783 784config ARCH_KEYSTONE 785 bool "TI Keystone" 786 select CMD_POWEROFF 787 select CPU_V7A 788 select DDR_SPD 789 select SUPPORT_SPL 790 select SYS_ARCH_TIMER 791 select SYS_THUMB_BUILD 792 imply CMD_MTDPARTS 793 imply CMD_SAVES 794 imply FIT 795 796config ARCH_K3 797 bool "Texas Instruments' K3 Architecture" 798 select SPL 799 select SUPPORT_SPL 800 select FIT 801 802config ARCH_OMAP2PLUS 803 bool "TI OMAP2+" 804 select CPU_V7A 805 select GPIO_EXTRA_HEADER 806 select SPL_BOARD_INIT if SPL 807 select SPL_STACK_R if SPL 808 select SUPPORT_SPL 809 imply TI_SYSC if DM && OF_CONTROL 810 imply FIT 811 imply SPL_SEPARATE_BSS 812 813config ARCH_MESON 814 bool "Amlogic Meson" 815 select GPIO_EXTRA_HEADER 816 imply DISTRO_DEFAULTS 817 imply DM_RNG 818 help 819 Support for the Meson SoC family developed by Amlogic Inc., 820 targeted at media players and tablet computers. We currently 821 support the S905 (GXBaby) 64-bit SoC. 822 823config ARCH_MEDIATEK 824 bool "MediaTek SoCs" 825 select DM 826 select GPIO_EXTRA_HEADER 827 select OF_CONTROL 828 select SPL_DM if SPL 829 select SPL_LIBCOMMON_SUPPORT if SPL 830 select SPL_LIBGENERIC_SUPPORT if SPL 831 select SPL_OF_CONTROL if SPL 832 select SUPPORT_SPL 833 help 834 Support for the MediaTek SoCs family developed by MediaTek Inc. 835 Please refer to doc/README.mediatek for more information. 836 837config ARCH_LPC32XX 838 bool "NXP LPC32xx platform" 839 select CPU_ARM926EJS 840 select DM 841 select DM_GPIO 842 select DM_SERIAL 843 select GPIO_EXTRA_HEADER 844 select SPL_DM if SPL 845 select SUPPORT_SPL 846 imply CMD_DM 847 848config ARCH_IMX8 849 bool "NXP i.MX8 platform" 850 select ARM64 851 select SYS_FSL_HAS_SEC 852 select SYS_FSL_SEC_COMPAT_4 853 select SYS_FSL_SEC_LE 854 select DM 855 select DM_EVENT 856 select GPIO_EXTRA_HEADER 857 select MACH_IMX 858 select OF_CONTROL 859 select ENABLE_ARM_SOC_BOOT0_HOOK 860 861config ARCH_IMX8M 862 bool "NXP i.MX8M platform" 863 select ARM64 864 select GPIO_EXTRA_HEADER 865 select MACH_IMX 866 select SYS_FSL_HAS_SEC 867 select SYS_FSL_SEC_COMPAT_4 868 select SYS_FSL_SEC_LE 869 select SYS_I2C_MXC 870 select DM 871 select DM_EVENT if CLK 872 select SUPPORT_SPL 873 imply CMD_DM 874 875config ARCH_IMX8ULP 876 bool "NXP i.MX8ULP platform" 877 select ARM64 878 select DM 879 select DM_EVENT 880 select MACH_IMX 881 select OF_CONTROL 882 select SUPPORT_SPL 883 select GPIO_EXTRA_HEADER 884 select MISC 885 select IMX_SENTINEL 886 imply CMD_DM 887 888config ARCH_IMX9 889 bool "NXP i.MX9 platform" 890 select ARM64 891 select DM 892 select DM_EVENT 893 select MACH_IMX 894 select SUPPORT_SPL 895 select GPIO_EXTRA_HEADER 896 select MISC 897 select IMX_SENTINEL 898 imply CMD_DM 899 900config ARCH_IMXRT 901 bool "NXP i.MXRT platform" 902 select CPU_V7M 903 select DM 904 select DM_SERIAL 905 select GPIO_EXTRA_HEADER 906 select MACH_IMX 907 select SUPPORT_SPL 908 imply CMD_DM 909 910config ARCH_MX23 911 bool "NXP i.MX23 family" 912 select CPU_ARM926EJS 913 select GPIO_EXTRA_HEADER 914 select MACH_IMX 915 select PL011_SERIAL 916 select SUPPORT_SPL 917 918config ARCH_MX28 919 bool "NXP i.MX28 family" 920 select CPU_ARM926EJS 921 select GPIO_EXTRA_HEADER 922 select PL011_SERIAL 923 select MACH_IMX 924 select SUPPORT_SPL 925 926config ARCH_MX31 927 bool "NXP i.MX31 family" 928 select CPU_ARM1136 929 select GPIO_EXTRA_HEADER 930 select MACH_IMX 931 932config ARCH_MX7ULP 933 bool "NXP MX7ULP" 934 select BOARD_POSTCLK_INIT 935 select CPU_V7A 936 select GPIO_EXTRA_HEADER 937 select MACH_IMX 938 select SYS_FSL_HAS_SEC 939 select SYS_FSL_SEC_COMPAT_4 940 select SYS_FSL_SEC_LE 941 select ROM_UNIFIED_SECTIONS 942 imply MXC_GPIO 943 imply SYS_THUMB_BUILD 944 945config ARCH_MX7 946 bool "Freescale MX7" 947 select ARCH_MISC_INIT 948 select CPU_V7A 949 select GPIO_EXTRA_HEADER 950 select MACH_IMX 951 select MXC_GPT_HCLK 952 select SYS_FSL_HAS_SEC 953 select SYS_FSL_SEC_COMPAT_4 954 select SYS_FSL_SEC_LE 955 imply BOARD_EARLY_INIT_F 956 imply MXC_GPIO 957 imply SYS_THUMB_BUILD 958 959config ARCH_MX6 960 bool "Freescale MX6" 961 select BOARD_POSTCLK_INIT 962 select CPU_V7A 963 select GPIO_EXTRA_HEADER 964 select MACH_IMX 965 select MXC_GPT_HCLK 966 select SYS_FSL_HAS_SEC 967 select SYS_FSL_SEC_COMPAT_4 968 select SYS_FSL_SEC_LE 969 select SYS_L2_PL310 if !SYS_L2CACHE_OFF 970 imply MXC_GPIO 971 imply SYS_THUMB_BUILD 972 imply SPL_SEPARATE_BSS 973 974config ARCH_MX5 975 bool "Freescale MX5" 976 select BOARD_EARLY_INIT_F 977 select CPU_V7A 978 select GPIO_EXTRA_HEADER 979 select MACH_IMX 980 imply MXC_GPIO 981 982config ARCH_NEXELL 983 bool "Nexell S5P4418/S5P6818 SoC" 984 select ENABLE_ARM_SOC_BOOT0_HOOK 985 select DM 986 select GPIO_EXTRA_HEADER 987 988config ARCH_NPCM 989 bool "Support Nuvoton SoCs" 990 select DM 991 select OF_CONTROL 992 imply CMD_DM 993 994config ARCH_APPLE 995 bool "Apple SoCs" 996 select ARM64 997 select CLK 998 select CMD_PCI 999 select CMD_USB 1000 select DM 1001 select DM_GPIO 1002 select DM_KEYBOARD 1003 select DM_MAILBOX 1004 select DM_RESET 1005 select DM_SERIAL 1006 select DM_SPI 1007 select DM_USB 1008 select VIDEO 1009 select IOMMU 1010 select LINUX_KERNEL_IMAGE_HEADER 1011 select OF_BOARD_SETUP 1012 select OF_CONTROL 1013 select PCI 1014 select PINCTRL 1015 select POSITION_INDEPENDENT 1016 select POWER_DOMAIN 1017 select REGMAP 1018 select SPI 1019 select SYSCON 1020 select SYSRESET 1021 select SYSRESET_WATCHDOG 1022 select SYSRESET_WATCHDOG_AUTO 1023 select USB 1024 imply CMD_DM 1025 imply CMD_GPT 1026 imply DISTRO_DEFAULTS 1027 imply OF_HAS_PRIOR_STAGE 1028 1029config ARCH_OWL 1030 bool "Actions Semi OWL SoCs" 1031 select DM 1032 select DM_SERIAL 1033 select GPIO_EXTRA_HEADER 1034 select OWL_SERIAL 1035 select CLK 1036 select CLK_OWL 1037 select OF_CONTROL 1038 select SYS_RELOC_GD_ENV_ADDR 1039 imply CMD_DM 1040 1041config ARCH_QEMU 1042 bool "QEMU Virtual Platform" 1043 select DM 1044 select DM_SERIAL 1045 select OF_CONTROL 1046 select PL01X_SERIAL 1047 imply CMD_DM 1048 imply DM_RNG 1049 imply DM_RTC 1050 imply RTC_PL031 1051 imply OF_HAS_PRIOR_STAGE 1052 1053config ARCH_RMOBILE 1054 bool "Renesas ARM SoCs" 1055 select DM 1056 select DM_SERIAL 1057 select GPIO_EXTRA_HEADER 1058 imply BOARD_EARLY_INIT_F 1059 imply CMD_DM 1060 imply FAT_WRITE 1061 imply SYS_THUMB_BUILD 1062 imply ARCH_MISC_INIT if DISPLAY_CPUINFO 1063 1064config ARCH_SNAPDRAGON 1065 bool "Qualcomm Snapdragon SoCs" 1066 select ARM64 1067 select DM 1068 select DM_GPIO 1069 select DM_SERIAL 1070 select GPIO_EXTRA_HEADER 1071 select MSM_SMEM 1072 select OF_CONTROL 1073 select OF_SEPARATE 1074 select SMEM 1075 select SPMI 1076 imply CMD_DM 1077 1078config ARCH_SOCFPGA 1079 bool "Altera SOCFPGA family" 1080 select ARCH_EARLY_INIT_R 1081 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10 1082 select ARM64 if TARGET_SOCFPGA_SOC64 1083 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1084 select DM 1085 select DM_SERIAL 1086 select GICV2 1087 select GPIO_EXTRA_HEADER 1088 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1089 select OF_CONTROL 1090 select SPL_DM_RESET if DM_RESET 1091 select SPL_DM_SERIAL 1092 select SPL_LIBCOMMON_SUPPORT 1093 select SPL_LIBGENERIC_SUPPORT 1094 select SPL_OF_CONTROL 1095 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64 1096 select SPL_SERIAL 1097 select SPL_SYSRESET 1098 select SPL_WATCHDOG 1099 select SUPPORT_SPL 1100 select SYS_NS16550 1101 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1102 select SYSRESET 1103 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 1104 select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64 1105 imply CMD_DM 1106 imply CMD_MTDPARTS 1107 imply CRC32_VERIFY 1108 imply DM_SPI 1109 imply DM_SPI_FLASH 1110 imply FAT_WRITE 1111 imply SPL 1112 imply SPL_DM 1113 imply SPL_DM_SPI 1114 imply SPL_DM_SPI_FLASH 1115 imply SPL_LIBDISK_SUPPORT 1116 imply SPL_MMC 1117 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION 1118 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE 1119 imply SPL_SPI_FLASH_SUPPORT 1120 imply SPL_SPI 1121 imply L2X0_CACHE 1122 1123config ARCH_SUNXI 1124 bool "Support sunxi (Allwinner) SoCs" 1125 select BINMAN 1126 select CMD_GPIO 1127 select CMD_MMC if MMC 1128 select CMD_USB if DISTRO_DEFAULTS && USB_HOST 1129 select CLK 1130 select DM 1131 select DM_GPIO 1132 select DM_I2C if I2C 1133 select DM_SPI if SPI 1134 select DM_SPI_FLASH if SPI 1135 select DM_KEYBOARD 1136 select DM_MMC if MMC 1137 select DM_SCSI if SCSI 1138 select DM_SERIAL 1139 select GPIO_EXTRA_HEADER 1140 select OF_BOARD_SETUP 1141 select OF_CONTROL 1142 select OF_SEPARATE 1143 select PINCTRL 1144 select SPECIFY_CONSOLE_INDEX 1145 select SPL_SEPARATE_BSS if SPL 1146 select SPL_STACK_R if SPL 1147 select SPL_SYS_MALLOC_SIMPLE if SPL 1148 select SPL_SYS_THUMB_BUILD if !ARM64 1149 select SUNXI_GPIO 1150 select SYS_NS16550 1151 select SYS_THUMB_BUILD if !ARM64 1152 select USB if DISTRO_DEFAULTS 1153 select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST 1154 select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST 1155 select SPL_USE_TINY_PRINTF 1156 select USE_PREBOOT 1157 select SYS_RELOC_GD_ENV_ADDR 1158 imply BOARD_LATE_INIT 1159 imply CMD_DM 1160 imply CMD_GPT 1161 imply CMD_UBI if MTD_RAW_NAND 1162 imply DISTRO_DEFAULTS 1163 imply FAT_WRITE 1164 imply FIT 1165 imply OF_LIBFDT_OVERLAY 1166 imply PRE_CONSOLE_BUFFER 1167 imply SPL_GPIO 1168 imply SPL_LIBCOMMON_SUPPORT 1169 imply SPL_LIBGENERIC_SUPPORT 1170 imply SPL_MMC if MMC 1171 imply SPL_POWER 1172 imply SPL_SERIAL 1173 imply SYSRESET 1174 imply SYSRESET_WATCHDOG 1175 imply SYSRESET_WATCHDOG_AUTO 1176 imply USB_GADGET 1177 imply WDT 1178 1179config ARCH_U8500 1180 bool "ST-Ericsson U8500 Series" 1181 select CPU_V7A 1182 select DM 1183 select DM_GPIO 1184 select DM_MMC if MMC 1185 select DM_SERIAL 1186 select DM_USB_GADGET if DM_USB 1187 select OF_CONTROL 1188 select SYSRESET 1189 select TIMER 1190 imply AB8500_USB_PHY 1191 imply ARM_PL180_MMCI 1192 imply CLK 1193 imply DM_PMIC 1194 imply DM_RTC 1195 imply NOMADIK_GPIO 1196 imply NOMADIK_MTU_TIMER 1197 imply PHY 1198 imply PL01X_SERIAL 1199 imply PMIC_AB8500 1200 imply RTC_PL031 1201 imply SYS_THUMB_BUILD 1202 imply SYSRESET_SYSCON 1203 1204config ARCH_VERSAL 1205 bool "Support Xilinx Versal Platform" 1206 select ARM64 1207 select CLK 1208 select DM 1209 select DM_MMC if MMC 1210 select DM_SERIAL 1211 select GICV3 1212 select OF_CONTROL 1213 select SOC_DEVICE 1214 imply BOARD_LATE_INIT 1215 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1216 1217config ARCH_VERSAL_NET 1218 bool "Support Xilinx Versal NET Platform" 1219 select ARM64 1220 select CLK 1221 select DM 1222 select DM_MMC if MMC 1223 select DM_SERIAL 1224 select OF_CONTROL 1225 imply BOARD_LATE_INIT 1226 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1227 1228config ARCH_VF610 1229 bool "Freescale Vybrid" 1230 select CPU_V7A 1231 select GPIO_EXTRA_HEADER 1232 select IOMUX_SHARE_CONF_REG 1233 select MACH_IMX 1234 select SYS_FSL_ERRATUM_ESDHC111 1235 imply CMD_MTDPARTS 1236 imply MTD_RAW_NAND 1237 1238config ARCH_ZYNQ 1239 bool "Xilinx Zynq based platform" 1240 select ARM_TWD_TIMER 1241 select ARCH_EARLY_INIT_R if FPGA || (SPL && SPL_FPGA) 1242 select CLK 1243 select CLK_ZYNQ 1244 select CPU_V7A 1245 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART 1246 select DM 1247 select DM_MMC if MMC 1248 select DM_SERIAL 1249 select DM_SPI 1250 select DM_SPI_FLASH 1251 select OF_CONTROL 1252 select SPI 1253 select SPL_BOARD_INIT if SPL 1254 select SPL_CLK if SPL 1255 select SPL_DM if SPL 1256 select SPL_DM_SPI if SPL 1257 select SPL_DM_SPI_FLASH if SPL 1258 select SPL_OF_CONTROL if SPL 1259 select SPL_SEPARATE_BSS if SPL 1260 select SPL_TIMER if SPL 1261 select SUPPORT_SPL 1262 select TIMER 1263 imply BOARD_LATE_INIT 1264 imply CMD_CLK 1265 imply CMD_DM 1266 imply CMD_SPL 1267 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1268 imply FAT_WRITE 1269 1270config ARCH_ZYNQMP_R5 1271 bool "Xilinx ZynqMP R5 based platform" 1272 select CLK 1273 select CPU_V7R 1274 select DM 1275 select DM_MMC if MMC 1276 select DM_SERIAL 1277 select OF_CONTROL 1278 imply CMD_DM 1279 imply DM_USB_GADGET 1280 1281config ARCH_ZYNQMP 1282 bool "Xilinx ZynqMP based platform" 1283 select ARM64 1284 select CLK 1285 select DM 1286 select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART 1287 imply DM_MAILBOX 1288 select DM_MMC if MMC 1289 select DM_SERIAL 1290 select DM_SPI if SPI 1291 select DM_SPI_FLASH if DM_SPI 1292 imply FIRMWARE 1293 select GICV2 1294 select OF_CONTROL 1295 select SPL_BOARD_INIT if SPL 1296 select SPL_CLK if SPL 1297 select SPL_DM if SPL 1298 select SPL_DM_SPI if SPI && SPL_DM 1299 select SPL_DM_SPI_FLASH if SPL_DM_SPI 1300 select SPL_DM_MAILBOX if SPL 1301 imply SPL_FIRMWARE if SPL 1302 select SPL_SEPARATE_BSS if SPL 1303 select SUPPORT_SPL 1304 imply ZYNQMP_IPI if DM_MAILBOX 1305 select SOC_DEVICE 1306 imply BOARD_LATE_INIT 1307 imply CMD_DM 1308 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1309 imply FAT_WRITE 1310 imply MP 1311 imply DM_USB_GADGET 1312 imply ZYNQMP_GPIO_MODEPIN if DM_GPIO && USB 1313 1314config ARCH_TEGRA 1315 bool "NVIDIA Tegra" 1316 select GPIO_EXTRA_HEADER 1317 imply DISTRO_DEFAULTS 1318 imply FAT_WRITE 1319 imply SPL_TIMER if SPL 1320 1321config ARCH_VEXPRESS64 1322 bool "Support ARMv8 Arm Ltd. VExpress based boards and models" 1323 select ARM64 1324 select DM 1325 select DM_SERIAL 1326 select PL01X_SERIAL 1327 select OF_CONTROL 1328 select CLK 1329 select BLK 1330 select MTD_NOR_FLASH if MTD 1331 select FLASH_CFI_DRIVER if MTD 1332 select ENV_IS_IN_FLASH if MTD 1333 imply DISTRO_DEFAULTS 1334 1335config TARGET_CORSTONE1000 1336 bool "Support Corstone1000 Platform" 1337 select ARM64 1338 select PL01X_SERIAL 1339 select DM 1340 1341config TARGET_TOTAL_COMPUTE 1342 bool "Support Total Compute Platform" 1343 select ARM64 1344 select PL01X_SERIAL 1345 select DM 1346 select DM_SERIAL 1347 select DM_MMC 1348 select DM_GPIO 1349 1350config TARGET_LS2080A_EMU 1351 bool "Support ls2080a_emu" 1352 select ARCH_LS2080A 1353 select ARM64 1354 select ARMV8_MULTIENTRY 1355 select FSL_DDR_SYNC_REFRESH 1356 select GPIO_EXTRA_HEADER 1357 help 1358 Support for Freescale LS2080A_EMU platform. 1359 The LS2080A Development System (EMULATOR) is a pre-silicon 1360 development platform that supports the QorIQ LS2080A 1361 Layerscape Architecture processor. 1362 1363config TARGET_LS1088AQDS 1364 bool "Support ls1088aqds" 1365 select ARCH_LS1088A 1366 select ARM64 1367 select ARMV8_MULTIENTRY 1368 select ARCH_SUPPORT_TFABOOT 1369 select BOARD_LATE_INIT 1370 select GPIO_EXTRA_HEADER 1371 select SUPPORT_SPL 1372 select FSL_DDR_INTERACTIVE if !SD_BOOT 1373 help 1374 Support for NXP LS1088AQDS platform. 1375 The LS1088A Development System (QDS) is a high-performance 1376 development platform that supports the QorIQ LS1088A 1377 Layerscape Architecture processor. 1378 1379config TARGET_LS2080AQDS 1380 bool "Support ls2080aqds" 1381 select ARCH_LS2080A 1382 select ARM64 1383 select ARMV8_MULTIENTRY 1384 select ARCH_SUPPORT_TFABOOT 1385 select BOARD_LATE_INIT 1386 select GPIO_EXTRA_HEADER 1387 select SUPPORT_SPL 1388 imply SCSI 1389 imply SCSI_AHCI 1390 select FSL_DDR_BIST 1391 select FSL_DDR_INTERACTIVE if !SPL 1392 help 1393 Support for Freescale LS2080AQDS platform. 1394 The LS2080A Development System (QDS) is a high-performance 1395 development platform that supports the QorIQ LS2080A 1396 Layerscape Architecture processor. 1397 1398config TARGET_LS2080ARDB 1399 bool "Support ls2080ardb" 1400 select ARCH_LS2080A 1401 select ARM64 1402 select ARMV8_MULTIENTRY 1403 select ARCH_SUPPORT_TFABOOT 1404 select BOARD_LATE_INIT 1405 select SUPPORT_SPL 1406 select FSL_DDR_BIST 1407 select FSL_DDR_INTERACTIVE if !SPL 1408 select GPIO_EXTRA_HEADER 1409 imply SCSI 1410 imply SCSI_AHCI 1411 help 1412 Support for Freescale LS2080ARDB platform. 1413 The LS2080A Reference design board (RDB) is a high-performance 1414 development platform that supports the QorIQ LS2080A 1415 Layerscape Architecture processor. 1416 1417config TARGET_LS2081ARDB 1418 bool "Support ls2081ardb" 1419 select ARCH_LS2080A 1420 select ARM64 1421 select ARMV8_MULTIENTRY 1422 select BOARD_LATE_INIT 1423 select GPIO_EXTRA_HEADER 1424 select SUPPORT_SPL 1425 help 1426 Support for Freescale LS2081ARDB platform. 1427 The LS2081A Reference design board (RDB) is a high-performance 1428 development platform that supports the QorIQ LS2081A/LS2041A 1429 Layerscape Architecture processor. 1430 1431config TARGET_LX2160ARDB 1432 bool "Support lx2160ardb" 1433 select ARCH_LX2160A 1434 select ARM64 1435 select ARMV8_MULTIENTRY 1436 select ARCH_SUPPORT_TFABOOT 1437 select BOARD_LATE_INIT 1438 select GPIO_EXTRA_HEADER 1439 help 1440 Support for NXP LX2160ARDB platform. 1441 The lx2160ardb (LX2160A Reference design board (RDB) 1442 is a high-performance development platform that supports the 1443 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1444 1445config TARGET_LX2160AQDS 1446 bool "Support lx2160aqds" 1447 select ARCH_LX2160A 1448 select ARM64 1449 select ARMV8_MULTIENTRY 1450 select ARCH_SUPPORT_TFABOOT 1451 select BOARD_LATE_INIT 1452 select GPIO_EXTRA_HEADER 1453 help 1454 Support for NXP LX2160AQDS platform. 1455 The lx2160aqds (LX2160A QorIQ Development System (QDS) 1456 is a high-performance development platform that supports the 1457 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor. 1458 1459config TARGET_LX2162AQDS 1460 bool "Support lx2162aqds" 1461 select ARCH_LX2162A 1462 select ARCH_MISC_INIT 1463 select ARM64 1464 select ARMV8_MULTIENTRY 1465 select ARCH_SUPPORT_TFABOOT 1466 select BOARD_LATE_INIT 1467 select GPIO_EXTRA_HEADER 1468 help 1469 Support for NXP LX2162AQDS platform. 1470 The lx2162aqds support is based on LX2160A Layerscape Architecture processor. 1471 1472config TARGET_HIKEY 1473 bool "Support HiKey 96boards Consumer Edition Platform" 1474 select ARM64 1475 select DM 1476 select DM_GPIO 1477 select DM_SERIAL 1478 select GPIO_EXTRA_HEADER 1479 select OF_CONTROL 1480 select PL01X_SERIAL 1481 select SPECIFY_CONSOLE_INDEX 1482 imply CMD_DM 1483 help 1484 Support for HiKey 96boards platform. It features a HI6220 1485 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM. 1486 1487config TARGET_HIKEY960 1488 bool "Support HiKey960 96boards Consumer Edition Platform" 1489 select ARM64 1490 select DM 1491 select DM_SERIAL 1492 select GPIO_EXTRA_HEADER 1493 select OF_CONTROL 1494 select PL01X_SERIAL 1495 imply CMD_DM 1496 help 1497 Support for HiKey960 96boards platform. It features a HI3660 1498 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM. 1499 1500config TARGET_POPLAR 1501 bool "Support Poplar 96boards Enterprise Edition Platform" 1502 select ARM64 1503 select DM 1504 select DM_SERIAL 1505 select GPIO_EXTRA_HEADER 1506 select OF_CONTROL 1507 select PL01X_SERIAL 1508 imply CMD_DM 1509 help 1510 Support for Poplar 96boards EE platform. It features a HI3798cv200 1511 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU 1512 making it capable of running any commercial set-top solution based on 1513 Linux or Android. 1514 1515config TARGET_LS1012AQDS 1516 bool "Support ls1012aqds" 1517 select ARCH_LS1012A 1518 select ARM64 1519 select ARCH_SUPPORT_TFABOOT 1520 select BOARD_LATE_INIT 1521 select GPIO_EXTRA_HEADER 1522 help 1523 Support for Freescale LS1012AQDS platform. 1524 The LS1012A Development System (QDS) is a high-performance 1525 development platform that supports the QorIQ LS1012A 1526 Layerscape Architecture processor. 1527 1528config TARGET_LS1012ARDB 1529 bool "Support ls1012ardb" 1530 select ARCH_LS1012A 1531 select ARM64 1532 select ARCH_SUPPORT_TFABOOT 1533 select BOARD_LATE_INIT 1534 select GPIO_EXTRA_HEADER 1535 imply SCSI 1536 imply SCSI_AHCI 1537 help 1538 Support for Freescale LS1012ARDB platform. 1539 The LS1012A Reference design board (RDB) is a high-performance 1540 development platform that supports the QorIQ LS1012A 1541 Layerscape Architecture processor. 1542 1543config TARGET_LS1012A2G5RDB 1544 bool "Support ls1012a2g5rdb" 1545 select ARCH_LS1012A 1546 select ARM64 1547 select ARCH_SUPPORT_TFABOOT 1548 select BOARD_LATE_INIT 1549 select GPIO_EXTRA_HEADER 1550 imply SCSI 1551 help 1552 Support for Freescale LS1012A2G5RDB platform. 1553 The LS1012A 2G5 Reference design board (RDB) is a high-performance 1554 development platform that supports the QorIQ LS1012A 1555 Layerscape Architecture processor. 1556 1557config TARGET_LS1012AFRWY 1558 bool "Support ls1012afrwy" 1559 select ARCH_LS1012A 1560 select ARM64 1561 select ARCH_SUPPORT_TFABOOT 1562 select BOARD_LATE_INIT 1563 select GPIO_EXTRA_HEADER 1564 imply SCSI 1565 imply SCSI_AHCI 1566 help 1567 Support for Freescale LS1012AFRWY platform. 1568 The LS1012A FRWY board (FRWY) is a high-performance 1569 development platform that supports the QorIQ LS1012A 1570 Layerscape Architecture processor. 1571 1572config TARGET_LS1012AFRDM 1573 bool "Support ls1012afrdm" 1574 select ARCH_LS1012A 1575 select ARM64 1576 select ARCH_SUPPORT_TFABOOT 1577 select GPIO_EXTRA_HEADER 1578 help 1579 Support for Freescale LS1012AFRDM platform. 1580 The LS1012A Freedom board (FRDM) is a high-performance 1581 development platform that supports the QorIQ LS1012A 1582 Layerscape Architecture processor. 1583 1584config TARGET_LS1028AQDS 1585 bool "Support ls1028aqds" 1586 select ARCH_LS1028A 1587 select ARM64 1588 select ARMV8_MULTIENTRY 1589 select ARCH_SUPPORT_TFABOOT 1590 select BOARD_LATE_INIT 1591 select GPIO_EXTRA_HEADER 1592 help 1593 Support for Freescale LS1028AQDS platform 1594 The LS1028A Development System (QDS) is a high-performance 1595 development platform that supports the QorIQ LS1028A 1596 Layerscape Architecture processor. 1597 1598config TARGET_LS1028ARDB 1599 bool "Support ls1028ardb" 1600 select ARCH_LS1028A 1601 select ARM64 1602 select ARMV8_MULTIENTRY 1603 select ARCH_SUPPORT_TFABOOT 1604 select BOARD_LATE_INIT 1605 select GPIO_EXTRA_HEADER 1606 help 1607 Support for Freescale LS1028ARDB platform 1608 The LS1028A Development System (RDB) is a high-performance 1609 development platform that supports the QorIQ LS1028A 1610 Layerscape Architecture processor. 1611 1612config TARGET_LS1088ARDB 1613 bool "Support ls1088ardb" 1614 select ARCH_LS1088A 1615 select ARM64 1616 select ARMV8_MULTIENTRY 1617 select ARCH_SUPPORT_TFABOOT 1618 select BOARD_LATE_INIT 1619 select SUPPORT_SPL 1620 select FSL_DDR_INTERACTIVE if !SD_BOOT 1621 select GPIO_EXTRA_HEADER 1622 help 1623 Support for NXP LS1088ARDB platform. 1624 The LS1088A Reference design board (RDB) is a high-performance 1625 development platform that supports the QorIQ LS1088A 1626 Layerscape Architecture processor. 1627 1628config TARGET_LS1021AQDS 1629 bool "Support ls1021aqds" 1630 select ARCH_LS1021A 1631 select ARCH_SUPPORT_PSCI 1632 select BOARD_EARLY_INIT_F 1633 select BOARD_LATE_INIT 1634 select CPU_V7A 1635 select CPU_V7_HAS_NONSEC 1636 select CPU_V7_HAS_VIRT 1637 select LS1_DEEP_SLEEP 1638 select PEN_ADDR_BIG_ENDIAN 1639 select SUPPORT_SPL 1640 select SYS_FSL_DDR 1641 select FSL_DDR_INTERACTIVE 1642 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1643 select GPIO_EXTRA_HEADER 1644 select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI 1645 imply SCSI 1646 1647config TARGET_LS1021ATWR 1648 bool "Support ls1021atwr" 1649 select ARCH_LS1021A 1650 select ARCH_SUPPORT_PSCI 1651 select BOARD_EARLY_INIT_F 1652 select BOARD_LATE_INIT 1653 select CPU_V7A 1654 select CPU_V7_HAS_NONSEC 1655 select CPU_V7_HAS_VIRT 1656 select LS1_DEEP_SLEEP 1657 select PEN_ADDR_BIG_ENDIAN 1658 select SUPPORT_SPL 1659 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1660 select GPIO_EXTRA_HEADER 1661 imply SCSI 1662 1663config TARGET_PG_WCOM_SELI8 1664 bool "Support Hitachi-Powergrids SELI8 service unit card" 1665 select ARCH_LS1021A 1666 select ARCH_SUPPORT_PSCI 1667 select BOARD_EARLY_INIT_F 1668 select BOARD_LATE_INIT 1669 select CPU_V7A 1670 select CPU_V7_HAS_NONSEC 1671 select CPU_V7_HAS_VIRT 1672 select SYS_FSL_DDR 1673 select FSL_DDR_INTERACTIVE 1674 select GPIO_EXTRA_HEADER 1675 select VENDOR_KM 1676 imply SCSI 1677 help 1678 Support for Hitachi-Powergrids SELI8 service unit card. 1679 SELI8 is a QorIQ LS1021a based service unit card used 1680 in XMC20 and FOX615 product families. 1681 1682config TARGET_PG_WCOM_EXPU1 1683 bool "Support Hitachi-Powergrids EXPU1 service unit card" 1684 select ARCH_LS1021A 1685 select ARCH_SUPPORT_PSCI 1686 select BOARD_EARLY_INIT_F 1687 select BOARD_LATE_INIT 1688 select CPU_V7A 1689 select CPU_V7_HAS_NONSEC 1690 select CPU_V7_HAS_VIRT 1691 select SYS_FSL_DDR 1692 select FSL_DDR_INTERACTIVE 1693 select VENDOR_KM 1694 imply SCSI 1695 help 1696 Support for Hitachi-Powergrids EXPU1 service unit card. 1697 EXPU1 is a QorIQ LS1021a based service unit card used 1698 in XMC20 and FOX615 product families. 1699 1700config TARGET_LS1021ATSN 1701 bool "Support ls1021atsn" 1702 select ARCH_LS1021A 1703 select ARCH_SUPPORT_PSCI 1704 select BOARD_EARLY_INIT_F 1705 select BOARD_LATE_INIT 1706 select CPU_V7A 1707 select CPU_V7_HAS_NONSEC 1708 select CPU_V7_HAS_VIRT 1709 select LS1_DEEP_SLEEP 1710 select SUPPORT_SPL 1711 select GPIO_EXTRA_HEADER 1712 imply SCSI 1713 1714config TARGET_LS1021AIOT 1715 bool "Support ls1021aiot" 1716 select ARCH_LS1021A 1717 select ARCH_SUPPORT_PSCI 1718 select BOARD_LATE_INIT 1719 select CPU_V7A 1720 select CPU_V7_HAS_NONSEC 1721 select CPU_V7_HAS_VIRT 1722 select PEN_ADDR_BIG_ENDIAN 1723 select SUPPORT_SPL 1724 select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI 1725 select GPIO_EXTRA_HEADER 1726 imply SCSI 1727 help 1728 Support for Freescale LS1021AIOT platform. 1729 The LS1021A Freescale board (IOT) is a high-performance 1730 development platform that supports the QorIQ LS1021A 1731 Layerscape Architecture processor. 1732 1733config TARGET_LS1043AQDS 1734 bool "Support ls1043aqds" 1735 select ARCH_LS1043A 1736 select ARM64 1737 select ARMV8_MULTIENTRY 1738 select ARCH_SUPPORT_TFABOOT 1739 select BOARD_EARLY_INIT_F 1740 select BOARD_LATE_INIT 1741 select SUPPORT_SPL 1742 select FSL_DDR_INTERACTIVE if !SPL 1743 select FSL_DSPI if !SPL_NO_DSPI 1744 select DM_SPI_FLASH if FSL_DSPI 1745 select GPIO_EXTRA_HEADER 1746 imply SCSI 1747 imply SCSI_AHCI 1748 help 1749 Support for Freescale LS1043AQDS platform. 1750 1751config TARGET_LS1043ARDB 1752 bool "Support ls1043ardb" 1753 select ARCH_LS1043A 1754 select ARM64 1755 select ARMV8_MULTIENTRY 1756 select ARCH_SUPPORT_TFABOOT 1757 select BOARD_EARLY_INIT_F 1758 select BOARD_LATE_INIT 1759 select SUPPORT_SPL 1760 select FSL_DSPI if !SPL_NO_DSPI 1761 select DM_SPI_FLASH if FSL_DSPI 1762 select GPIO_EXTRA_HEADER 1763 help 1764 Support for Freescale LS1043ARDB platform. 1765 1766config TARGET_LS1046AQDS 1767 bool "Support ls1046aqds" 1768 select ARCH_LS1046A 1769 select ARM64 1770 select ARMV8_MULTIENTRY 1771 select ARCH_SUPPORT_TFABOOT 1772 select BOARD_EARLY_INIT_F 1773 select BOARD_LATE_INIT 1774 select DM_SPI_FLASH if DM_SPI 1775 select SUPPORT_SPL 1776 select FSL_DDR_BIST if !SPL 1777 select FSL_DDR_INTERACTIVE if !SPL 1778 select FSL_DDR_INTERACTIVE if !SPL 1779 select GPIO_EXTRA_HEADER 1780 imply SCSI 1781 help 1782 Support for Freescale LS1046AQDS platform. 1783 The LS1046A Development System (QDS) is a high-performance 1784 development platform that supports the QorIQ LS1046A 1785 Layerscape Architecture processor. 1786 1787config TARGET_LS1046ARDB 1788 bool "Support ls1046ardb" 1789 select ARCH_LS1046A 1790 select ARM64 1791 select ARMV8_MULTIENTRY 1792 select ARCH_SUPPORT_TFABOOT 1793 select BOARD_EARLY_INIT_F 1794 select BOARD_LATE_INIT 1795 select DM_SPI_FLASH if DM_SPI 1796 select POWER_MC34VR500 1797 select SUPPORT_SPL 1798 select FSL_DDR_BIST 1799 select FSL_DDR_INTERACTIVE if !SPL 1800 select GPIO_EXTRA_HEADER 1801 imply SCSI 1802 help 1803 Support for Freescale LS1046ARDB platform. 1804 The LS1046A Reference Design Board (RDB) is a high-performance 1805 development platform that supports the QorIQ LS1046A 1806 Layerscape Architecture processor. 1807 1808config TARGET_LS1046AFRWY 1809 bool "Support ls1046afrwy" 1810 select ARCH_LS1046A 1811 select ARM64 1812 select ARMV8_MULTIENTRY 1813 select ARCH_SUPPORT_TFABOOT 1814 select BOARD_EARLY_INIT_F 1815 select BOARD_LATE_INIT 1816 select DM_SPI_FLASH if DM_SPI 1817 select GPIO_EXTRA_HEADER 1818 imply SCSI 1819 help 1820 Support for Freescale LS1046AFRWY platform. 1821 The LS1046A Freeway Board (FRWY) is a high-performance 1822 development platform that supports the QorIQ LS1046A 1823 Layerscape Architecture processor. 1824 1825config TARGET_SL28 1826 bool "Support sl28" 1827 select ARCH_LS1028A 1828 select ARM64 1829 select ARMV8_MULTIENTRY 1830 select SUPPORT_SPL 1831 select BINMAN 1832 select DM 1833 select DM_GPIO 1834 select DM_I2C 1835 select DM_MMC 1836 select DM_SPI_FLASH 1837 select DM_MDIO 1838 select PCI 1839 select DM_RNG 1840 select DM_RTC 1841 select DM_SCSI 1842 select DM_SERIAL 1843 select DM_SPI 1844 select GPIO_EXTRA_HEADER 1845 select SPL_DM if SPL 1846 select SPL_DM_SPI if SPL 1847 select SPL_DM_SPI_FLASH if SPL 1848 select SPL_DM_I2C if SPL 1849 select SPL_DM_MMC if SPL 1850 select SPL_DM_SERIAL if SPL 1851 help 1852 Support for Kontron SMARC-sAL28 board. 1853 1854config TARGET_TEN64 1855 bool "Support ten64" 1856 select ARCH_LS1088A 1857 select ARCH_MISC_INIT 1858 select ARM64 1859 select ARMV8_MULTIENTRY 1860 select ARCH_SUPPORT_TFABOOT 1861 select BOARD_LATE_INIT 1862 select SUPPORT_SPL 1863 select FSL_DDR_INTERACTIVE if !SD_BOOT 1864 select GPIO_EXTRA_HEADER 1865 help 1866 Support for Traverse Technologies Ten64 board, based 1867 on NXP LS1088A. 1868 1869config ARCH_UNIPHIER 1870 bool "Socionext UniPhier SoCs" 1871 select BOARD_LATE_INIT 1872 select DM 1873 select DM_GPIO 1874 select DM_I2C 1875 select DM_MMC 1876 select DM_MTD 1877 select DM_RESET 1878 select DM_SERIAL 1879 select OF_BOARD_SETUP 1880 select OF_CONTROL 1881 select OF_LIBFDT 1882 select PINCTRL 1883 select SPL_BOARD_INIT if SPL 1884 select SPL_DM if SPL 1885 select SPL_LIBCOMMON_SUPPORT if SPL 1886 select SPL_LIBGENERIC_SUPPORT if SPL 1887 select SPL_OF_CONTROL if SPL 1888 select SPL_PINCTRL if SPL 1889 select SUPPORT_SPL 1890 imply CMD_DM 1891 imply DISTRO_DEFAULTS 1892 imply FAT_WRITE 1893 help 1894 Support for UniPhier SoC family developed by Socionext Inc. 1895 (formerly, System LSI Business Division of Panasonic Corporation) 1896 1897config ARCH_SYNQUACER 1898 bool "Socionext SynQuacer SoCs" 1899 select ARM64 1900 select DM 1901 select GIC_V3 1902 select PSCI_RESET 1903 select SYSRESET 1904 select SYSRESET_PSCI 1905 select OF_CONTROL 1906 help 1907 Support for SynQuacer SoC family developed by Socionext Inc. 1908 This SoC is used on 96boards EE DeveloperBox. 1909 1910config ARCH_STM32 1911 bool "Support STMicroelectronics STM32 MCU with cortex M" 1912 select CPU_V7M 1913 select DM 1914 select DM_SERIAL 1915 imply CMD_DM 1916 1917config ARCH_STI 1918 bool "Support STMicroelectronics SoCs" 1919 select BLK 1920 select CPU_V7A 1921 select DM 1922 select DM_MMC 1923 select DM_RESET 1924 select DM_SERIAL 1925 imply CMD_DM 1926 help 1927 Support for STMicroelectronics STiH407/10 SoC family. 1928 This SoC is used on Linaro 96Board STiH410-B2260 1929 1930config ARCH_STM32MP 1931 bool "Support STMicroelectronics STM32MP Socs with cortex A" 1932 select ARCH_MISC_INIT 1933 select ARCH_SUPPORT_TFABOOT 1934 select BOARD_LATE_INIT 1935 select CLK 1936 select DM 1937 select DM_GPIO 1938 select DM_RESET 1939 select DM_SERIAL 1940 select MISC 1941 select OF_CONTROL 1942 select OF_LIBFDT 1943 select OF_SYSTEM_SETUP 1944 select PINCTRL 1945 select REGMAP 1946 select SYSCON 1947 select SYSRESET 1948 select SYS_THUMB_BUILD 1949 imply SPL_SYSRESET 1950 imply CMD_DM 1951 imply CMD_POWEROFF 1952 imply OF_LIBFDT_OVERLAY 1953 imply ENV_VARS_UBOOT_RUNTIME_CONFIG 1954 imply USE_PREBOOT 1955 imply TIMESTAMP 1956 help 1957 Support for STM32MP SoC family developed by STMicroelectronics, 1958 MPUs based on ARM cortex A core 1959 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL). 1960 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot 1961 chain. 1962 SPL is the unsecure FSBL for the basic boot chain. 1963 1964config ARCH_ROCKCHIP 1965 bool "Support Rockchip SoCs" 1966 select BLK 1967 select BINMAN if SPL_OPTEE || SPL 1968 select DM 1969 select DM_GPIO 1970 select DM_I2C 1971 select DM_MMC 1972 select DM_PWM 1973 select DM_REGULATOR 1974 select DM_SERIAL 1975 select DM_SPI 1976 select DM_SPI_FLASH 1977 select ENABLE_ARM_SOC_BOOT0_HOOK 1978 select OF_CONTROL 1979 select SPI 1980 select SPL_DM if SPL 1981 select SPL_DM_SPI if SPL 1982 select SPL_DM_SPI_FLASH if SPL 1983 select SYS_MALLOC_F 1984 select SYS_THUMB_BUILD if !ARM64 1985 imply ADC 1986 imply CMD_DM 1987 imply DEBUG_UART_BOARD_INIT 1988 imply BOOTSTD_DEFAULTS 1989 imply FAT_WRITE 1990 imply SARADC_ROCKCHIP 1991 imply SPL_SYSRESET 1992 imply SPL_SYS_MALLOC_SIMPLE 1993 imply SYS_NS16550 1994 imply TPL_SYSRESET 1995 imply USB_FUNCTION_FASTBOOT 1996 1997config ARCH_OCTEONTX 1998 bool "Support OcteonTX SoCs" 1999 select CLK 2000 select DM 2001 select GPIO_EXTRA_HEADER 2002 select ARM64 2003 select OF_CONTROL 2004 select OF_LIVE 2005 select BOARD_LATE_INIT 2006 select SYS_CACHE_SHIFT_7 2007 select SYS_PCI_64BIT if PCI 2008 imply OF_HAS_PRIOR_STAGE 2009 2010config ARCH_OCTEONTX2 2011 bool "Support OcteonTX2 SoCs" 2012 select CLK 2013 select DM 2014 select GPIO_EXTRA_HEADER 2015 select ARM64 2016 select OF_CONTROL 2017 select OF_LIVE 2018 select BOARD_LATE_INIT 2019 select SYS_CACHE_SHIFT_7 2020 select SYS_PCI_64BIT if PCI 2021 imply OF_HAS_PRIOR_STAGE 2022 2023config TARGET_THUNDERX_88XX 2024 bool "Support ThunderX 88xx" 2025 select ARM64 2026 select GPIO_EXTRA_HEADER 2027 select OF_CONTROL 2028 select PL01X_SERIAL 2029 select SYS_CACHE_SHIFT_7 2030 2031config ARCH_ASPEED 2032 bool "Support Aspeed SoCs" 2033 select DM 2034 select OF_CONTROL 2035 imply CMD_DM 2036 2037config TARGET_DURIAN 2038 bool "Support Phytium Durian Platform" 2039 select ARM64 2040 select GPIO_EXTRA_HEADER 2041 help 2042 Support for durian platform. 2043 It has 2GB Sdram, uart and pcie. 2044 2045config TARGET_POMELO 2046 bool "Support Phytium Pomelo Platform" 2047 select ARM64 2048 select DM 2049 select AHCI 2050 select SCSI_AHCI 2051 select AHCI_PCI 2052 select BLK 2053 select PCI 2054 select DM_PCI 2055 select SCSI 2056 select DM_SCSI 2057 select DM_SERIAL 2058 imply CMD_PCI 2059 help 2060 Support for pomelo platform. 2061 It has 8GB Sdram, uart and pcie. 2062 2063config TARGET_PRESIDIO_ASIC 2064 bool "Support Cortina Presidio ASIC Platform" 2065 select ARM64 2066 select GICV2 2067 2068config TARGET_XENGUEST_ARM64 2069 bool "Xen guest ARM64" 2070 select ARM64 2071 select XEN 2072 select OF_CONTROL 2073 select LINUX_KERNEL_IMAGE_HEADER 2074 select XEN_SERIAL 2075 imply OF_HAS_PRIOR_STAGE 2076 2077config ARCH_GXP 2078 bool "Support HPE GXP SoCs" 2079 select DM 2080 select OF_CONTROL 2081 imply CMD_DM 2082 2083endchoice 2084 2085config SUPPORT_PASSING_ATAGS 2086 bool "Support pre-devicetree ATAG-based booting" 2087 depends on !ARM64 2088 imply SETUP_MEMORY_TAGS 2089 help 2090 Support for booting older Linux kernels, using ATAGs rather than 2091 passing a devicetree. This is option is rarely used, and the 2092 semantics are defined at 2093 https://www.kernel.org/doc/Documentation/arm/Booting at section 4a. 2094 2095config SETUP_MEMORY_TAGS 2096 bool "Pass memory size information via ATAG" 2097 depends on SUPPORT_PASSING_ATAGS 2098 2099config CMDLINE_TAG 2100 bool "Pass Linux kernel cmdline via ATAG" 2101 depends on SUPPORT_PASSING_ATAGS 2102 2103config INITRD_TAG 2104 bool "Pass initrd starting point and size via ATAG" 2105 depends on SUPPORT_PASSING_ATAGS 2106 2107config REVISION_TAG 2108 bool "Pass system revision via ATAG" 2109 depends on SUPPORT_PASSING_ATAGS 2110 2111config SERIAL_TAG 2112 bool "Pass system serial number via ATAG" 2113 depends on SUPPORT_PASSING_ATAGS 2114 2115config STATIC_MACH_TYPE 2116 bool "Statically define the Machine ID number" 2117 default y if TARGET_DS109 || TARGET_NOKIA_RX51 || TARGET_DS414 || DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac" 2118 help 2119 When booting via ATAGs, enable this option if we know the correct 2120 machine ID number to use at compile time. Some systems will be 2121 passed the number dynamically by whatever loads U-Boot. 2122 2123config MACH_TYPE 2124 int "Machine ID number" 2125 depends on STATIC_MACH_TYPE 2126 default 527 if TARGET_DS109 2127 default 1955 if TARGET_NOKIA_RX51 2128 default 3036 if TARGET_DS414 2129 default 4283 if DEFAULT_DEVICE_TREE = "sun7i-a20-icnova-swac" 2130 help 2131 When booting via ATAGs, the machine type must be passed as a number. 2132 For the full list see https://www.arm.linux.org.uk/developer/machines 2133 2134config ARCH_SUPPORT_TFABOOT 2135 bool 2136 2137config TFABOOT 2138 bool "Support for booting from TF-A" 2139 depends on ARCH_SUPPORT_TFABOOT 2140 help 2141 Some platforms support the setup of secure registers (for instance 2142 for CPU errata handling) or provide secure services like PSCI. 2143 Those services could also be provided by other firmware parts 2144 like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot 2145 does not need to (and cannot) execute this code. 2146 Enabling this option will make a U-Boot binary that is relying 2147 on other firmware layers to provide secure functionality. 2148 2149config TI_SECURE_DEVICE 2150 bool "HS Device Type Support" 2151 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3 2152 help 2153 If a high secure (HS) device type is being used, this config 2154 must be set. This option impacts various aspects of the 2155 build system (to create signed boot images that can be 2156 authenticated) and the code. See the doc/README.ti-secure 2157 file for further details. 2158 2159config SYS_KWD_CONFIG 2160 string "kwbimage config file path" 2161 depends on ARCH_KIRKWOOD || ARCH_MVEBU 2162 default "arch/arm/mach-mvebu/kwbimage.cfg" 2163 help 2164 Path within the source directory to the kwbimage.cfg file to use 2165 when packaging the U-Boot image for use. 2166 2167source "arch/arm/mach-apple/Kconfig" 2168 2169source "arch/arm/mach-aspeed/Kconfig" 2170 2171source "arch/arm/mach-at91/Kconfig" 2172 2173source "arch/arm/mach-bcm283x/Kconfig" 2174 2175source "arch/arm/mach-bcmbca/Kconfig" 2176 2177source "arch/arm/mach-bcmstb/Kconfig" 2178 2179source "arch/arm/mach-davinci/Kconfig" 2180 2181source "arch/arm/mach-exynos/Kconfig" 2182 2183source "arch/arm/mach-hpe/gxp/Kconfig" 2184 2185source "arch/arm/mach-highbank/Kconfig" 2186 2187source "arch/arm/mach-histb/Kconfig" 2188 2189source "arch/arm/mach-integrator/Kconfig" 2190 2191source "arch/arm/mach-ipq40xx/Kconfig" 2192 2193source "arch/arm/mach-k3/Kconfig" 2194 2195source "arch/arm/mach-keystone/Kconfig" 2196 2197source "arch/arm/mach-kirkwood/Kconfig" 2198 2199source "arch/arm/mach-lpc32xx/Kconfig" 2200 2201source "arch/arm/mach-mvebu/Kconfig" 2202 2203source "arch/arm/mach-octeontx/Kconfig" 2204 2205source "arch/arm/mach-octeontx2/Kconfig" 2206 2207source "arch/arm/cpu/armv7/ls102xa/Kconfig" 2208 2209source "arch/arm/mach-imx/mx3/Kconfig" 2210 2211source "arch/arm/mach-imx/mx5/Kconfig" 2212 2213source "arch/arm/mach-imx/mx6/Kconfig" 2214 2215source "arch/arm/mach-imx/mx7/Kconfig" 2216 2217source "arch/arm/mach-imx/mx7ulp/Kconfig" 2218 2219source "arch/arm/mach-imx/imx8/Kconfig" 2220 2221source "arch/arm/mach-imx/imx8m/Kconfig" 2222 2223source "arch/arm/mach-imx/imx8ulp/Kconfig" 2224 2225source "arch/arm/mach-imx/imx9/Kconfig" 2226 2227source "arch/arm/mach-imx/imxrt/Kconfig" 2228 2229source "arch/arm/mach-imx/mxs/Kconfig" 2230 2231source "arch/arm/mach-omap2/Kconfig" 2232 2233source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig" 2234 2235source "arch/arm/mach-orion5x/Kconfig" 2236 2237source "arch/arm/mach-owl/Kconfig" 2238 2239source "arch/arm/mach-rmobile/Kconfig" 2240 2241source "arch/arm/mach-meson/Kconfig" 2242 2243source "arch/arm/mach-mediatek/Kconfig" 2244 2245source "arch/arm/mach-qemu/Kconfig" 2246 2247source "arch/arm/mach-rockchip/Kconfig" 2248 2249source "arch/arm/mach-s5pc1xx/Kconfig" 2250 2251source "arch/arm/mach-snapdragon/Kconfig" 2252 2253source "arch/arm/mach-socfpga/Kconfig" 2254 2255source "arch/arm/mach-sti/Kconfig" 2256 2257source "arch/arm/mach-stm32/Kconfig" 2258 2259source "arch/arm/mach-stm32mp/Kconfig" 2260 2261source "arch/arm/mach-sunxi/Kconfig" 2262 2263source "arch/arm/mach-tegra/Kconfig" 2264 2265source "arch/arm/mach-u8500/Kconfig" 2266 2267source "arch/arm/mach-uniphier/Kconfig" 2268 2269source "arch/arm/cpu/armv7/vf610/Kconfig" 2270 2271source "arch/arm/mach-zynq/Kconfig" 2272 2273source "arch/arm/mach-zynqmp/Kconfig" 2274 2275source "arch/arm/mach-versal/Kconfig" 2276 2277source "arch/arm/mach-versal-net/Kconfig" 2278 2279source "arch/arm/mach-zynqmp-r5/Kconfig" 2280 2281source "arch/arm/cpu/armv7/Kconfig" 2282 2283source "arch/arm/cpu/armv8/Kconfig" 2284 2285source "arch/arm/mach-imx/Kconfig" 2286 2287source "arch/arm/mach-nexell/Kconfig" 2288 2289source "arch/arm/mach-npcm/Kconfig" 2290 2291source "board/armltd/total_compute/Kconfig" 2292source "board/armltd/corstone1000/Kconfig" 2293source "board/bosch/shc/Kconfig" 2294source "board/bosch/guardian/Kconfig" 2295source "board/Marvell/octeontx/Kconfig" 2296source "board/Marvell/octeontx2/Kconfig" 2297source "board/armltd/vexpress/Kconfig" 2298source "board/armltd/vexpress64/Kconfig" 2299source "board/cortina/presidio-asic/Kconfig" 2300source "board/broadcom/bcmns/Kconfig" 2301source "board/broadcom/bcmns3/Kconfig" 2302source "board/cavium/thunderx/Kconfig" 2303source "board/eets/pdu001/Kconfig" 2304source "board/emulation/qemu-arm/Kconfig" 2305source "board/freescale/ls2080aqds/Kconfig" 2306source "board/freescale/ls2080ardb/Kconfig" 2307source "board/freescale/ls1088a/Kconfig" 2308source "board/freescale/ls1028a/Kconfig" 2309source "board/freescale/ls1021aqds/Kconfig" 2310source "board/freescale/ls1043aqds/Kconfig" 2311source "board/freescale/ls1021atwr/Kconfig" 2312source "board/freescale/ls1021atsn/Kconfig" 2313source "board/freescale/ls1021aiot/Kconfig" 2314source "board/freescale/ls1046aqds/Kconfig" 2315source "board/freescale/ls1043ardb/Kconfig" 2316source "board/freescale/ls1046ardb/Kconfig" 2317source "board/freescale/ls1046afrwy/Kconfig" 2318source "board/freescale/ls1012aqds/Kconfig" 2319source "board/freescale/ls1012ardb/Kconfig" 2320source "board/freescale/ls1012afrdm/Kconfig" 2321source "board/freescale/lx2160a/Kconfig" 2322source "board/grinn/chiliboard/Kconfig" 2323source "board/hisilicon/hikey/Kconfig" 2324source "board/hisilicon/hikey960/Kconfig" 2325source "board/hisilicon/poplar/Kconfig" 2326source "board/isee/igep003x/Kconfig" 2327source "board/kontron/sl28/Kconfig" 2328source "board/myir/mys_6ulx/Kconfig" 2329source "board/samsung/common/Kconfig" 2330source "board/siemens/common/Kconfig" 2331source "board/seeed/npi_imx6ull/Kconfig" 2332source "board/socionext/developerbox/Kconfig" 2333source "board/st/stv0991/Kconfig" 2334source "board/tcl/sl50/Kconfig" 2335source "board/traverse/ten64/Kconfig" 2336source "board/variscite/dart_6ul/Kconfig" 2337source "board/vscom/baltos/Kconfig" 2338source "board/phytium/durian/Kconfig" 2339source "board/phytium/pomelo/Kconfig" 2340source "board/xen/xenguest_arm64/Kconfig" 2341 2342source "arch/arm/Kconfig.debug" 2343 2344endmenu 2345