1menu "Reset Controller Support"
2
3config DM_RESET
4	bool "Enable reset controllers using Driver Model"
5	depends on DM && OF_CONTROL
6	help
7	  Enable support for the reset controller driver class. Many hardware
8	  modules are equipped with a reset signal, typically driven by some
9	  reset controller hardware module within the chip. In U-Boot, reset
10	  controller drivers allow control over these reset signals. In some
11	  cases this API is applicable to chips outside the CPU as well,
12	  although driving such reset isgnals using GPIOs may be more
13	  appropriate in this case.
14
15config SANDBOX_RESET
16	bool "Enable the sandbox reset test driver"
17	depends on DM_MAILBOX && SANDBOX
18	help
19	  Enable support for a test reset controller implementation, which
20	  simply accepts requests to reset various HW modules without actually
21	  doing anything beyond a little error checking.
22
23config STI_RESET
24	bool "Enable the STi reset"
25	depends on ARCH_STI
26	help
27	  Support for reset controllers on STMicroelectronics STiH407 family SoCs.
28	  Say Y if you want to control reset signals provided by system config
29	  block.
30
31config STM32_RESET
32	bool "Enable the STM32 reset"
33	depends on ARCH_STM32 || ARCH_STM32MP
34	help
35	  Support for reset controllers on STMicroelectronics STM32 family SoCs.
36	  This reset driver is compatible with STM32 F4/F7 and H7 SoCs.
37
38config TEGRA_CAR_RESET
39	bool "Enable Tegra CAR-based reset driver"
40	depends on TEGRA_CAR
41	help
42	  Enable support for manipulating Tegra's on-SoC reset signals via
43	  direct register access to the Tegra CAR (Clock And Reset controller).
44
45config TEGRA186_RESET
46	bool "Enable Tegra186 BPMP-based reset driver"
47	depends on TEGRA186_BPMP
48	help
49	  Enable support for manipulating Tegra's on-SoC reset signals via IPC
50	  requests to the BPMP (Boot and Power Management Processor).
51
52config RESET_TI_SCI
53	bool "TI System Control Interface (TI SCI) reset driver"
54	depends on DM_RESET && TI_SCI_PROTOCOL
55	help
56	  This enables the reset driver support over TI System Control Interface
57	  available on some new TI's SoCs. If you wish to use reset resources
58	  managed by the TI System Controller, say Y here. Otherwise, say N.
59
60config RESET_BCM6345
61	bool "Reset controller driver for BCM6345"
62	depends on DM_RESET && ARCH_BMIPS
63	help
64	  Support reset controller on BCM6345.
65
66config RESET_UNIPHIER
67	bool "Reset controller driver for UniPhier SoCs"
68	depends on ARCH_UNIPHIER
69	default y
70	help
71	  Support for reset controllers on UniPhier SoCs.
72	  Say Y if you want to control reset signals provided by System Control
73	  block, Media I/O block, Peripheral Block.
74
75config RESET_AST2500
76	bool "Reset controller driver for AST2500 SoCs"
77	depends on DM_RESET
78	default y if ASPEED_AST2500
79	help
80	  Support for reset controller on AST2500 SoC.
81	  Say Y if you want to control reset signals of different peripherals
82	  through System Control Unit (SCU).
83
84config RESET_AST2600
85	bool "Reset controller driver for AST2600 SoCs"
86	depends on DM_RESET
87	default y if ASPEED_AST2600
88	help
89	  Support for reset controller on AST2600 SoC.
90	  Say Y if you want to control reset signals of different peripherals
91	  through System Control Unit (SCU).
92
93config RESET_ROCKCHIP
94	bool "Reset controller driver for Rockchip SoCs"
95	depends on DM_RESET && ARCH_ROCKCHIP && CLK
96	default y
97	help
98	  Support for reset controller on rockchip SoC. The main limitation
99	  though is that some reset signals, like I2C or MISC reset multiple
100	  devices.
101
102config RESET_HSDK
103	bool "Synopsys HSDK Reset Driver"
104	depends on DM_RESET && TARGET_HSDK
105	default y
106	help
107	  This enables the reset controller driver for HSDK board.
108
109config RESET_MESON
110	bool "Reset controller driver for Amlogic Meson SoCs"
111	depends on DM_RESET && ARCH_MESON
112	imply REGMAP
113	default y
114	help
115	  Support for reset controller on Amlogic Meson SoC.
116
117config RESET_SOCFPGA
118	bool "Reset controller driver for SoCFPGA"
119	depends on DM_RESET && ARCH_SOCFPGA
120	default y
121	help
122	  Support for reset controller on SoCFPGA platform.
123
124config RESET_MEDIATEK
125	bool "Reset controller driver for MediaTek SoCs"
126	depends on DM_RESET && ARCH_MEDIATEK && CLK
127	default y
128	help
129	  Support for reset controller on MediaTek SoCs.
130
131config RESET_MTMIPS
132	bool "Reset controller driver for MediaTek MIPS platform"
133	depends on DM_RESET && ARCH_MTMIPS
134	default y
135	help
136	  Support for reset controller on MediaTek MIPS platform.
137
138config RESET_SUNXI
139	bool "RESET support for Allwinner SoCs"
140	depends on DM_RESET && ARCH_SUNXI
141	default y
142	help
143	  This enables support for common reset driver for
144	  Allwinner SoCs.
145
146config RESET_HISILICON
147	bool "Reset controller driver for HiSilicon SoCs"
148	depends on DM_RESET
149	help
150	  Support for reset controller on HiSilicon SoCs.
151
152config RESET_IMX7
153	bool "i.MX7/8 Reset Driver"
154	depends on DM_RESET && (ARCH_MX7 || ARCH_IMX8M)
155	default y
156	help
157	  Support for reset controller on i.MX7/8 SoCs.
158
159config RESET_QCOM
160	bool "Reset driver for Qualcomm SoCs"
161	depends on DM_RESET && (ARCH_SNAPDRAGON || ARCH_IPQ40XX)
162	default y
163	help
164	  Support for reset controller on Qualcomm SoCs.
165
166config RESET_SIFIVE
167	bool "Reset Driver for SiFive SoC's"
168	depends on DM_RESET && CLK_SIFIVE_PRCI && (TARGET_SIFIVE_UNLEASHED || TARGET_SIFIVE_UNMATCHED)
169	default y
170	help
171	  PRCI module within SiFive SoC's provides mechanism to reset
172	  different hw blocks like DDR, gemgxl. With this driver we leverage
173	  U-Boot's reset framework to reset these hardware blocks.
174
175config RESET_JH7110
176	bool "Reset driver for StarFive JH7110 SoC"
177	depends on DM_RESET && STARFIVE_JH7110
178	default y
179	help
180	  Support for reset controller on StarFive
181	  JH7110 SoCs.
182
183config SPL_RESET_JH7110
184	bool "SPL Reset driver for StarFive JH7110 SoC"
185	depends on SPL && STARFIVE_JH7110
186	default y
187	help
188	  Support for reset controller on StarFive
189	  JH7110 SoCs in SPL.
190
191config RESET_SYSCON
192	bool "Enable generic syscon reset driver support"
193	depends on DM_RESET
194	help
195	  Support generic syscon mapped register reset devices.
196
197config RESET_RASPBERRYPI
198	bool "Raspberry Pi 4 Firmware Reset Controller Driver"
199	depends on DM_RESET && ARCH_BCM283X
200	default USB_XHCI_PCI
201	help
202	  Raspberry Pi 4's co-processor controls some of the board's HW
203	  initialization process, but it's up to Linux to trigger it when
204	  relevant. This driver provides a reset controller capable of
205	  interfacing with RPi4's co-processor and model these firmware
206	  initialization routines as reset lines.
207
208config RESET_SCMI
209	bool "Enable SCMI reset domain driver"
210	select SCMI_FIRMWARE
211	help
212	  Enable this option if you want to support reset controller
213	  devices exposed by a SCMI agent based on SCMI reset domain
214	  protocol communication with a SCMI server.
215
216config RESET_ZYNQMP
217	bool "Reset Driver for Xilinx ZynqMP & Versal SoC's"
218	depends on DM_RESET && ZYNQMP_FIRMWARE
219	help
220	  Support for reset controller on Xilinx ZynqMP & Versal SoC's. Driver
221	  is only passing request via Xilinx firmware interface to TF-A and PMU
222	  firmware.
223
224config RESET_DRA7
225	bool "Support for TI's DRA7 Reset driver"
226	depends on DM_RESET
227	help
228	  Support for TI DRA7-RESET subsystem. Basic Assert/Deassert
229	  is supported.
230
231config RESET_AT91
232	bool "Enable support for Microchip/Atmel Reset Controller driver"
233	depends on DM_RESET && ARCH_AT91
234	help
235	  This enables the Reset Controller driver support for Microchip/Atmel
236	  SoCs. Mainly used to expose assert/deassert methods to other drivers
237	  that require it.
238endmenu
239