1 /* SPDX-License-Identifier: MIT */ 2 /****************************************************************************** 3 * arch-arm.h 4 * 5 * Guest OS interface to ARM Xen. 6 * 7 * Copyright 2011 (C) Citrix Systems 8 */ 9 10 #ifndef __XEN_PUBLIC_ARCH_ARM_H__ 11 #define __XEN_PUBLIC_ARCH_ARM_H__ 12 13 /* 14 * `incontents 50 arm_abi Hypercall Calling Convention 15 * 16 * A hypercall is issued using the ARM HVC instruction. 17 * 18 * A hypercall can take up to 5 arguments. These are passed in 19 * registers, the first argument in x0/r0 (for arm64/arm32 guests 20 * respectively irrespective of whether the underlying hypervisor is 21 * 32- or 64-bit), the second argument in x1/r1, the third in x2/r2, 22 * the forth in x3/r3 and the fifth in x4/r4. 23 * 24 * The hypercall number is passed in r12 (arm) or x16 (arm64). In both 25 * cases the relevant ARM procedure calling convention specifies this 26 * is an inter-procedure-call scratch register (e.g. for use in linker 27 * stubs). This use does not conflict with use during a hypercall. 28 * 29 * The HVC ISS must contain a Xen specific TAG: XEN_HYPERCALL_TAG. 30 * 31 * The return value is in x0/r0. 32 * 33 * The hypercall will clobber x16/r12 and the argument registers used 34 * by that hypercall (except r0 which is the return value) i.e. in 35 * addition to x16/r12 a 2 argument hypercall will clobber x1/r1 and a 36 * 4 argument hypercall will clobber x1/r1, x2/r2 and x3/r3. 37 * 38 * Parameter structs passed to hypercalls are laid out according to 39 * the Procedure Call Standard for the ARM Architecture (AAPCS, AKA 40 * EABI) and Procedure Call Standard for the ARM 64-bit Architecture 41 * (AAPCS64). Where there is a conflict the 64-bit standard should be 42 * used regardless of guest type. Structures which are passed as 43 * hypercall arguments are always little endian. 44 * 45 * All memory which is shared with other entities in the system 46 * (including the hypervisor and other guests) must reside in memory 47 * which is mapped as Normal Inner Write-Back Outer Write-Back Inner-Shareable. 48 * This applies to: 49 * - hypercall arguments passed via a pointer to guest memory. 50 * - memory shared via the grant table mechanism (including PV I/O 51 * rings etc). 52 * - memory shared with the hypervisor (struct shared_info, struct 53 * vcpu_info, the grant table, etc). 54 * 55 * Any cache allocation hints are acceptable. 56 */ 57 58 /* 59 * `incontents 55 arm_hcall Supported Hypercalls 60 * 61 * Xen on ARM makes extensive use of hardware facilities and therefore 62 * only a subset of the potential hypercalls are required. 63 * 64 * Since ARM uses second stage paging any machine/physical addresses 65 * passed to hypercalls are Guest Physical Addresses (Intermediate 66 * Physical Addresses) unless otherwise noted. 67 * 68 * The following hypercalls (and sub operations) are supported on the 69 * ARM platform. Other hypercalls should be considered 70 * unavailable/unsupported. 71 * 72 * HYPERVISOR_memory_op 73 * All generic sub-operations 74 * 75 * HYPERVISOR_domctl 76 * All generic sub-operations, with the exception of: 77 * * XEN_DOMCTL_irq_permission (not yet implemented) 78 * 79 * HYPERVISOR_sched_op 80 * All generic sub-operations, with the exception of: 81 * * SCHEDOP_block -- prefer wfi hardware instruction 82 * 83 * HYPERVISOR_console_io 84 * All generic sub-operations 85 * 86 * HYPERVISOR_xen_version 87 * All generic sub-operations 88 * 89 * HYPERVISOR_event_channel_op 90 * All generic sub-operations 91 * 92 * HYPERVISOR_physdev_op 93 * Exactly these sub-operations are supported: 94 * PHYSDEVOP_pci_device_add 95 * PHYSDEVOP_pci_device_remove 96 * 97 * HYPERVISOR_sysctl 98 * All generic sub-operations, with the exception of: 99 * * XEN_SYSCTL_page_offline_op 100 * * XEN_SYSCTL_get_pmstat 101 * * XEN_SYSCTL_pm_op 102 * 103 * HYPERVISOR_hvm_op 104 * Exactly these sub-operations are supported: 105 * * HVMOP_set_param 106 * * HVMOP_get_param 107 * * HVMOP_guest_request_vm_event 108 * 109 * HYPERVISOR_grant_table_op 110 * All generic sub-operations 111 * 112 * HYPERVISOR_vcpu_op 113 * Exactly these sub-operations are supported: 114 * * VCPUOP_register_vcpu_info 115 * * VCPUOP_register_runstate_memory_area 116 * 117 * HYPERVISOR_argo_op 118 * All generic sub-operations 119 * 120 * HYPERVISOR_hypfs_op 121 * All generic sub-operations 122 * 123 * HYPERVISOR_platform_op 124 * Exactly these sub-operations are supported: 125 * * XENPF_settime64 126 * 127 * HYPERVISOR_vm_assist 128 * All generic sub-operations 129 * 130 * HYPERVISOR_dm_op 131 * Exactly these sub-operations are supported: 132 * * XEN_DMOP_create_ioreq_server 133 * * XEN_DMOP_get_ioreq_server_info 134 * * XEN_DMOP_map_io_range_to_ioreq_server 135 * * XEN_DMOP_unmap_io_range_from_ioreq_server 136 * * XEN_DMOP_set_ioreq_server_state 137 * * XEN_DMOP_destroy_ioreq_server 138 * * XEN_DMOP_set_irq_level 139 * * XEN_DMOP_nr_vcpus 140 * 141 * HYPERVISOR_xsm_op 142 * All generic sub-operations 143 * 144 * HYPERVISOR_multicall 145 * 146 * Other notes on the ARM ABI: 147 * 148 * - struct start_info is not exported to ARM guests. 149 * 150 * - struct shared_info is mapped by ARM guests using the 151 * HYPERVISOR_memory_op sub-op XENMEM_add_to_physmap, passing 152 * XENMAPSPACE_shared_info as space parameter. 153 * 154 * - All the per-cpu struct vcpu_info are mapped by ARM guests using the 155 * HYPERVISOR_vcpu_op sub-op VCPUOP_register_vcpu_info, including cpu0 156 * struct vcpu_info. 157 * 158 * - The grant table is mapped using the HYPERVISOR_memory_op sub-op 159 * XENMEM_add_to_physmap, passing XENMAPSPACE_grant_table as space 160 * parameter. The memory range specified under the Xen compatible 161 * hypervisor node on device tree can be used as target gpfn for the 162 * mapping. 163 * 164 * - Xenstore is initialized by using the two hvm_params 165 * HVM_PARAM_STORE_PFN and HVM_PARAM_STORE_EVTCHN. They can be read 166 * with the HYPERVISOR_hvm_op sub-op HVMOP_get_param. 167 * 168 * - The paravirtualized console is initialized by using the two 169 * hvm_params HVM_PARAM_CONSOLE_PFN and HVM_PARAM_CONSOLE_EVTCHN. They 170 * can be read with the HYPERVISOR_hvm_op sub-op HVMOP_get_param. 171 * 172 * - Event channel notifications are delivered using the percpu GIC 173 * interrupt specified under the Xen compatible hypervisor node on 174 * device tree. 175 * 176 * - The device tree Xen compatible node is fully described under Linux 177 * at Documentation/devicetree/bindings/arm/xen.txt. 178 */ 179 180 #define XEN_HYPERCALL_TAG 0XEA1 181 182 #if defined(__XEN__) || defined(__XEN_TOOLS__) || defined(__GNUC__) 183 #define int64_aligned_t int64_t __attribute__((__aligned__(8))) 184 #define uint64_aligned_t uint64_t __attribute__((__aligned__(8))) 185 #endif 186 187 #ifndef __ASSEMBLY__ 188 #define ___DEFINE_XEN_GUEST_HANDLE(name, type) \ 189 typedef union { type *p; unsigned long q; } \ 190 __guest_handle_ ## name; \ 191 typedef union { type *p; uint64_aligned_t q; } \ 192 __guest_handle_64_ ## name 193 194 /* 195 * XEN_GUEST_HANDLE represents a guest pointer, when passed as a field 196 * in a struct in memory. On ARM is always 8 bytes sizes and 8 bytes 197 * aligned. 198 * XEN_GUEST_HANDLE_PARAM represents a guest pointer, when passed as an 199 * hypercall argument. It is 4 bytes on aarch32 and 8 bytes on aarch64. 200 */ 201 #define __DEFINE_XEN_GUEST_HANDLE(name, type) \ 202 ___DEFINE_XEN_GUEST_HANDLE(name, type); \ 203 ___DEFINE_XEN_GUEST_HANDLE(const_##name, const type) 204 #define DEFINE_XEN_GUEST_HANDLE(name) __DEFINE_XEN_GUEST_HANDLE(name, name) 205 #define __XEN_GUEST_HANDLE(name) __guest_handle_64_ ## name 206 #define XEN_GUEST_HANDLE(name) __XEN_GUEST_HANDLE(name) 207 #define XEN_GUEST_HANDLE_PARAM(name) __guest_handle_ ## name 208 #define set_xen_guest_handle_raw(hnd, val) \ 209 do { \ 210 __typeof__(&(hnd)) _sxghr_tmp = &(hnd); \ 211 _sxghr_tmp->q = 0; \ 212 _sxghr_tmp->p = (val); \ 213 } while ( 0 ) 214 #define set_xen_guest_handle(hnd, val) set_xen_guest_handle_raw(hnd, val) 215 216 typedef uint64_t xen_pfn_t; 217 #define PRI_xen_pfn PRIx64 218 #define PRIu_xen_pfn PRIu64 219 220 /* 221 * Maximum number of virtual CPUs in legacy multi-processor guests. 222 * Only one. All other VCPUS must use VCPUOP_register_vcpu_info. 223 */ 224 #define XEN_LEGACY_MAX_VCPUS 1 225 226 typedef uint64_t xen_ulong_t; 227 #define PRI_xen_ulong PRIx64 228 229 #if defined(__XEN__) || defined(__XEN_TOOLS__) 230 #if defined(__GNUC__) && !defined(__STRICT_ANSI__) 231 /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */ 232 # define __DECL_REG(n64, n32) union { \ 233 uint64_t n64; \ 234 uint32_t n32; \ 235 } 236 #else 237 /* Non-gcc sources must always use the proper 64-bit name (e.g., x0). */ 238 #define __DECL_REG(n64, n32) uint64_t n64 239 #endif 240 241 struct vcpu_guest_core_regs 242 { 243 /* Aarch64 Aarch32 */ 244 __DECL_REG(x0, r0_usr); 245 __DECL_REG(x1, r1_usr); 246 __DECL_REG(x2, r2_usr); 247 __DECL_REG(x3, r3_usr); 248 __DECL_REG(x4, r4_usr); 249 __DECL_REG(x5, r5_usr); 250 __DECL_REG(x6, r6_usr); 251 __DECL_REG(x7, r7_usr); 252 __DECL_REG(x8, r8_usr); 253 __DECL_REG(x9, r9_usr); 254 __DECL_REG(x10, r10_usr); 255 __DECL_REG(x11, r11_usr); 256 __DECL_REG(x12, r12_usr); 257 258 __DECL_REG(x13, sp_usr); 259 __DECL_REG(x14, lr_usr); 260 261 __DECL_REG(x15, __unused_sp_hyp); 262 263 __DECL_REG(x16, lr_irq); 264 __DECL_REG(x17, sp_irq); 265 266 __DECL_REG(x18, lr_svc); 267 __DECL_REG(x19, sp_svc); 268 269 __DECL_REG(x20, lr_abt); 270 __DECL_REG(x21, sp_abt); 271 272 __DECL_REG(x22, lr_und); 273 __DECL_REG(x23, sp_und); 274 275 __DECL_REG(x24, r8_fiq); 276 __DECL_REG(x25, r9_fiq); 277 __DECL_REG(x26, r10_fiq); 278 __DECL_REG(x27, r11_fiq); 279 __DECL_REG(x28, r12_fiq); 280 281 __DECL_REG(x29, sp_fiq); 282 __DECL_REG(x30, lr_fiq); 283 284 /* Return address and mode */ 285 __DECL_REG(pc64, pc32); /* ELR_EL2 */ 286 uint64_t cpsr; /* SPSR_EL2 */ 287 288 union { 289 uint64_t spsr_el1; /* AArch64 */ 290 uint32_t spsr_svc; /* AArch32 */ 291 }; 292 293 /* AArch32 guests only */ 294 uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt; 295 296 /* AArch64 guests only */ 297 uint64_t sp_el0; 298 uint64_t sp_el1, elr_el1; 299 }; 300 typedef struct vcpu_guest_core_regs vcpu_guest_core_regs_t; 301 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_core_regs_t); 302 303 #undef __DECL_REG 304 305 struct vcpu_guest_context { 306 #define _VGCF_online 0 307 #define VGCF_online (1<<_VGCF_online) 308 uint32_t flags; /* VGCF_* */ 309 310 struct vcpu_guest_core_regs user_regs; /* Core CPU registers */ 311 312 uint64_t sctlr; 313 uint64_t ttbcr, ttbr0, ttbr1; 314 }; 315 typedef struct vcpu_guest_context vcpu_guest_context_t; 316 DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); 317 318 /* 319 * struct xen_arch_domainconfig's ABI is covered by 320 * XEN_DOMCTL_INTERFACE_VERSION. 321 */ 322 #define XEN_DOMCTL_CONFIG_GIC_NATIVE 0 323 #define XEN_DOMCTL_CONFIG_GIC_V2 1 324 #define XEN_DOMCTL_CONFIG_GIC_V3 2 325 326 #define XEN_DOMCTL_CONFIG_TEE_NONE 0 327 #define XEN_DOMCTL_CONFIG_TEE_OPTEE 1 328 #define XEN_DOMCTL_CONFIG_TEE_FFA 2 329 330 struct xen_arch_domainconfig { 331 /* IN/OUT */ 332 uint8_t gic_version; 333 /* IN - Contains SVE vector length divided by 128 */ 334 uint8_t sve_vl; 335 /* IN */ 336 uint16_t tee_type; 337 /* IN */ 338 uint32_t nr_spis; 339 /* 340 * OUT 341 * Based on the property clock-frequency in the DT timer node. 342 * The property may be present when the bootloader/firmware doesn't 343 * set correctly CNTFRQ which hold the timer frequency. 344 * 345 * As it's not possible to trap this register, we have to replicate 346 * the value in the guest DT. 347 * 348 * = 0 => property not present 349 * > 0 => Value of the property 350 * 351 */ 352 uint32_t clock_frequency; 353 }; 354 #endif /* __XEN__ || __XEN_TOOLS__ */ 355 356 struct arch_vcpu_info { 357 }; 358 typedef struct arch_vcpu_info arch_vcpu_info_t; 359 360 struct arch_shared_info { 361 }; 362 typedef struct arch_shared_info arch_shared_info_t; 363 typedef uint64_t xen_callback_t; 364 365 #endif 366 367 #if defined(__XEN__) || defined(__XEN_TOOLS__) 368 369 /* PSR bits (CPSR, SPSR) */ 370 371 #define PSR_THUMB (1U <<5) /* Thumb Mode enable */ 372 #define PSR_FIQ_MASK (1U <<6) /* Fast Interrupt mask */ 373 #define PSR_IRQ_MASK (1U <<7) /* Interrupt mask */ 374 #define PSR_ABT_MASK (1U <<8) /* Asynchronous Abort mask */ 375 #define PSR_BIG_ENDIAN (1U << 9) /* arm32: Big Endian Mode */ 376 #define PSR_DBG_MASK (1U << 9) /* arm64: Debug Exception mask */ 377 #define PSR_IT_MASK (0x0600fc00U) /* Thumb If-Then Mask */ 378 #define PSR_JAZELLE (1U << 24) /* Jazelle Mode */ 379 #define PSR_Z (1U << 30) /* Zero condition flag */ 380 381 /* 32 bit modes */ 382 #define PSR_MODE_USR 0x10U 383 #define PSR_MODE_FIQ 0x11U 384 #define PSR_MODE_IRQ 0x12U 385 #define PSR_MODE_SVC 0x13U 386 #define PSR_MODE_MON 0x16U 387 #define PSR_MODE_ABT 0x17U 388 #define PSR_MODE_HYP 0x1aU 389 #define PSR_MODE_UND 0x1bU 390 #define PSR_MODE_SYS 0x1fU 391 392 /* 64 bit modes */ 393 #define PSR_MODE_BIT 0x10U /* Set iff AArch32 */ 394 #define PSR_MODE_EL3h 0x0dU 395 #define PSR_MODE_EL3t 0x0cU 396 #define PSR_MODE_EL2h 0x09U 397 #define PSR_MODE_EL2t 0x08U 398 #define PSR_MODE_EL1h 0x05U 399 #define PSR_MODE_EL1t 0x04U 400 #define PSR_MODE_EL0t 0x00U 401 402 /* 403 * We set PSR_Z to be able to boot Linux kernel versions with an invalid 404 * encoding of the first 8 NOP instructions. See commit a92882a4d270 in 405 * Linux. 406 * 407 * Note that PSR_Z is also set by U-Boot and QEMU -kernel when loading 408 * zImage kernels on aarch32. 409 */ 410 #define PSR_GUEST32_INIT (PSR_Z|PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_SVC) 411 #define PSR_GUEST64_INIT (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK|PSR_MODE_EL1h) 412 413 #define SCTLR_GUEST_INIT xen_mk_ullong(0x00c50078) 414 415 /* 416 * Virtual machine platform (memory layout, interrupts) 417 * 418 * These are defined for consistency between the tools and the 419 * hypervisor. Guests must not rely on these hardcoded values but 420 * should instead use the FDT. 421 */ 422 423 /* Physical Address Space */ 424 425 /* Virtio MMIO mappings */ 426 #define GUEST_VIRTIO_MMIO_BASE xen_mk_ullong(0x02000000) 427 #define GUEST_VIRTIO_MMIO_SIZE xen_mk_ullong(0x00100000) 428 429 /* 430 * vGIC mappings: Only one set of mapping is used by the guest. 431 * Therefore they can overlap. 432 */ 433 434 /* vGIC v2 mappings */ 435 #define GUEST_GICD_BASE xen_mk_ullong(0x03001000) 436 #define GUEST_GICD_SIZE xen_mk_ullong(0x00001000) 437 #define GUEST_GICC_BASE xen_mk_ullong(0x03002000) 438 #define GUEST_GICC_SIZE xen_mk_ullong(0x00002000) 439 440 /* vGIC v3 mappings */ 441 #define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000) 442 #define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000) 443 444 #define GUEST_GICV3_RDIST_REGIONS 1 445 446 #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */ 447 #define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000) 448 449 /* 450 * 256 MB is reserved for VPCI configuration space based on calculation 451 * 256 buses x 32 devices x 8 functions x 4 KB = 256 MB 452 */ 453 #define GUEST_VPCI_ECAM_BASE xen_mk_ullong(0x10000000) 454 #define GUEST_VPCI_ECAM_SIZE xen_mk_ullong(0x10000000) 455 456 /* ACPI tables physical address */ 457 #define GUEST_ACPI_BASE xen_mk_ullong(0x20000000) 458 #define GUEST_ACPI_SIZE xen_mk_ullong(0x02000000) 459 460 /* PL011 mappings */ 461 #define GUEST_PL011_BASE xen_mk_ullong(0x22000000) 462 #define GUEST_PL011_SIZE xen_mk_ullong(0x00001000) 463 464 /* Guest PCI-PCIe memory space where config space and BAR will be available.*/ 465 #define GUEST_VPCI_ADDR_TYPE_MEM xen_mk_ullong(0x02000000) 466 #define GUEST_VPCI_MEM_ADDR xen_mk_ullong(0x23000000) 467 #define GUEST_VPCI_MEM_SIZE xen_mk_ullong(0x10000000) 468 469 /* 470 * 16MB == 4096 pages reserved for guest to use as a region to map its 471 * grant table in. 472 */ 473 #define GUEST_GNTTAB_BASE xen_mk_ullong(0x38000000) 474 #define GUEST_GNTTAB_SIZE xen_mk_ullong(0x01000000) 475 476 #define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000) 477 #define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000) 478 479 #define GUEST_RAM_BANKS 2 480 481 /* 482 * The way to find the extended regions (to be exposed to the guest as unused 483 * address space) relies on the fact that the regions reserved for the RAM 484 * below are big enough to also accommodate such regions. 485 */ 486 #define GUEST_RAM0_BASE xen_mk_ullong(0x40000000) /* 3GB of low RAM @ 1GB */ 487 #define GUEST_RAM0_SIZE xen_mk_ullong(0xc0000000) 488 489 /* 4GB @ 4GB Prefetch Memory for VPCI */ 490 #define GUEST_VPCI_ADDR_TYPE_PREFETCH_MEM xen_mk_ullong(0x43000000) 491 #define GUEST_VPCI_PREFETCH_MEM_ADDR xen_mk_ullong(0x100000000) 492 #define GUEST_VPCI_PREFETCH_MEM_SIZE xen_mk_ullong(0x100000000) 493 494 #define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016GB of RAM @ 8GB */ 495 #define GUEST_RAM1_SIZE xen_mk_ullong(0xfe00000000) 496 497 #define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */ 498 /* Largest amount of actual RAM, not including holes */ 499 #define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE) 500 /* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */ 501 #define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } 502 #define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } 503 504 /* Current supported guest VCPUs */ 505 #define GUEST_MAX_VCPUS 128 506 507 /* Interrupts */ 508 509 #define GUEST_TIMER_VIRT_PPI 27 510 #define GUEST_TIMER_PHYS_S_PPI 29 511 #define GUEST_TIMER_PHYS_NS_PPI 30 512 #define GUEST_EVTCHN_PPI 31 513 514 #define GUEST_VPL011_SPI 32 515 516 #define GUEST_VIRTIO_MMIO_SPI_FIRST 33 517 #define GUEST_VIRTIO_MMIO_SPI_LAST 43 518 519 /* 520 * SGI is the preferred delivery mechanism of FF-A pending notifications or 521 * schedule recveive interrupt. SGIs 8-15 are normally not used by a guest 522 * as they in a non-virtualized system typically are assigned to the secure 523 * world. Here we're free to use SGI 8-15 since they are virtual and have 524 * nothing to do with the secure world. 525 * 526 * For partitioning of SGIs see also Arm Base System Architecture v1.0C, 527 * https://developer.arm.com/documentation/den0094/ 528 */ 529 #define GUEST_FFA_NOTIF_PEND_INTR_ID 8 530 #define GUEST_FFA_SCHEDULE_RECV_INTR_ID 9 531 532 /* PSCI functions */ 533 #define PSCI_cpu_suspend 0 534 #define PSCI_cpu_off 1 535 #define PSCI_cpu_on 2 536 #define PSCI_migrate 3 537 538 #endif 539 540 #ifndef __ASSEMBLY__ 541 /* Stub definition of PMU structure */ 542 typedef struct xen_pmu_arch { uint8_t dummy; } xen_pmu_arch_t; 543 #endif 544 545 #endif /* __XEN_PUBLIC_ARCH_ARM_H__ */ 546 547 /* 548 * Local variables: 549 * mode: C 550 * c-file-style: "BSD" 551 * c-basic-offset: 4 552 * tab-width: 4 553 * indent-tabs-mode: nil 554 * End: 555 */ 556