1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2019 NXP 4 * Copyright 2022 Linaro 5 */ 6 7 #ifndef __IMX8MP_RSB3720_H 8 #define __IMX8MP_RSB3720_H 9 10 #include <linux/sizes.h> 11 #include <linux/stringify.h> 12 #include <asm/arch/imx-regs.h> 13 #include <config_distro_bootcmd.h> 14 15 #define CFG_SYS_UBOOT_BASE (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) 16 17 /* GUIDs for capsule updatable firmware images */ 18 #define IMX8MP_RSB3720A1_4G_FIT_IMAGE_GUID \ 19 EFI_GUID(0xb1251e89, 0x384a, 0x4635, 0xa8, 0x06, \ 20 0x3a, 0xa0, 0xb0, 0xe9, 0xf9, 0x65) 21 22 #define IMX8MP_RSB3720A1_6G_FIT_IMAGE_GUID \ 23 EFI_GUID(0xb5fb6f08, 0xe142, 0x4db1, 0x97, 0xea, \ 24 0x5f, 0xd3, 0x6b, 0x9b, 0xe5, 0xb9) 25 26 #ifdef CONFIG_SPL_BUILD 27 #define CFG_MALLOC_F_ADDR 0x184000 /* malloc f used before \ 28 * GD_FLG_FULL_MALLOC_INIT \ 29 * set \ 30 */ 31 #endif 32 33 /* ENET Config */ 34 /* ENET1 */ 35 #if defined(CONFIG_CMD_NET) 36 #define CFG_FEC_MXC_PHYADDR 4 37 38 #define PHY_ANEG_TIMEOUT 20000 39 40 #endif 41 42 #if IS_ENABLED(CONFIG_CMD_MMC) 43 # define BOOT_TARGET_MMC(func) \ 44 func(MMC, mmc, 2) \ 45 func(MMC, mmc, 1) 46 #else 47 # define BOOT_TARGET_MMC(func) 48 #endif 49 50 #if CONFIG_IS_ENABLED(CMD_PXE) 51 # define BOOT_TARGET_PXE(func) func(PXE, pxe, na) 52 #else 53 # define BOOT_TARGET_PXE(func) 54 #endif 55 56 #if CONFIG_IS_ENABLED(CMD_DHCP) 57 # define BOOT_TARGET_DHCP(func) func(DHCP, dhcp, na) 58 #else 59 # define BOOT_TARGET_DHCP(func) 60 #endif 61 62 #define BOOT_TARGET_DEVICES(func) \ 63 BOOT_TARGET_MMC(func) \ 64 BOOT_TARGET_PXE(func) \ 65 BOOT_TARGET_DHCP(func) 66 67 /* Initial environment variables */ 68 #define CFG_EXTRA_ENV_SETTINGS \ 69 BOOTENV \ 70 "script=boot.scr\0" \ 71 "image=Image\0" \ 72 "splashimage=0x50000000\0" \ 73 "console=ttymxc2,115200 earlycon=ec_imx6q,0x30880000,115200\0" \ 74 "fdt_addr=0x43000000\0" \ 75 "fdt_addr_r=0x43000000\0" \ 76 "boot_fit=no\0" \ 77 "dfu_alt_info=mmc 2=flash-bin raw 0 0x1B00 mmcpart 1\0" \ 78 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 79 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \ 80 "initrd_addr=0x43800000\0" \ 81 "bootm_size=0x10000000\0" \ 82 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \ 83 "mmcpart=1\0" \ 84 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ 85 "mmcautodetect=yes\0" \ 86 "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \ 87 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 88 "bootscript=echo Running bootscript from mmc ...; " \ 89 "source\0" \ 90 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ 91 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ 92 "kernel_addr_r=0x40480000\0" \ 93 "pxefile_addr_r=0x40480000\0" \ 94 "ramdisk_addr_r=0x43800000\0" \ 95 "mmcboot=echo Booting from mmc ...; " \ 96 "run mmcargs; " \ 97 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ 98 "bootm ${loadaddr}; " \ 99 "else " \ 100 "if run loadfdt; then " \ 101 "booti ${loadaddr} - ${fdt_addr}; " \ 102 "else " \ 103 "echo WARN: Cannot load the DT; " \ 104 "fi; " \ 105 "fi;\0" \ 106 "netargs=setenv bootargs ${jh_clk} console=${console} " \ 107 "root=/dev/nfs " \ 108 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 109 "netboot=echo Booting from net ...; " \ 110 "run netargs; " \ 111 "if test ${ip_dyn} = yes; then " \ 112 "setenv get_cmd dhcp; " \ 113 "else " \ 114 "setenv get_cmd tftp; " \ 115 "fi; " \ 116 "${get_cmd} ${loadaddr} ${image}; " \ 117 "if test ${boot_fit} = yes || test ${boot_fit} = try; then " \ 118 "bootm ${loadaddr}; " \ 119 "else " \ 120 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 121 "booti ${loadaddr} - ${fdt_addr}; " \ 122 "else " \ 123 "echo WARN: Cannot load the DT; " \ 124 "fi; " \ 125 "fi;\0" 126 127 /* Link Definitions */ 128 #define CFG_SYS_INIT_RAM_ADDR 0x40000000 129 #define CFG_SYS_INIT_RAM_SIZE 0x80000 130 131 132 /* Totally 6GB or 4G DDR */ 133 #define CFG_SYS_SDRAM_BASE 0x40000000 134 #define PHYS_SDRAM 0x40000000 135 #if defined(CONFIG_TARGET_IMX8MP_RSB3720A1_6G) 136 #define PHYS_SDRAM_SIZE 0xC0000000 /* 3 GB */ 137 #define PHYS_SDRAM_2 0x100000000 138 #define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */ 139 #elif defined(CONFIG_TARGET_IMX8MP_RSB3720A1_4G) 140 #define PHYS_SDRAM_SIZE 0x80000000 /* 2 GB */ 141 #define PHYS_SDRAM_2 0xC0000000 142 #define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */ 143 #endif 144 145 #define CFG_MXC_UART_BASE UART3_BASE_ADDR 146 147 #define CFG_SYS_FSL_USDHC_NUM 2 148 #define CFG_SYS_FSL_ESDHC_ADDR 0 149 150 #ifdef CONFIG_FSL_FSPI 151 #define FSL_FSPI_FLASH_SIZE SZ_32M 152 #define FSL_FSPI_FLASH_NUM 1 153 #define FSPI0_BASE_ADDR 0x30bb0000 154 #define FSPI0_AMBA_BASE 0x0 155 #endif 156 157 #ifdef CONFIG_NAND_MXS 158 159 /* NAND stuff */ 160 #define CFG_SYS_NAND_BASE 0x20000000 161 #endif /* CONFIG_NAND_MXS */ 162 163 #endif /* __IMX8MP_RSB3720_H */ 164