1#
2# PINCTRL infrastructure and drivers
3#
4
5menu "Pin controllers"
6
7config PINCTRL
8	bool "Support pin controllers"
9	depends on DM
10	help
11	  This enables the basic support for pinctrl framework.  You may want
12	  to enable some more options depending on what you want to do.
13
14config PINCTRL_FULL
15	bool "Support full pin controllers"
16	depends on PINCTRL && OF_CONTROL
17	default y
18	help
19	  This provides Linux-compatible device tree interface for the pinctrl
20	  subsystem.  This feature depends on device tree configuration because
21	  it parses a device tree to look for the pinctrl device which the
22	  peripheral device is associated with.
23
24	  If this option is disabled (it is the only possible choice for non-DT
25	  boards), the pinctrl core provides no systematic mechanism for
26	  identifying peripheral devices, applying needed pinctrl settings.
27	  It is totally up to the implementation of each low-level driver.
28	  You can save memory footprint in return for some limitations.
29
30config PINCTRL_GENERIC
31	bool "Support generic pin controllers"
32	depends on PINCTRL_FULL
33	default y
34	help
35	  Say Y here if you want to use the pinctrl subsystem through the
36	  generic DT interface.  If enabled, some functions become available
37	  to parse common properties such as "pins", "groups", "functions" and
38	  some pin configuration parameters.  It would be easier if you only
39	  need the generic DT interface for pin muxing and pin configuration.
40	  If you need to handle vendor-specific DT properties, you can disable
41	  this option and implement your own set_state callback in the pinctrl
42	  operations.
43
44config PINMUX
45	bool "Support pin multiplexing controllers"
46	depends on PINCTRL_GENERIC
47	default y
48	help
49	  This option enables pin multiplexing through the generic pinctrl
50	  framework. Most SoCs have their own multiplexing arrangement where
51	  a single pin can be used for several functions. An SoC pinctrl driver
52	  allows the required function to be selected for each pin.
53	  The driver is typically controlled by the device tree.
54
55config PINCONF
56	bool "Support pin configuration controllers"
57	depends on PINCTRL_GENERIC
58	help
59	  This option enables pin configuration through the generic pinctrl
60	  framework.
61
62config PINCONF_RECURSIVE
63	bool "Support recursive binding for pin configuration nodes"
64	depends on PINCTRL_FULL
65	default n if ARCH_STM32MP
66	default y
67	help
68	  In the Linux pinctrl binding, the pin configuration nodes need not be
69	  direct children of the pin controller device (may be grandchildren for
70	  example). It is define is each individual pin controller device.
71	  Say Y here if you want to keep this behavior with the pinconfig
72	  u-class: all sub are recursively bounded.
73	  If the option is disabled, this behavior is deactivated and only
74	  the direct children of pin controller will be assumed as pin
75	  configuration; you can save memory footprint when this feature is
76	  no needed.
77
78config SPL_PINCTRL
79	bool "Support pin controllers in SPL"
80	depends on SPL && SPL_DM
81	help
82	  This option is an SPL-variant of the PINCTRL option.
83	  See the help of PINCTRL for details.
84
85config TPL_PINCTRL
86	bool "Support pin controllers in TPL"
87	depends on TPL && TPL_DM
88	help
89	  This option is an TPL variant of the PINCTRL option.
90	  See the help of PINCTRL for details.
91
92config VPL_PINCTRL
93	bool "Support pin controllers in VPL"
94	depends on VPL && VPL_DM
95	help
96	  This option is an VPL variant of the PINCTRL option.
97	  See the help of PINCTRL for details.
98
99config SPL_PINCTRL_FULL
100	bool "Support full pin controllers in SPL"
101	depends on SPL_PINCTRL && SPL_OF_CONTROL
102	default n if TARGET_STM32F746_DISCO
103	default y
104	help
105	  This option is an SPL variant of the PINCTRL_FULL option.
106	  See the help of PINCTRL_FULL for details.
107
108config TPL_PINCTRL_FULL
109	bool "Support full pin controllers in TPL"
110	depends on TPL_PINCTRL && TPL_OF_CONTROL
111	help
112	  This option is a TPL variant of the PINCTRL_FULL option.
113	  See the help of PINCTRL_FULL for details.
114
115config VPL_PINCTRL_FULL
116	bool "Support full pin controllers in VPL"
117	depends on VPL_PINCTRL && VPL_OF_CONTROL
118	help
119	  This option is a VPL variant of the PINCTRL_FULL option.
120	  See the help of PINCTRL_FULL for details.
121
122config SPL_PINCTRL_GENERIC
123	bool "Support generic pin controllers in SPL"
124	depends on SPL_PINCTRL_FULL
125	default y
126	help
127	  This option is an SPL-variant of the PINCTRL_GENERIC option.
128	  See the help of PINCTRL_GENERIC for details.
129
130config SPL_PINMUX
131	bool "Support pin multiplexing controllers in SPL"
132	depends on SPL_PINCTRL_GENERIC
133	default y
134	help
135	  This option is an SPL-variant of the PINMUX option.
136	  See the help of PINMUX for details.
137	  The pinctrl subsystem can add a substantial overhead to the SPL
138	  image since it typically requires quite a few tables either in the
139	  driver or in the device tree. If this is acceptable and you need
140	  to adjust pin multiplexing in SPL in order to boot into U-Boot,
141	  enable this option. You will need to enable device tree in SPL
142	  for this to work.
143
144config SPL_PINCONF
145	bool "Support pin configuration controllers in SPL"
146	depends on SPL_PINCTRL_GENERIC
147	help
148	  This option is an SPL-variant of the PINCONF option.
149	  See the help of PINCONF for details.
150
151config SPL_PINCONF_RECURSIVE
152	bool "Support recursive binding for pin configuration nodes in SPL"
153	depends on SPL_PINCTRL_FULL
154	default n if ARCH_STM32MP
155	default y
156	help
157	  This option is an SPL-variant of the PINCONF_RECURSIVE option.
158	  See the help of PINCONF_RECURSIVE for details.
159
160if PINCTRL || SPL_PINCTRL
161
162config PINCTRL_APPLE
163	bool "Apple pinctrl driver"
164	depends on DM && PINCTRL_GENERIC && ARCH_APPLE
165	default y
166	help
167	  Support pin multiplexing on Apple SoCs.
168
169	  The driver is controlled by a device tree node which contains
170	  both the GPIO definitions and pin control functions for each
171	  available multiplex function.
172
173config PINCTRL_AR933X
174	bool "QCA/Athores ar933x pin control driver"
175	depends on DM && SOC_AR933X
176	help
177	  Support pin multiplexing control on QCA/Athores ar933x SoCs.
178	  The driver is controlled by a device tree node which contains
179	  both the GPIO definitions and pin control functions for each
180	  available multiplex function.
181
182config PINCTRL_AT91
183	bool "AT91 pinctrl driver"
184	depends on DM
185	help
186	  This option is to enable the AT91 pinctrl driver for AT91 PIO
187	  controller.
188
189	  AT91 PIO controller is a combined gpio-controller, pin-mux and
190	  pin-config module. Each I/O pin may be dedicated as a general-purpose
191	  I/O or be assigned to a function of an embedded peripheral. Each I/O
192	  pin has a glitch filter providing rejection of glitches lower than
193	  one-half of peripheral clock cycle and a debouncing filter providing
194	  rejection of unwanted pulses from key or push button operations. You
195	  can also control the multi-driver capability, pull-up and pull-down
196	  feature on each I/O pin.
197
198config PINCTRL_AT91PIO4
199	bool "AT91 PIO4 pinctrl driver"
200	depends on DM
201	help
202	  This option is to enable the AT91 pinctrl driver for AT91 PIO4
203	  controller which is available on SAMA5D2 SoC.
204
205config PINCTRL_INTEL
206	bool "Standard Intel pin-control and pin-mux driver"
207	help
208	  Recent Intel chips such as Apollo Lake (APL) use a common pin control
209	  and GPIO scheme. The settings for this come from an SoC-specific
210	  driver which must be separately enabled. The driver supports setting
211	  pins on start-up and changing the GPIO attributes.
212
213config PINCTRL_PIC32
214	bool "Microchip PIC32 pin-control and pin-mux driver"
215	depends on DM && MACH_PIC32
216	default y
217	help
218	  Supports individual pin selection and configuration for each
219	  remappable peripheral available on Microchip PIC32
220	  SoCs. This driver is controlled by a device tree node which
221	  contains both GPIO definition and pin control functions.
222
223config PINCTRL_QCA953X
224	bool "QCA/Athores qca953x pin control driver"
225	depends on DM && SOC_QCA953X
226	help
227	  Support pin multiplexing control on QCA/Athores qca953x SoCs.
228
229	  The driver is controlled by a device tree node which contains both
230	  the GPIO definitions and pin control functions for each available
231	  multiplex function.
232
233config PINCTRL_QE
234	bool "QE based pinctrl driver, like on mpc83xx"
235	depends on DM
236	help
237	  This option is to enable the QE pinctrl driver for QE based io
238	  controller.
239
240config PINCTRL_ROCKCHIP_RV1108
241	bool "Rockchip rv1108 pin control driver"
242	depends on DM
243	help
244	  Support pin multiplexing control on Rockchip rv1108 SoC.
245
246	  The driver is controlled by a device tree node which contains
247	  both the GPIO definitions and pin control functions for each
248	  available multiplex function.
249
250config PINCTRL_SANDBOX
251	bool "Sandbox pinctrl driver"
252	depends on SANDBOX
253	help
254	  This enables pinctrl driver for sandbox.
255
256	  Currently, this driver actually does nothing but print debug
257	  messages when pinctrl operations are invoked.
258
259config PINCTRL_SINGLE
260	bool "Single register pin-control and pin-multiplex driver"
261	depends on DM
262	help
263	  This enables pinctrl driver for systems using a single register for
264	  pin configuration and multiplexing. TI's AM335X SoCs are examples of
265	  such systems.
266
267	  Depending on the platform make sure to also enable OF_TRANSLATE and
268	  eventually SPL_OF_TRANSLATE to get correct address translations.
269
270config PINCTRL_STI
271	bool "STMicroelectronics STi pin-control and pin-mux driver"
272	depends on DM && ARCH_STI
273	default y
274	help
275	  Support pin multiplexing control on STMicroelectronics STi SoCs.
276
277	  The driver is controlled by a device tree node which contains both
278	  the GPIO definitions and pin control functions for each available
279	  multiplex function.
280
281config PINCTRL_STM32
282	bool "ST STM32 pin control driver"
283	depends on DM
284	help
285	  Supports pin multiplexing control on stm32 SoCs.
286
287	  The driver is controlled by a device tree node which contains both
288	  the GPIO definitions and pin control functions for each available
289	  multiplex function.
290
291config PINCTRL_STMFX
292	bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver"
293	depends on DM && PINCTRL_FULL
294	help
295	  I2C driver for STMicroelectronics Multi-Function eXpander (STMFX)
296	  GPIO expander.
297	  Supports pin multiplexing control on stm32 SoCs.
298
299	  The driver is controlled by a device tree node which contains both
300	  the GPIO definitions and pin control functions for each available
301	  multiplex function.
302
303config SPL_PINCTRL_STMFX
304	bool "STMicroelectronics STMFX I2C GPIO expander pinctrl driver in SPL"
305	depends on SPL_PINCTRL_FULL
306	help
307	  This option is an SPL-variant of the SPL_PINCTRL_STMFX option.
308	  See the help of PINCTRL_STMFX for details.
309
310config ASPEED_AST2500_PINCTRL
311	bool "Aspeed AST2500 pin control driver"
312	depends on DM && PINCTRL_GENERIC && ASPEED_AST2500
313	default y
314	help
315	  Support pin multiplexing control on Aspeed ast2500 SoC. The driver
316	  uses Generic Pinctrl framework and is compatible with the Linux
317	  driver, i.e. it uses the same device tree configuration.
318
319config ASPEED_AST2600_PINCTRL
320	bool "Aspeed AST2600 pin control driver"
321	depends on DM && PINCTRL_GENERIC && ASPEED_AST2600
322	default y
323	help
324	  Support pin multiplexing control on Aspeed ast2600 SoC. The driver
325	  uses Generic Pinctrl framework and is compatible with the Linux
326	  driver, i.e. it uses the same device tree configuration.
327
328config PINCTRL_K210
329	bool "Kendryte K210 Fully-Programmable Input/Output Array driver"
330	depends on DM && PINCTRL_GENERIC
331	help
332	  Support pin multiplexing on the K210. The "FPIOA" can remap any
333	  supported function to any multifunctional IO pin. It can also perform
334	  basic GPIO functions, such as reading the current value of a pin.
335
336config PINCTRL_ZYNQMP
337	bool "Xilinx ZynqMP pin control driver"
338	depends on DM && PINCTRL_GENERIC && ARCH_ZYNQMP
339	default y
340	help
341	  Support pin multiplexing control on Xilinx ZynqMP. The driver uses
342	  Generic Pinctrl framework and is compatible with the Linux driver,
343	  i.e. it uses the same device tree configuration.
344
345endif
346
347source "drivers/pinctrl/broadcom/Kconfig"
348source "drivers/pinctrl/exynos/Kconfig"
349source "drivers/pinctrl/intel/Kconfig"
350source "drivers/pinctrl/mediatek/Kconfig"
351source "drivers/pinctrl/meson/Kconfig"
352source "drivers/pinctrl/mscc/Kconfig"
353source "drivers/pinctrl/mtmips/Kconfig"
354source "drivers/pinctrl/mvebu/Kconfig"
355source "drivers/pinctrl/nexell/Kconfig"
356source "drivers/pinctrl/nuvoton/Kconfig"
357source "drivers/pinctrl/nxp/Kconfig"
358source "drivers/pinctrl/renesas/Kconfig"
359source "drivers/pinctrl/rockchip/Kconfig"
360source "drivers/pinctrl/sunxi/Kconfig"
361source "drivers/pinctrl/uniphier/Kconfig"
362source "drivers/pinctrl/starfive/Kconfig"
363
364endmenu
365