1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2019, 2021 NXP 4 */ 5 6 #ifndef __LS1028A_RDB_H 7 #define __LS1028A_RDB_H 8 9 #include "ls1028a_common.h" 10 11 #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) 12 13 #define CFG_SYS_RTC_BUS_NUM 0 14 15 /* Store environment at top of flash */ 16 17 /* 18 * QIXIS Definitions 19 */ 20 21 #ifdef CONFIG_FSL_QIXIS 22 #define QIXIS_BASE 0x7fb00000 23 #define QIXIS_BASE_PHYS QIXIS_BASE 24 #define CFG_SYS_I2C_FPGA_ADDR 0x66 25 #define QIXIS_LBMAP_SWITCH 2 26 #define QIXIS_LBMAP_MASK 0xe0 27 #define QIXIS_LBMAP_SHIFT 0x5 28 #define QIXIS_LBMAP_DFLTBANK 0x00 29 #define QIXIS_LBMAP_ALTBANK 0x00 30 #define QIXIS_LBMAP_SD 0x00 31 #define QIXIS_LBMAP_EMMC 0x00 32 #define QIXIS_LBMAP_XSPI 0x00 33 #define QIXIS_RCW_SRC_SD 0xf8 34 #define QIXIS_RCW_SRC_EMMC 0xf9 35 #define QIXIS_RCW_SRC_XSPI 0xff 36 #define QIXIS_RST_CTL_RESET 0x31 37 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10 38 #define QIXIS_RCFG_CTL_RECONFIG_START 0x11 39 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 40 #define QIXIS_RST_FORCE_MEM 0x01 41 42 #define CFG_SYS_FPGA_CSPR_EXT (0x0) 43 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ 44 CSPR_PORT_SIZE_8 | \ 45 CSPR_MSEL_GPCM | \ 46 CSPR_V) 47 #define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ 48 CSOR_NOR_NOR_MODE_AVD_NOR | \ 49 CSOR_NOR_TRHZ_80) 50 #endif 51 52 /* SATA */ 53 #define SCSI_VEND_ID 0x1b4b 54 #define SCSI_DEV_ID 0x9170 55 #define CFG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID} 56 57 /* Initial environment variables */ 58 #ifndef SPL_NO_ENV 59 #undef CFG_EXTRA_ENV_SETTINGS 60 #define CFG_EXTRA_ENV_SETTINGS \ 61 "board=ls1028ardb\0" \ 62 "hwconfig=fsl_ddr:bank_intlv=auto\0" \ 63 "ramdisk_addr=0x800000\0" \ 64 "ramdisk_size=0x2000000\0" \ 65 "bootm_size=0x10000000\0" \ 66 "kernel_addr=0x01000000\0" \ 67 "scriptaddr=0x80000000\0" \ 68 "scripthdraddr=0x80080000\0" \ 69 "fdtheader_addr_r=0x80100000\0" \ 70 "kernelheader_addr_r=0x80200000\0" \ 71 "load_addr=0xa0000000\0" \ 72 "kernel_addr_r=0x81000000\0" \ 73 "fdt_addr_r=0x90000000\0" \ 74 "ramdisk_addr_r=0xa0000000\0" \ 75 "kernel_start=0x1000000\0" \ 76 "kernelheader_start=0x600000\0" \ 77 "kernel_load=0xa0000000\0" \ 78 "kernel_size=0x2800000\0" \ 79 "kernelheader_size=0x40000\0" \ 80 "kernel_addr_sd=0x8000\0" \ 81 "kernel_size_sd=0x14000\0" \ 82 "kernelhdr_addr_sd=0x3000\0" \ 83 "kernelhdr_size_sd=0x20\0" \ 84 "console=ttyS0,115200\0" \ 85 BOOTENV \ 86 "boot_scripts=ls1028ardb_boot.scr\0" \ 87 "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \ 88 "scan_dev_for_boot_part=" \ 89 "part list ${devtype} ${devnum} devplist; " \ 90 "env exists devplist || setenv devplist 1; " \ 91 "for distro_bootpart in ${devplist}; do " \ 92 "if fstype ${devtype} " \ 93 "${devnum}:${distro_bootpart} " \ 94 "bootfstype; then " \ 95 "run scan_dev_for_boot; " \ 96 "fi; " \ 97 "done\0" \ 98 "boot_a_script=" \ 99 "load ${devtype} ${devnum}:${distro_bootpart} " \ 100 "${scriptaddr} ${prefix}${script}; " \ 101 "env exists secureboot && load ${devtype} " \ 102 "${devnum}:${distro_bootpart} " \ 103 "${scripthdraddr} ${prefix}${boot_script_hdr} " \ 104 "&& esbc_validate ${scripthdraddr};" \ 105 "source ${scriptaddr}\0" \ 106 "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \ 107 "sf probe 0:0 && sf read $load_addr " \ 108 "$kernel_start $kernel_size ; env exists secureboot &&" \ 109 "sf read $kernelheader_addr_r $kernelheader_start " \ 110 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ 111 " bootm $load_addr#$board\0" \ 112 "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \ 113 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \ 114 "&& hdp load $load_addr 0x2000\0" \ 115 "sd_bootcmd=echo Trying load from SD ...;" \ 116 "mmc dev 0;mmcinfo; mmc read $load_addr " \ 117 "$kernel_addr_sd $kernel_size_sd && " \ 118 "env exists secureboot && mmc read $kernelheader_addr_r " \ 119 "$kernelhdr_addr_sd $kernelhdr_size_sd " \ 120 " && esbc_validate ${kernelheader_addr_r};" \ 121 "bootm $load_addr#$board\0" \ 122 "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \ 123 "mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \ 124 "&& hdp load $load_addr 0x2000\0" \ 125 "emmc_bootcmd=echo Trying load from EMMC ..;" \ 126 "mmc dev 1;mmcinfo; mmc read $load_addr " \ 127 "$kernel_addr_sd $kernel_size_sd && " \ 128 "env exists secureboot && mmc read $kernelheader_addr_r " \ 129 "$kernelhdr_addr_sd $kernelhdr_size_sd " \ 130 " && esbc_validate ${kernelheader_addr_r};" \ 131 "bootm $load_addr#$board\0" \ 132 "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \ 133 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \ 134 "&& hdp load $load_addr 0x2000\0" 135 #endif 136 #endif /* __LS1028A_RDB_H */ 137