1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2011 ARM Limited
4  * (C) Copyright 2010 Linaro
5  * Matt Waddel, <matt.waddel@linaro.org>
6  *
7  * Configuration for Versatile Express. Parts were derived from other ARM
8  *   configurations.
9  */
10 
11 #ifndef __VEXPRESS_COMMON_H
12 #define __VEXPRESS_COMMON_H
13 
14 /*
15  * Definitions copied from linux kernel:
16  * arch/arm/mach-vexpress/include/mach/motherboard.h
17  */
18 #ifdef VEXPRESS_ORIGINAL_MEMORY_MAP
19 /* CS register bases for the original memory map. */
20 #define V2M_PA_CS0		0x40000000
21 #define V2M_PA_CS1		0x44000000
22 #define V2M_PA_CS2		0x48000000
23 #define V2M_PA_CS3		0x4c000000
24 #define V2M_PA_CS7		0x10000000
25 
26 #define V2M_PERIPH_OFFSET(x)	(x << 12)
27 #define V2M_SYSREGS		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(0))
28 #define V2M_SYSCTL		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(1))
29 #define V2M_SERIAL_BUS_PCI	(V2M_PA_CS7 + V2M_PERIPH_OFFSET(2))
30 
31 #define V2M_BASE		0x60000000
32 #elif defined(CONFIG_VEXPRESS_EXTENDED_MEMORY_MAP)
33 /* CS register bases for the extended memory map. */
34 #define V2M_PA_CS0		0x08000000
35 #define V2M_PA_CS1		0x0c000000
36 #define V2M_PA_CS2		0x14000000
37 #define V2M_PA_CS3		0x18000000
38 #define V2M_PA_CS7		0x1c000000
39 
40 #define V2M_PERIPH_OFFSET(x)	(x << 16)
41 #define V2M_SYSREGS		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(1))
42 #define V2M_SYSCTL		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(2))
43 #define V2M_SERIAL_BUS_PCI	(V2M_PA_CS7 + V2M_PERIPH_OFFSET(3))
44 
45 #define V2M_BASE		0x80000000
46 #endif
47 
48 /*
49  * Physical addresses, offset from V2M_PA_CS0-3
50  */
51 #define V2M_NOR0		(V2M_PA_CS0)
52 #define V2M_NOR1		(V2M_PA_CS1)
53 #define V2M_SRAM		(V2M_PA_CS2)
54 #define V2M_VIDEO_SRAM		(V2M_PA_CS3 + 0x00000000)
55 #define V2M_ISP1761		(V2M_PA_CS3 + 0x03000000)
56 
57 /* Common peripherals relative to CS7. */
58 #define V2M_AACI		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(4))
59 #define V2M_KMI0		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(6))
60 #define V2M_KMI1		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(7))
61 
62 #define V2M_UART0		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(9))
63 #define V2M_UART1		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(10))
64 #define V2M_UART2		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(11))
65 #define V2M_UART3		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(12))
66 
67 #define V2M_WDT			(V2M_PA_CS7 + V2M_PERIPH_OFFSET(15))
68 
69 #define V2M_TIMER01		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(17))
70 #define V2M_TIMER23		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(18))
71 
72 #define V2M_SERIAL_BUS_DVI	(V2M_PA_CS7 + V2M_PERIPH_OFFSET(22))
73 #define V2M_RTC			(V2M_PA_CS7 + V2M_PERIPH_OFFSET(23))
74 
75 #define V2M_CF			(V2M_PA_CS7 + V2M_PERIPH_OFFSET(26))
76 
77 #define V2M_CLCD		(V2M_PA_CS7 + V2M_PERIPH_OFFSET(31))
78 #define V2M_SIZE_CS7		V2M_PERIPH_OFFSET(32)
79 
80 /* System register offsets. */
81 #define V2M_SYS_CFGDATA		(V2M_SYSREGS + 0x0a0)
82 #define V2M_SYS_CFGCTRL		(V2M_SYSREGS + 0x0a4)
83 #define V2M_SYS_CFGSTAT		(V2M_SYSREGS + 0x0a8)
84 
85 /*
86  * Configuration
87  */
88 #define SYS_CFG_START		(1 << 31)
89 #define SYS_CFG_WRITE		(1 << 30)
90 #define SYS_CFG_OSC		(1 << 20)
91 #define SYS_CFG_VOLT		(2 << 20)
92 #define SYS_CFG_AMP		(3 << 20)
93 #define SYS_CFG_TEMP		(4 << 20)
94 #define SYS_CFG_RESET		(5 << 20)
95 #define SYS_CFG_SCC		(6 << 20)
96 #define SYS_CFG_MUXFPGA		(7 << 20)
97 #define SYS_CFG_SHUTDOWN	(8 << 20)
98 #define SYS_CFG_REBOOT		(9 << 20)
99 #define SYS_CFG_DVIMODE		(11 << 20)
100 #define SYS_CFG_POWER		(12 << 20)
101 #define SYS_CFG_SITE_MB		(0 << 16)
102 #define SYS_CFG_SITE_DB1	(1 << 16)
103 #define SYS_CFG_SITE_DB2	(2 << 16)
104 #define SYS_CFG_STACK(n)	((n) << 12)
105 
106 #define SYS_CFG_ERR		(1 << 1)
107 #define SYS_CFG_COMPLETE	(1 << 0)
108 
109 /* Board info register */
110 #define SYS_ID				V2M_SYSREGS
111 
112 #define SCTL_BASE			V2M_SYSCTL
113 #define VEXPRESS_FLASHPROG_FLVPPEN	(1 << 0)
114 
115 #define CFG_SYS_TIMER_RATE		1000000
116 #define CFG_SYS_TIMER_COUNTER	(V2M_TIMER01 + 0x4)
117 
118 /* PL011 Serial Configuration */
119 #define CFG_PL011_CLOCK		24000000
120 #define CFG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
121 					 (void *)CFG_SYS_SERIAL1}
122 
123 #define CFG_SYS_SERIAL0		V2M_UART0
124 #define CFG_SYS_SERIAL1		V2M_UART1
125 
126 /* Miscellaneous configurable options */
127 #define LINUX_BOOT_PARAM_ADDR		(V2M_BASE + 0x2000)
128 
129 /* Physical Memory Map */
130 #define PHYS_SDRAM_1			(V2M_BASE)	/* SDRAM Bank #1 */
131 #define PHYS_SDRAM_2			(((unsigned int)V2M_BASE) + \
132 					((unsigned int)0x20000000))
133 #define PHYS_SDRAM_1_SIZE		0x20000000	/* 512 MB */
134 #define PHYS_SDRAM_2_SIZE		0x20000000	/* 512 MB */
135 
136 /* additions for new relocation code */
137 #define CFG_SYS_SDRAM_BASE		PHYS_SDRAM_1
138 #define CFG_SYS_INIT_RAM_SIZE		0x1000
139 
140 /* Basic environment settings */
141 #define BOOT_TARGET_DEVICES(func) \
142         func(MMC, mmc, 1) \
143         func(MMC, mmc, 0) \
144         func(PXE, pxe, na) \
145         func(DHCP, dhcp, na)
146 #include <config_distro_bootcmd.h>
147 
148 #define CFG_EXTRA_ENV_SETTINGS \
149                 "loadaddr=0x60100000\0" \
150                 "kernel_addr_r=0x60100000\0" \
151                 "fdt_addr_r=0x60000000\0" \
152                 "bootargs=console=tty0 console=ttyAMA0,38400n8\0" \
153                 BOOTENV \
154 		"console=ttyAMA0,38400n8\0" \
155 		"dram=1024M\0" \
156 		"root=/dev/sda1 rw\0" \
157 		"mtd=armflash:1M@0x800000(uboot),7M@0x1000000(kernel)," \
158 			"24M@0x2000000(initrd)\0" \
159 		"flashargs=setenv bootargs root=${root} console=${console} " \
160 			"mem=${dram} mtdparts=${mtd} mmci.fmax=190000 " \
161 			"devtmpfs.mount=0  vmalloc=256M\0" \
162 		"bootflash=run flashargs; " \
163 			"cp ${ramdisk_addr} ${ramdisk_addr_r} ${maxramdisk}; " \
164 			"bootm ${kernel_addr} ${ramdisk_addr_r}\0" \
165 		"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0"
166 
167 /* FLASH and environment organization */
168 #define CFG_SYS_FLASH_SIZE		0x04000000
169 
170 /* Timeout values in ticks */
171 
172 /* Room required on the stack for the environment data */
173 
174 /*
175  * Amount of flash used for environment:
176  * We don't know which end has the small erase blocks so we use the penultimate
177  * sector location for the environment
178  */
179 
180 /* Store environment at top of flash */
181 #define CFG_SYS_FLASH_BANKS_LIST	{ V2M_NOR0, V2M_NOR1 }
182 
183 #endif /* VEXPRESS_COMMON_H */
184