| /u-boot/include/linux/ |
| A D | bitfield.h | 52 #define __BF_FIELD_CHECK(_mask, _reg, _val, _pfx) \ argument
73 #define FIELD_FIT(_mask, _val) \ argument
87 #define FIELD_PREP(_mask, _val) \ argument
101 #define FIELD_GET(_mask, _reg) \ argument
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| /u-boot/drivers/pinctrl/mtmips/ |
| A D | pinctrl-mtmips-common.h | 45 #define GRP(_name, _funcs, _reg, _shift, _mask) \ argument
49 #define GRP_PCONF(_name, _funcs, _reg, _shift, _mask, _pconf_reg, _pconf_shift) \ argument
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| /u-boot/drivers/clk/renesas/ |
| A D | rcar-cpg-lib.c | 35 #define field_get(_mask, _reg) (((_reg) & (_mask)) >> (ffs(_mask) - 1)) argument
36 #define field_prep(_mask, _val) (((_val) << (ffs(_mask) - 1)) & (_mask)) argument
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| /u-boot/arch/mips/mach-ath79/qca956x/ |
| A D | clk.c | 186 static inline void set_val(u32 _reg, u32 _mask, u32 _val) in set_val()
193 #define cpu_pll_set(_mask, _val) \ argument
196 #define ddr_pll_set(_mask, _val) \ argument
199 #define cpu_ddr_control_set(_mask, _val) \ argument
|
| /u-boot/drivers/pinctrl/mvebu/ |
| A D | pinctrl-armada-37xx.c | 112 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ argument
122 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \ argument
132 #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ argument
142 #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ argument
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| A D | pinctrl-armada-38x.c | 37 #define MPP_VAR_FUNCTION(_val, _name, _subname, _mask) \ argument
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| /u-boot/arch/arm/mach-tegra/tegra124/ |
| A D | xusb-padctl.c | 85 #define TEGRA124_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
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| /u-boot/arch/arm/mach-tegra/tegra210/ |
| A D | xusb-padctl.c | 65 #define TEGRA210_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
|