| /u-boot/include/fsl-mc/ |
| A D | fsl_mc_cmd.h | 80 #define MC_PREP_OP(_ext, _param, _offset, _width, _type, _arg) \ argument
83 #define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \ argument
86 #define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \ argument
89 #define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \ argument
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| /u-boot/arch/arm/cpu/armv7/bcm281xx/ |
| A D | clk-core.h | 175 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
187 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
198 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
209 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \ argument
219 #define HW_ONLY_GATE(_offset, _status_bit) \ argument
299 #define DIVIDER(_offset, _shift, _width) \ argument
309 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument
350 #define SELECTOR(_offset, _shift, _width) \ argument
383 #define TRIGGER(_offset, _bit) \ argument
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| /u-boot/arch/arm/cpu/armv7/bcm235xx/ |
| A D | clk-core.h | 175 #define HW_SW_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
187 #define HW_SW_GATE_AUTO(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
198 #define HW_ENABLE_GATE(_offset, _status_bit, _en_bit, _hw_sw_sel_bit) \ argument
209 #define SW_ONLY_GATE(_offset, _status_bit, _en_bit) \ argument
219 #define HW_ONLY_GATE(_offset, _status_bit) \ argument
299 #define DIVIDER(_offset, _shift, _width) \ argument
309 #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ argument
350 #define SELECTOR(_offset, _shift, _width) \ argument
383 #define TRIGGER(_offset, _bit) \ argument
|
| /u-boot/drivers/clk/renesas/ |
| A D | rcar-gen3-cpg.h | 57 #define DEF_GEN3_SDH(_name, _id, _parent, _offset) \ argument
60 #define DEF_GEN3_SD(_name, _id, _parent, _offset) \ argument
80 #define DEF_GEN3_Z(_name, _id, _type, _parent, _div, _offset) \ argument
91 #define DEF_GEN4_SDH(_name, _id, _parent, _offset) \ argument
94 #define DEF_GEN4_SD(_name, _id, _parent, _offset) \ argument
105 #define DEF_GEN4_Z(_name, _id, _type, _parent, _div, _offset) \ argument
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| A D | r8a779a0-cpg-mssr.c | 55 #define DEF_PLL(_name, _id, _offset) \ argument
|
| A D | renesas-cpg-mssr.h | 88 #define DEF_DIV6P1(_name, _id, _parent, _offset) \ argument
90 #define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \ argument
|
| /u-boot/arch/arm/mach-socfpga/include/mach/ |
| A D | reset_manager.h | 28 #define RSTMGR_DEFINE(_bank, _offset) \ argument
|
| /u-boot/drivers/usb/musb-new/ |
| A D | musb_regs.h | 268 #define MUSB_INDEXED_OFFSET(_epnum, _offset) \ argument
272 #define MUSB_FLAT_OFFSET(_epnum, _offset) \ argument
278 #define MUSB_TUSB_OFFSET(_epnum, _offset) \ argument
294 #define MUSB_BUSCTL_OFFSET(_epnum, _offset) \ argument
358 #define MUSB_INDEXED_OFFSET(_epnum, _offset) (_offset) argument
372 #define MUSB_BUSCTL_OFFSET(_epnum, _offset) (_offset) argument
|
| /u-boot/drivers/clk/stm32/ |
| A D | clk-stm32mp13.c | 175 #define MUX_CFG(id, src, _offset, _shift, _witdh) \ argument
344 #define GATE_CFG(id, _offset, _bit_idx, _offset_clr) \ argument
484 #define DIV_CFG(id, _offset, _shift, _width, _flags, _table) \ argument
564 #define SECF(_sec_id, _offset, _bit_idx) \ argument
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| /u-boot/include/dm/ |
| A D | device.h | 273 #define dev_set_dma_offset(_dev, _offset) _dev->dma_offset = _offset argument
276 #define dev_set_dma_offset(_dev, _offset) argument
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| /u-boot/arch/arm/mach-tegra/tegra124/ |
| A D | xusb-padctl.c | 85 #define TEGRA124_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
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| /u-boot/arch/arm/mach-tegra/tegra210/ |
| A D | xusb-padctl.c | 65 #define TEGRA210_LANE(_name, _offset, _shift, _mask, _iddq, _funcs) \ argument
|