| /u-boot/arch/arm/mach-keystone/ |
| A D | ddr3.c | 27 void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg) in ddr3_init_ddrphy()
115 int ddr3_ecc_support_rmw(u32 base) in ddr3_ecc_support_rmw()
127 static void ddr3_ecc_config(u32 base, u32 value) in ddr3_ecc_config()
151 static void ddr3_reset_data(u32 base, u32 ddr3_size) in ddr3_reset_data()
241 static void ddr3_ecc_init_range(u32 base) in ddr3_ecc_init_range()
254 void ddr3_enable_ecc(u32 base, int test) in ddr3_enable_ecc()
274 void ddr3_disable_ecc(u32 base) in ddr3_disable_ecc()
280 static void cic_init(u32 base) in cic_init()
305 static void ddr3_map_ecc_cic2_irq(u32 base) in ddr3_map_ecc_cic2_irq()
313 void ddr3_init_ecc(u32 base, u32 ddr3_size) in ddr3_init_ecc()
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| /u-boot/drivers/i2c/ |
| A D | sun8i_rsb.c | 24 static int sun8i_rsb_await_trans(struct sunxi_rsb_reg *base) in sun8i_rsb_await_trans()
54 static int sun8i_rsb_do_trans(struct sunxi_rsb_reg *base) in sun8i_rsb_do_trans()
61 static int sun8i_rsb_read(struct sunxi_rsb_reg *base, u16 runtime_addr, in sun8i_rsb_read()
90 static int sun8i_rsb_set_device_address(struct sunxi_rsb_reg *base, in sun8i_rsb_set_device_address()
100 static void sun8i_rsb_set_clk(struct sunxi_rsb_reg *base) in sun8i_rsb_set_clk()
114 static int sun8i_rsb_set_device_mode(struct sunxi_rsb_reg *base) in sun8i_rsb_set_device_mode()
129 static int sun8i_rsb_init(struct sunxi_rsb_reg *base) in sun8i_rsb_init()
140 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE; in rsb_read() local
147 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE; in rsb_write() local
154 struct sunxi_rsb_reg *base = (struct sunxi_rsb_reg *)SUNXI_RSB_BASE; in rsb_set_device_address() local
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| A D | sun6i_p2wi.c | 31 static int sun6i_p2wi_await_trans(struct sunxi_p2wi_reg *base) in sun6i_p2wi_await_trans()
57 static int sun6i_p2wi_read(struct sunxi_p2wi_reg *base, const u8 addr, u8 *data) in sun6i_p2wi_read()
74 static int sun6i_p2wi_write(struct sunxi_p2wi_reg *base, const u8 addr, u8 data) in sun6i_p2wi_write()
85 static int sun6i_p2wi_change_to_p2wi_mode(struct sunxi_p2wi_reg *base, in sun6i_p2wi_change_to_p2wi_mode()
105 static void sun6i_p2wi_init(struct sunxi_p2wi_reg *base) in sun6i_p2wi_init()
117 struct sunxi_p2wi_reg *base = (struct sunxi_p2wi_reg *)SUN6I_P2WI_BASE; in p2wi_read() local
124 struct sunxi_p2wi_reg *base = (struct sunxi_p2wi_reg *)SUN6I_P2WI_BASE; in p2wi_write() local
131 struct sunxi_p2wi_reg *base = (struct sunxi_p2wi_reg *)SUN6I_P2WI_BASE; in p2wi_change_to_p2wi_mode() local
139 struct sunxi_p2wi_reg *base = (struct sunxi_p2wi_reg *)SUN6I_P2WI_BASE; in p2wi_init() local
153 struct sunxi_p2wi_reg *base; member
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| A D | fsl_i2c.c | 129 static uint set_i2c_bus_speed(const struct fsl_i2c_base *base, in set_i2c_bus_speed()
222 static int fsl_i2c_fixup(const struct fsl_i2c_base *base) in fsl_i2c_fixup()
270 static void __i2c_init(const struct fsl_i2c_base *base, int speed, int in __i2c_init()
297 static int i2c_wait4bus(const struct fsl_i2c_base *base) in i2c_wait4bus()
310 static int i2c_wait(const struct fsl_i2c_base *base, int write) in i2c_wait()
347 static int i2c_write_addr(const struct fsl_i2c_base *base, u8 dev, in i2c_write_addr()
362 static int __i2c_write_data(const struct fsl_i2c_base *base, u8 *data, in __i2c_write_data()
377 static int __i2c_read_data(const struct fsl_i2c_base *base, u8 *data, in __i2c_read_data()
456 static int __i2c_write(const struct fsl_i2c_base *base, u8 chip_addr, in __i2c_write()
479 static int __i2c_probe_chip(const struct fsl_i2c_base *base, uchar chip) in __i2c_probe_chip()
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| A D | octeon_i2c.c | 183 void __iomem *base; member
254 static u64 twsi_write_sw(void __iomem *base, u64 val) in twsi_write_sw()
279 static u64 twsi_read_sw(void __iomem *base, u64 val) in twsi_read_sw()
305 static void twsi_write_ctl(void __iomem *base, u8 data) in twsi_write_ctl()
321 static u8 twsi_read_ctl(void __iomem *base) in twsi_read_ctl()
339 static u8 twsi_read_status(void __iomem *base) in twsi_read_status()
355 static int twsi_wait(void __iomem *base) in twsi_wait()
375 static int twsi_start_unstick(void __iomem *base) in twsi_start_unstick()
389 static int twsi_start(void __iomem *base) in twsi_start()
420 static int twsi_stop(void __iomem *base) in twsi_stop()
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| /u-boot/drivers/bios_emulator/ |
| A D | biosemui.h | 67 #define readb_le(base) *((u8*)(base)) argument
68 #define readw_le(base) ((u16)readb_le(base) | ((u16)readb_le((base) + 1) << 8)) argument
71 #define writeb_le(base, v) *((u8*)(base)) = (v) argument
72 #define writew_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \ argument
74 #define writel_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \ argument
79 #define readb_le(base) *((u8*)(base)) argument
80 #define readw_le(base) *((u16*)(base)) argument
81 #define readl_le(base) *((u32*)(base)) argument
82 #define writeb_le(base, v) *((u8*)(base)) = (v) argument
83 #define writew_le(base, v) *((u16*)(base)) = (v) argument
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| /u-boot/arch/arm/mach-omap2/ |
| A D | emif-common.c | 28 void set_lpmode_selfrefresh(u32 base) in set_lpmode_selfrefresh()
50 inline u32 emif_num(u32 base) in emif_num()
60 static inline u32 get_mr(u32 base, u32 cs, u32 mr_addr) in get_mr()
90 void emif_reset_phy(u32 base) in emif_reset_phy()
100 static void do_lpddr2_init(u32 base, u32 cs) in do_lpddr2_init()
340 static void dra7_reset_ddr_data(u32 base, u32 size) in dra7_reset_ddr_data()
877 static u32 get_emif_mem_size(u32 base) in get_emif_mem_size()
1229 static void do_sdram_init(u32 base) in do_sdram_init()
1315 void emif_post_init_config(u32 base) in emif_post_init_config()
1329 void dmm_init(u32 base) in dmm_init()
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| /u-boot/drivers/clk/at91/ |
| A D | clk-sam9x60-pll.c | 41 void __iomem *base; member
50 static inline bool sam9x60_pll_ready(void __iomem *base, int id) in sam9x60_pll_ready()
98 void __iomem *base = pll->base; in sam9x60_frac_pll_set_rate() local
143 void __iomem *base = pll->base; in sam9x60_frac_pll_get_rate() local
162 void __iomem *base = pll->base; in sam9x60_frac_pll_enable() local
227 void __iomem *base = pll->base; in sam9x60_frac_pll_disable() local
257 void __iomem *base = pll->base; in sam9x60_div_pll_enable() local
287 void __iomem *base = pll->base; in sam9x60_div_pll_disable() local
305 void __iomem *base = pll->base; in sam9x60_div_pll_set_rate() local
346 void __iomem *base = pll->base; in sam9x60_div_pll_get_rate() local
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| /u-boot/drivers/serial/ |
| A D | serial_mvebu_a3700.c | 16 void __iomem *base; member
41 void __iomem *base = plat->base; in mvebu_serial_putc() local
54 void __iomem *base = plat->base; in mvebu_serial_getc() local
65 void __iomem *base = plat->base; in mvebu_serial_pending() local
81 void __iomem *base = plat->base; in mvebu_serial_setbrg() local
153 void __iomem *base = plat->base; in mvebu_serial_probe() local
212 void __iomem *base = plat->base; in mvebu_serial_remove() local
324 void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); in _debug_uart_init() local
352 void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE); in _debug_uart_putc() local
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| A D | serial_stm32.c | 24 static void _stm32_serial_setbrg(fdt_addr_t base, in _stm32_serial_setbrg()
110 fdt_addr_t base = plat->base; in stm32_serial_getc() local
129 static int _stm32_serial_putc(fdt_addr_t base, in _stm32_serial_putc()
154 fdt_addr_t base = plat->base; in stm32_serial_pending() local
164 static void _stm32_serial_init(fdt_addr_t base, in _stm32_serial_init()
273 fdt_addr_t base = CONFIG_VAL(DEBUG_UART_BASE); in _debug_uart_init() local
284 fdt_addr_t base = CONFIG_VAL(DEBUG_UART_BASE); in _debug_uart_putc() local
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| /u-boot/arch/arm/mach-uniphier/clk/ |
| A D | pll-base-ld20.c | 35 void __iomem *base = sc_base + reg_base; in uniphier_ld20_sscpll_init() local
65 void __iomem *base = sc_base + reg_base; in uniphier_ld20_sscpll_ssc_en() local
77 void __iomem *base = sc_base + reg_base; in uniphier_ld20_sscpll_set_regi() local
90 void __iomem *base = sc_base + reg_base; in uniphier_ld20_vpll27_init() local
110 void __iomem *base = sc_base + reg_base; in uniphier_ld20_dspll_init() local
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| /u-boot/drivers/dma/ |
| A D | ti-edma3.c | 41 u32 base; member
56 void qedma3_start(u32 base, struct edma3_channel_config *cfg) in qedma3_start()
124 void edma3_set_dest_index(u32 base, unsigned slot, int bidx, int cidx) in edma3_set_dest_index()
144 void edma3_set_dest_addr(u32 base, int slot, u32 dst) in edma3_set_dest_addr()
195 void edma3_set_src_index(u32 base, unsigned slot, int bidx, int cidx) in edma3_set_src_index()
215 void edma3_set_src_addr(u32 base, int slot, u32 src) in edma3_set_src_addr()
253 void edma3_set_transfer_params(u32 base, int slot, int acnt, in edma3_set_transfer_params()
290 void edma3_write_slot(u32 base, int slot, struct edma3_slot_layout *param) in edma3_write_slot()
309 void edma3_read_slot(u32 base, int slot, struct edma3_slot_layout *param) in edma3_read_slot()
347 int edma3_check_for_transfer(u32 base, struct edma3_channel_config *cfg) in edma3_check_for_transfer()
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| /u-boot/arch/arm/mach-mvebu/ |
| A D | mbus.c | 113 static void mvebu_mbus_read_window(int win, int *enabled, u64 *base, in mvebu_mbus_read_window()
176 static int mvebu_mbus_window_conflicts(phys_addr_t base, size_t size, in mvebu_mbus_window_conflicts()
214 static int mvebu_mbus_find_window(phys_addr_t base, size_t size) in mvebu_mbus_find_window()
264 static int mvebu_mbus_alloc_window(phys_addr_t base, size_t size, in mvebu_mbus_alloc_window()
363 phys_addr_t base, size_t size, in mvebu_mbus_add_window_remap_by_id()
376 phys_addr_t base, size_t size) in mvebu_mbus_add_window_by_id()
382 int mvebu_mbus_del_window(phys_addr_t base, size_t size) in mvebu_mbus_del_window()
395 static void mvebu_mbus_get_lowest_base(phys_addr_t *base) in mvebu_mbus_get_lowest_base()
420 phys_addr_t base; in mvebu_config_mbus_bridge() local
442 int mbus_dt_setup_win(u32 base, u32 size, u8 target, u8 attr) in mbus_dt_setup_win()
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| /u-boot/drivers/watchdog/ |
| A D | designware_wdt.c | 23 void __iomem *base; member
32 static int designware_wdt_settimeout(void __iomem *base, unsigned int clk_khz, in designware_wdt_settimeout()
46 static void designware_wdt_enable(void __iomem *base) in designware_wdt_enable()
51 static unsigned int designware_wdt_is_enabled(void __iomem *base) in designware_wdt_is_enabled()
56 static void designware_wdt_reset_common(void __iomem *base) in designware_wdt_reset_common()
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| /u-boot/arch/arm/mach-at91/ |
| A D | mpddrc.c | 27 static int ddr2_decodtype_is_seq(const unsigned int base, u32 cr) in ddr2_decodtype_is_seq()
40 int ddr2_init(const unsigned int base, in ddr2_init()
148 int ddr3_init(const unsigned int base, in ddr3_init()
234 int lpddr2_init(const unsigned int base, in lpddr2_init()
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| /u-boot/arch/arm/mach-nexell/ |
| A D | timer.c | 61 static inline void timer_clock(void __iomem *base, int ch, int mux, int scl) in timer_clock()
70 static inline void timer_count(void __iomem *base, int ch, unsigned int cnt) in timer_count()
76 static inline void timer_start(void __iomem *base, int ch) in timer_start()
92 static inline void timer_stop(void __iomem *base, int ch) in timer_stop()
103 static inline unsigned long timer_read(void __iomem *base, int ch) in timer_read()
120 void __iomem *base = (void __iomem *)PHY_BASEADDR_TIMER; in timer_init() local
164 unsigned long get_timer(unsigned long base) in get_timer()
181 void __iomem *base = (void __iomem *)PHY_BASEADDR_TIMER; in reset_timer_masked() local
193 void __iomem *base = (void __iomem *)PHY_BASEADDR_TIMER; in get_timer_masked() local
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| /u-boot/drivers/misc/sentinel/ |
| A D | s4mu.c | 20 struct mu_type *base; member
28 void mu_hal_init(ulong base) in mu_hal_init()
36 int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg) in mu_hal_sendmsg()
61 int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg) in mu_hal_receivemsg()
86 static int imx8ulp_mu_read(struct mu_type *base, void *data) in imx8ulp_mu_read()
119 static int imx8ulp_mu_write(struct mu_type *base, void *data) in imx8ulp_mu_write()
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| /u-boot/drivers/misc/ |
| A D | k3_esm.c | 31 static void esm_pin_enable(void __iomem *base, int pin) in esm_pin_enable()
41 static void esm_intr_enable(void __iomem *base, int pin) in esm_intr_enable()
51 static void esm_intr_prio_set(void __iomem *base, int pin) in esm_intr_prio_set()
61 static void esm_clear_raw_status(void __iomem *base, int pin) in esm_clear_raw_status()
78 void __iomem *base; in k3_esm_probe() local
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| /u-boot/lib/ |
| A D | strto.c | 58 ulong simple_strtoul(const char *cp, char **endp, uint base) in simple_strtoul()
86 int strict_strtoul(const char *cp, unsigned int base, unsigned long *res) in strict_strtoul()
110 long simple_strtol(const char *cp, char **endp, unsigned int base) in simple_strtol()
118 unsigned long ustrtoul(const char *cp, char **endp, unsigned int base) in ustrtoul()
139 unsigned long long ustrtoull(const char *cp, char **endp, unsigned int base) in ustrtoull()
161 unsigned int base) in simple_strtoull()
179 long long simple_strtoll(const char *cp, char **endp, unsigned int base) in simple_strtoll()
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| /u-boot/drivers/spi/ |
| A D | stm32_spi.c | 101 void __iomem *base; member
125 void __iomem *base = plat->base; in stm32_spi_write_txfifo() local
158 void __iomem *base = plat->base; in stm32_spi_read_rxfifo() local
219 void __iomem *base = plat->base; in stm32_spi_claim_bus() local
231 void __iomem *base = plat->base; in stm32_spi_release_bus() local
242 void __iomem *base = plat->base; in stm32_spi_stopxfer() local
293 void __iomem *base = plat->base; in stm32_spi_set_mode() local
328 void __iomem *base = plat->base; in stm32_spi_set_fthlv() local
352 void __iomem *base = plat->base; in stm32_spi_set_speed() local
391 void __iomem *base = plat->base; in stm32_spi_xfer() local
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| /u-boot/drivers/soc/ti/ |
| A D | keystone_serdes.c | 109 static void ks2_serdes_cfg_setup(u32 base, struct serdes_cfg *cfg, u32 size) in ks2_serdes_cfg_setup()
117 static void ks2_serdes_lane_config(u32 base, struct serdes_cfg *cfg_lane, in ks2_serdes_lane_config()
127 static int ks2_serdes_init_cfg(u32 base, struct cfg_entry *cfg, u32 num_lanes) in ks2_serdes_init_cfg()
140 static void ks2_serdes_cmu_comlane_enable(u32 base, struct ks2_serdes *serdes) in ks2_serdes_cmu_comlane_enable()
155 static void ks2_serdes_pll_enable(u32 base, struct ks2_serdes *serdes) in ks2_serdes_pll_enable()
161 static void ks2_serdes_lane_reset(u32 base, u32 reset, u32 lane) in ks2_serdes_lane_reset()
171 static void ks2_serdes_lane_enable(u32 base, in ks2_serdes_lane_enable()
187 int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes) in ks2_serdes_init()
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| /u-boot/arch/riscv/lib/ |
| A D | andes_plicsw.c | 24 #define PENDING_REG(base, hart) ((ulong)(base) + 0x1000 + ((hart) / 4) * 4) argument
26 #define ENABLE_REG(base, hart) ((ulong)(base) + 0x2000 + (hart) * 0x80) argument
28 #define CLAIM_REG(base, hart) ((ulong)(base) + 0x200004 + (hart) * 0x1000) argument
49 long *base = syscon_get_first_range(RISCV_SYSCON_PLICSW); in riscv_init_ipi() local
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| /u-boot/drivers/ram/cadence/ |
| A D | ddr_ctrl.c | 98 void cdns_ddr_set_mr1(void *base, int cs, u16 odt_impedance, u16 drive_strength) in cdns_ddr_set_mr1()
146 void cdns_ddr_set_odt_map(void *base, int cs, u16 odt_map) in cdns_ddr_set_odt_map()
158 void cdns_ddr_set_odt_times(void *base, u8 TODTL_2CMD, u8 TODTH_WR, u8 TODTH_RD, in cdns_ddr_set_odt_times()
169 void cdns_ddr_set_same_cs_delays(void *base, u8 r2r, u8 r2w, u8 w2r, u8 w2w) in cdns_ddr_set_same_cs_delays()
176 void cdns_ddr_set_diff_cs_delays(void *base, u8 r2r, u8 r2w, u8 w2r, u8 w2w) in cdns_ddr_set_diff_cs_delays()
183 void cdns_ddr_set_port_rw_priority(void *base, int port, in cdns_ddr_set_port_rw_priority()
199 void cdns_ddr_enable_port_addr_range(void *base, int port, int entry, in cdns_ddr_enable_port_addr_range()
231 void cdns_ddr_enable_addr_range(void *base, int entry, in cdns_ddr_enable_addr_range()
241 void cdns_ddr_enable_port_prot(void *base, int port, int entry, in cdns_ddr_enable_port_prot()
272 void cdns_ddr_enable_prot(void *base, int entry, in cdns_ddr_enable_prot()
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| /u-boot/arch/mips/mach-mtmips/mt7620/ |
| A D | serial.c | 14 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in board_debug_uart_init() local
27 void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); in mtmips_spl_serial_init() local
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| /u-boot/drivers/gpio/ |
| A D | mpc8xx_gpio.c | 38 void __iomem *base; member
85 static inline u16 gpio16_get_val(void __iomem *base, u16 mask, int type) in gpio16_get_val()
92 static inline u16 gpio16_get_dir(void __iomem *base, u16 mask, int type) in gpio16_get_dir()
99 static inline void gpio16_set_in(void __iomem *base, u16 gpios, int type) in gpio16_set_in()
108 static inline void gpio16_set_lo(void __iomem *base, u16 gpios, int type) in gpio16_set_lo()
117 static inline void gpio16_set_hi(void __iomem *base, u16 gpios, int type) in gpio16_set_hi()
127 static inline u32 gpio32_get_val(void __iomem *base, u32 mask, int type) in gpio32_get_val()
137 static inline u32 gpio32_get_dir(void __iomem *base, u32 mask, int type) in gpio32_get_dir()
147 static inline void gpio32_set_in(void __iomem *base, u32 gpios, int type) in gpio32_set_in()
162 static inline void gpio32_set_lo(void __iomem *base, u32 gpios, int type) in gpio32_set_lo()
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