1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2020 Marvell International Ltd.
4 *
5 * Helper functions for common, but complicated tasks.
6 */
7
8 #ifndef __CVMX_HELPER_H__
9 #define __CVMX_HELPER_H__
10
11 #include "cvmx-wqe.h"
12
13 /* Max number of GMXX */
14 #define CVMX_HELPER_MAX_GMX \
15 (OCTEON_IS_MODEL(OCTEON_CN78XX) ? \
16 6 : \
17 (OCTEON_IS_MODEL(OCTEON_CN68XX) ? \
18 5 : \
19 (OCTEON_IS_MODEL(OCTEON_CN73XX) ? \
20 3 : \
21 (OCTEON_IS_MODEL(OCTEON_CNF75XX) ? 1 : 2))))
22
23 #define CVMX_HELPER_CSR_INIT0 \
24 0 /* Do not change as
25 CVMX_HELPER_WRITE_CSR()
26 assumes it */
27 #define CVMX_HELPER_CSR_INIT_READ -1
28
29 /*
30 * CVMX_HELPER_WRITE_CSR--set a field in a CSR with a value.
31 *
32 * @param chcsr_init initial value of the csr (CVMX_HELPER_CSR_INIT_READ
33 * means to use the existing csr value as the
34 * initial value.)
35 * @param chcsr_csr the name of the csr
36 * @param chcsr_type the type of the csr (see the -defs.h)
37 * @param chcsr_chip the chip for the csr/field
38 * @param chcsr_fld the field in the csr
39 * @param chcsr_val the value for field
40 */
41 #define CVMX_HELPER_WRITE_CSR(chcsr_init, chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
42 do { \
43 chcsr_type csr; \
44 if ((chcsr_init) == CVMX_HELPER_CSR_INIT_READ) \
45 csr.u64 = cvmx_read_csr(chcsr_csr); \
46 else \
47 csr.u64 = (chcsr_init); \
48 csr.chcsr_chip.chcsr_fld = (chcsr_val); \
49 cvmx_write_csr((chcsr_csr), csr.u64); \
50 } while (0)
51
52 /*
53 * CVMX_HELPER_WRITE_CSR0--set a field in a CSR with the initial value of 0
54 */
55 #define CVMX_HELPER_WRITE_CSR0(chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
56 CVMX_HELPER_WRITE_CSR(CVMX_HELPER_CSR_INIT0, chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, \
57 chcsr_val)
58
59 /*
60 * CVMX_HELPER_WRITE_CSR1--set a field in a CSR with the initial value of
61 * the CSR's current value.
62 */
63 #define CVMX_HELPER_WRITE_CSR1(chcsr_csr, chcsr_type, chcsr_chip, chcsr_fld, chcsr_val) \
64 CVMX_HELPER_WRITE_CSR(CVMX_HELPER_CSR_INIT_READ, chcsr_csr, chcsr_type, chcsr_chip, \
65 chcsr_fld, chcsr_val)
66
67 /* These flags are passed to __cvmx_helper_packet_hardware_enable */
68
69 typedef enum {
70 CVMX_HELPER_INTERFACE_MODE_DISABLED,
71 CVMX_HELPER_INTERFACE_MODE_RGMII,
72 CVMX_HELPER_INTERFACE_MODE_GMII,
73 CVMX_HELPER_INTERFACE_MODE_SPI,
74 CVMX_HELPER_INTERFACE_MODE_PCIE,
75 CVMX_HELPER_INTERFACE_MODE_XAUI,
76 CVMX_HELPER_INTERFACE_MODE_SGMII,
77 CVMX_HELPER_INTERFACE_MODE_PICMG,
78 CVMX_HELPER_INTERFACE_MODE_NPI,
79 CVMX_HELPER_INTERFACE_MODE_LOOP,
80 CVMX_HELPER_INTERFACE_MODE_SRIO,
81 CVMX_HELPER_INTERFACE_MODE_ILK,
82 CVMX_HELPER_INTERFACE_MODE_RXAUI,
83 CVMX_HELPER_INTERFACE_MODE_QSGMII,
84 CVMX_HELPER_INTERFACE_MODE_AGL,
85 CVMX_HELPER_INTERFACE_MODE_XLAUI,
86 CVMX_HELPER_INTERFACE_MODE_XFI,
87 CVMX_HELPER_INTERFACE_MODE_10G_KR,
88 CVMX_HELPER_INTERFACE_MODE_40G_KR4,
89 CVMX_HELPER_INTERFACE_MODE_MIXED,
90 } cvmx_helper_interface_mode_t;
91
92 typedef union cvmx_helper_link_info {
93 u64 u64;
94 struct {
95 u64 reserved_20_63 : 43;
96 u64 init_success : 1;
97 u64 link_up : 1;
98 u64 full_duplex : 1;
99 u64 speed : 18;
100 } s;
101 } cvmx_helper_link_info_t;
102
103 /**
104 * Sets the back pressure configuration in internal data structure.
105 * @param backpressure_dis disable/enable backpressure
106 */
107 void cvmx_rgmii_set_back_pressure(u64 backpressure_dis);
108
109 #include "cvmx-helper-fpa.h"
110
111 #include "cvmx-helper-agl.h"
112 #include "cvmx-helper-errata.h"
113 #include "cvmx-helper-ilk.h"
114 #include "cvmx-helper-loop.h"
115 #include "cvmx-helper-npi.h"
116 #include "cvmx-helper-rgmii.h"
117 #include "cvmx-helper-sgmii.h"
118 #include "cvmx-helper-spi.h"
119 #include "cvmx-helper-srio.h"
120 #include "cvmx-helper-util.h"
121 #include "cvmx-helper-xaui.h"
122
123 #include "cvmx-fpa3.h"
124
125 enum cvmx_pko_padding {
126 CVMX_PKO_PADDING_NONE = 0,
127 CVMX_PKO_PADDING_60 = 1,
128 };
129
130 /**
131 * cvmx_override_iface_phy_mode(int interface, int index) is a function pointer.
132 * It is meant to allow customization of interfaces which do not have a PHY.
133 *
134 * @returns 0 if MAC decides TX_CONFIG_REG or 1 if PHY decides TX_CONFIG_REG.
135 *
136 * If this function pointer is NULL then it defaults to the MAC.
137 */
138 extern int (*cvmx_override_iface_phy_mode) (int interface, int index);
139
140 /**
141 * cvmx_override_ipd_port_setup(int ipd_port) is a function
142 * pointer. It is meant to allow customization of the IPD port/port kind
143 * setup before packet input/output comes online. It is called
144 * after cvmx-helper does the default IPD configuration, but
145 * before IPD is enabled. Users should set this pointer to a
146 * function before calling any cvmx-helper operations.
147 */
148 extern void (*cvmx_override_ipd_port_setup) (int ipd_port);
149
150 /**
151 * This function enables the IPD and also enables the packet interfaces.
152 * The packet interfaces (RGMII and SPI) must be enabled after the
153 * IPD. This should be called by the user program after any additional
154 * IPD configuration changes are made if CVMX_HELPER_ENABLE_IPD
155 * is not set in the executive-config.h file.
156 *
157 * Return: 0 on success
158 * -1 on failure
159 */
160 int cvmx_helper_ipd_and_packet_input_enable_node(int node);
161 int cvmx_helper_ipd_and_packet_input_enable(void);
162
163 /**
164 * Initialize and allocate memory for the SSO.
165 *
166 * @param wqe_entries The maximum number of work queue entries to be
167 * supported.
168 *
169 * Return: Zero on success, non-zero on failure.
170 */
171 int cvmx_helper_initialize_sso(int wqe_entries);
172
173 /**
174 * Initialize and allocate memory for the SSO on a specific node.
175 *
176 * @param node Node SSO to initialize
177 * @param wqe_entries The maximum number of work queue entries to be
178 * supported.
179 *
180 * Return: Zero on success, non-zero on failure.
181 */
182 int cvmx_helper_initialize_sso_node(unsigned int node, int wqe_entries);
183
184 /**
185 * Undo the effect of cvmx_helper_initialize_sso().
186 *
187 * Return: Zero on success, non-zero on failure.
188 */
189 int cvmx_helper_uninitialize_sso(void);
190
191 /**
192 * Undo the effect of cvmx_helper_initialize_sso_node().
193 *
194 * @param node Node SSO to initialize
195 *
196 * Return: Zero on success, non-zero on failure.
197 */
198 int cvmx_helper_uninitialize_sso_node(unsigned int node);
199
200 /**
201 * Initialize the PIP, IPD, and PKO hardware to support
202 * simple priority based queues for the ethernet ports. Each
203 * port is configured with a number of priority queues based
204 * on CVMX_PKO_QUEUES_PER_PORT_* where each queue is lower
205 * priority than the previous.
206 *
207 * Return: Zero on success, non-zero on failure
208 */
209 int cvmx_helper_initialize_packet_io_global(void);
210 /**
211 * Initialize the PIP, IPD, and PKO hardware to support
212 * simple priority based queues for the ethernet ports. Each
213 * port is configured with a number of priority queues based
214 * on CVMX_PKO_QUEUES_PER_PORT_* where each queue is lower
215 * priority than the previous.
216 *
217 * @param node Node on which to initialize packet io hardware
218 *
219 * Return: Zero on success, non-zero on failure
220 */
221 int cvmx_helper_initialize_packet_io_node(unsigned int node);
222
223 /**
224 * Does core local initialization for packet io
225 *
226 * Return: Zero on success, non-zero on failure
227 */
228 int cvmx_helper_initialize_packet_io_local(void);
229
230 /**
231 * Undo the initialization performed in
232 * cvmx_helper_initialize_packet_io_global(). After calling this routine and the
233 * local version on each core, packet IO for Octeon will be disabled and placed
234 * in the initial reset state. It will then be safe to call the initialize
235 * later on. Note that this routine does not empty the FPA pools. It frees all
236 * buffers used by the packet IO hardware to the FPA so a function emptying the
237 * FPA after shutdown should find all packet buffers in the FPA.
238 *
239 * Return: Zero on success, negative on failure.
240 */
241 int cvmx_helper_shutdown_packet_io_global(void);
242
243 /**
244 * Helper function for 78xx global packet IO shutdown
245 */
246 int cvmx_helper_shutdown_packet_io_global_cn78xx(int node);
247
248 /**
249 * Does core local shutdown of packet io
250 *
251 * Return: Zero on success, non-zero on failure
252 */
253 int cvmx_helper_shutdown_packet_io_local(void);
254
255 /**
256 * Returns the number of ports on the given interface.
257 * The interface must be initialized before the port count
258 * can be returned.
259 *
260 * @param interface Which interface to return port count for.
261 *
262 * Return: Port count for interface
263 * -1 for uninitialized interface
264 */
265 int cvmx_helper_ports_on_interface(int interface);
266
267 /**
268 * Return the number of interfaces the chip has. Each interface
269 * may have multiple ports. Most chips support two interfaces,
270 * but the CNX0XX and CNX1XX are exceptions. These only support
271 * one interface.
272 *
273 * Return: Number of interfaces on chip
274 */
275 int cvmx_helper_get_number_of_interfaces(void);
276
277 /**
278 * Get the operating mode of an interface. Depending on the Octeon
279 * chip and configuration, this function returns an enumeration
280 * of the type of packet I/O supported by an interface.
281 *
282 * @param xiface Interface to probe
283 *
284 * Return: Mode of the interface. Unknown or unsupported interfaces return
285 * DISABLED.
286 */
287 cvmx_helper_interface_mode_t cvmx_helper_interface_get_mode(int xiface);
288
289 /**
290 * Auto configure an IPD/PKO port link state and speed. This
291 * function basically does the equivalent of:
292 * cvmx_helper_link_set(ipd_port, cvmx_helper_link_get(ipd_port));
293 *
294 * @param ipd_port IPD/PKO port to auto configure
295 *
296 * Return: Link state after configure
297 */
298 cvmx_helper_link_info_t cvmx_helper_link_autoconf(int ipd_port);
299
300 /**
301 * Return the link state of an IPD/PKO port as returned by
302 * auto negotiation. The result of this function may not match
303 * Octeon's link config if auto negotiation has changed since
304 * the last call to cvmx_helper_link_set().
305 *
306 * @param ipd_port IPD/PKO port to query
307 *
308 * Return: Link state
309 */
310 cvmx_helper_link_info_t cvmx_helper_link_get(int ipd_port);
311
312 /**
313 * Configure an IPD/PKO port for the specified link state. This
314 * function does not influence auto negotiation at the PHY level.
315 * The passed link state must always match the link state returned
316 * by cvmx_helper_link_get(). It is normally best to use
317 * cvmx_helper_link_autoconf() instead.
318 *
319 * @param ipd_port IPD/PKO port to configure
320 * @param link_info The new link state
321 *
322 * Return: Zero on success, negative on failure
323 */
324 int cvmx_helper_link_set(int ipd_port, cvmx_helper_link_info_t link_info);
325
326 /**
327 * This function probes an interface to determine the actual number of
328 * hardware ports connected to it. It does some setup the ports but
329 * doesn't enable them. The main goal here is to set the global
330 * interface_port_count[interface] correctly. Final hardware setup of
331 * the ports will be performed later.
332 *
333 * @param xiface Interface to probe
334 *
335 * Return: Zero on success, negative on failure
336 */
337 int cvmx_helper_interface_probe(int xiface);
338
339 /**
340 * Determine the actual number of hardware ports connected to an
341 * interface. It doesn't setup the ports or enable them.
342 *
343 * @param xiface Interface to enumerate
344 *
345 * Return: Zero on success, negative on failure
346 */
347 int cvmx_helper_interface_enumerate(int xiface);
348
349 /**
350 * Configure a port for internal and/or external loopback. Internal loopback
351 * causes packets sent by the port to be received by Octeon. External loopback
352 * causes packets received from the wire to sent out again.
353 *
354 * @param ipd_port IPD/PKO port to loopback.
355 * @param enable_internal
356 * Non zero if you want internal loopback
357 * @param enable_external
358 * Non zero if you want external loopback
359 *
360 * Return: Zero on success, negative on failure.
361 */
362 int cvmx_helper_configure_loopback(int ipd_port, int enable_internal, int enable_external);
363
364 /**
365 * Returns the number of ports on the given interface.
366 *
367 * @param interface Which interface to return port count for.
368 *
369 * Return: Port count for interface
370 * -1 for uninitialized interface
371 */
372 int __cvmx_helper_early_ports_on_interface(int interface);
373
374 void cvmx_helper_setup_simulator_io_buffer_counts(int node, int num_packet_buffers,
375 int pko_buffers);
376
377 void cvmx_helper_set_wqe_no_ptr_mode(bool mode);
378 void cvmx_helper_set_pkt_wqe_le_mode(bool mode);
379 int cvmx_helper_shutdown_fpa_pools(int node);
380
381 /**
382 * Convert Ethernet QoS/PCP value to system-level priority
383 *
384 * In OCTEON, highest priority is 0, in Ethernet 802.1p PCP field
385 * the highest priority is 7, lowest is 1. Here is the full conversion
386 * table between QoS (PCP) and OCTEON priority values, per IEEE 802.1Q-2005:
387 *
388 * PCP Priority Acronym Traffic Types
389 * 1 7 (lowest) BK Background
390 * 0 6 BE Best Effort
391 * 2 5 EE Excellent Effort
392 * 3 4 CA Critical Applications
393 * 4 3 VI Video, < 100 ms latency and jitter
394 * 5 2 VO Voice, < 10 ms latency and jitter
395 * 6 1 IC Internetwork Control
396 * 7 0 (highest) NC Network Control
397 */
cvmx_helper_qos2prio(u8 qos)398 static inline u8 cvmx_helper_qos2prio(u8 qos)
399 {
400 static const unsigned int pcp_map = 6 << (4 * 0) | 7 << (4 * 1) | 5 << (4 * 2) |
401 4 << (4 * 3) | 3 << (4 * 4) | 2 << (4 * 5) |
402 1 << (4 * 6) | 0 << (4 * 7);
403
404 return (pcp_map >> ((qos & 0x7) << 2)) & 0x7;
405 }
406
407 /**
408 * Convert system-level priority to Ethernet QoS/PCP value
409 *
410 * Calculate the reverse of cvmx_helper_qos2prio() per IEEE 802.1Q-2005.
411 */
cvmx_helper_prio2qos(u8 prio)412 static inline u8 cvmx_helper_prio2qos(u8 prio)
413 {
414 static const unsigned int prio_map = 7 << (4 * 0) | 6 << (4 * 1) | 5 << (4 * 2) |
415 4 << (4 * 3) | 3 << (4 * 4) | 2 << (4 * 5) |
416 0 << (4 * 6) | 1 << (4 * 7);
417
418 return (prio_map >> ((prio & 0x7) << 2)) & 0x7;
419 }
420
421 /**
422 * @INTERNAL
423 * Get the number of ipd_ports on an interface.
424 *
425 * @param xiface
426 *
427 * Return: the number of ipd_ports on the interface and -1 for error.
428 */
429 int __cvmx_helper_get_num_ipd_ports(int xiface);
430
431 enum cvmx_pko_padding __cvmx_helper_get_pko_padding(int xiface);
432
433 /**
434 * @INTERNAL
435 *
436 * @param xiface
437 * @param num_ipd_ports is the number of ipd_ports on the interface
438 * @param has_fcs indicates if PKO does FCS for the ports on this
439 * @param pad The padding that PKO should apply.
440 * interface.
441 *
442 * Return: 0 for success and -1 for failure
443 */
444 int __cvmx_helper_init_interface(int xiface, int num_ipd_ports, int has_fcs,
445 enum cvmx_pko_padding pad);
446
447 void __cvmx_helper_shutdown_interfaces(void);
448
449 /*
450 * @INTERNAL
451 * Enable packet input/output from the hardware. This function is
452 * called after all internal setup is complete and IPD is enabled.
453 * After this function completes, packets will be accepted from the
454 * hardware ports. PKO should still be disabled to make sure packets
455 * aren't sent out partially setup hardware.
456 *
457 * Return: Zero on success, negative on failure
458 */
459 int __cvmx_helper_packet_hardware_enable(int xiface);
460
461 /*
462 * @INTERNAL
463 *
464 * Return: 0 for success and -1 for failure
465 */
466 int __cvmx_helper_set_link_info(int xiface, int index, cvmx_helper_link_info_t link_info);
467
468 /**
469 * @INTERNAL
470 *
471 * @param xiface
472 * @param port
473 *
474 * Return: valid link_info on success or -1 on failure
475 */
476 cvmx_helper_link_info_t __cvmx_helper_get_link_info(int xiface, int port);
477
478 /**
479 * @INTERNAL
480 *
481 * @param xiface
482 *
483 * Return: 0 if PKO does not do FCS and 1 otherwise.
484 */
485 int __cvmx_helper_get_has_fcs(int xiface);
486
487 void *cvmx_helper_mem_alloc(int node, u64 alloc_size, u64 align);
488 void cvmx_helper_mem_free(void *buffer, u64 size);
489
490 #define CVMX_QOS_NUM 8 /* Number of QoS priority classes */
491
492 typedef enum {
493 CVMX_QOS_PROTO_NONE, /* Disable QOS */
494 CVMX_QOS_PROTO_PAUSE, /* IEEE 802.3 PAUSE */
495 CVMX_QOS_PROTO_PFC /* IEEE 802.1Qbb-2011 PFC/CBFC */
496 } cvmx_qos_proto_t;
497
498 typedef enum {
499 CVMX_QOS_PKT_MODE_HWONLY, /* PAUSE packets processed in Hardware only. */
500 CVMX_QOS_PKT_MODE_SWONLY, /* PAUSE packets processed in Software only. */
501 CVMX_QOS_PKT_MODE_HWSW, /* PAUSE packets processed in both HW and SW. */
502 CVMX_QOS_PKT_MODE_DROP /* Ignore PAUSE packets. */
503 } cvmx_qos_pkt_mode_t;
504
505 typedef enum {
506 CVMX_QOS_POOL_PER_PORT, /* Pool per Physical Port */
507 CVMX_QOS_POOL_PER_CLASS /* Pool per Priority Class */
508 } cvmx_qos_pool_mode_t;
509
510 typedef struct cvmx_qos_config {
511 cvmx_qos_proto_t qos_proto; /* QoS protocol.*/
512 cvmx_qos_pkt_mode_t pkt_mode; /* PAUSE processing mode.*/
513 cvmx_qos_pool_mode_t pool_mode; /* FPA Pool mode.*/
514 int pktbuf_size; /* Packet buffer size */
515 int aura_size; /* Number of buffers */
516 int drop_thresh[CVMX_QOS_NUM]; /* DROP threashold in % */
517 int red_thresh[CVMX_QOS_NUM]; /* RED threashold in % */
518 int bp_thresh[CVMX_QOS_NUM]; /* BP threashold in % */
519 int groups[CVMX_QOS_NUM]; /* Base SSO group for QOS group set. */
520 int group_prio[CVMX_QOS_NUM]; /* SSO group priorities.*/
521 int pko_pfc_en; /* Enable PKO PFC layout. */
522 int vlan_num; /* VLAN number: 0 = 1st or 1 = 2nd. */
523 int p_time; /* PAUSE packets send time (in number of 512 bit-times).*/
524 int p_interval; /* PAUSE packet send interval (in number of 512 bit-times).*/
525 /* Internal parameters (should not be used by application developer): */
526 cvmx_fpa3_pool_t gpools[CVMX_QOS_NUM]; /* Pool to use.*/
527 cvmx_fpa3_gaura_t gauras[CVMX_QOS_NUM]; /* Global auras -- one per priority class. */
528 int bpids[CVMX_QOS_NUM]; /* PKI BPID.*/
529 int qpg_base; /* QPG Table base index.*/
530 } cvmx_qos_config_t;
531
532 /**
533 * Initialize QoS configuraiton with the SDK defaults.
534 *
535 * @param qos_cfg User QOS configuration parameters.
536 * Return: Zero on success, negative number otherwise.
537 */
538 int cvmx_helper_qos_config_init(cvmx_qos_proto_t qos_proto, cvmx_qos_config_t *qos_cfg);
539
540 /**
541 * Update the user static processor configuration.
542 * It should be done before any initialization of the DP units is performed.
543 *
544 * @param xipdport Global IPD port
545 * @param qos_cfg User QOS configuration parameters.
546 * Return: Zero on success, negative number otherwise.
547 */
548 int cvmx_helper_qos_port_config_update(int xipdport, cvmx_qos_config_t *qos_cfg);
549
550 /**
551 * Configure the Data Path components for QOS function.
552 * This function is called after the global processor initialization is
553 * performed.
554 *
555 * @param xipdport Global IPD port
556 * @param qos_cfg User QOS configuration parameters.
557 * Return: Zero on success, negative number otherwise.
558 */
559 int cvmx_helper_qos_port_setup(int xipdport, cvmx_qos_config_t *qos_cfg);
560
561 /**
562 * Configure the SSO for QOS function.
563 * This function is called after the global processor initialization is
564 * performed.
565 *
566 * @param node OCTEON3 node number.
567 * @param qos_cfg User QOS configuration parameters.
568 * Return: Zero on success, negative number otherwise.
569 */
570 int cvmx_helper_qos_sso_setup(int node, cvmx_qos_config_t *qos_cfg);
571
572 /**
573 * Return PKI_CHAN_E channel name based on the provided index.
574 * @param chan Channel index.
575 * @param namebuf Name buffer (output).
576 * @param buflen Name maximum length.
577 * Return: Length of name (in bytes) on success, negative number otherwise.
578 */
579 int cvmx_helper_get_chan_e_name(int chan, char *namebuf, int buflen);
580
581 #ifdef CVMX_DUMP_DIAGNOSTICS
582 void cvmx_helper_dump_for_diagnostics(int node);
583 #endif
584
585 #endif /* __CVMX_HELPER_H__ */
586