1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2018-2022 Marvell International Ltd.
4 *
5 * PKO resources.
6 */
7
8 #include <errno.h>
9 #include <log.h>
10 #include <time.h>
11 #include <linux/delay.h>
12
13 #include <mach/cvmx-regs.h>
14 #include <mach/cvmx-csr.h>
15 #include <mach/cvmx-bootmem.h>
16 #include <mach/octeon-model.h>
17 #include <mach/cvmx-fuse.h>
18 #include <mach/octeon-feature.h>
19 #include <mach/cvmx-qlm.h>
20 #include <mach/octeon_qlm.h>
21 #include <mach/cvmx-pcie.h>
22 #include <mach/cvmx-coremask.h>
23 #include <mach/cvmx-range.h>
24 #include <mach/cvmx-global-resources.h>
25
26 #include <mach/cvmx-agl-defs.h>
27 #include <mach/cvmx-bgxx-defs.h>
28 #include <mach/cvmx-ciu-defs.h>
29 #include <mach/cvmx-gmxx-defs.h>
30 #include <mach/cvmx-gserx-defs.h>
31 #include <mach/cvmx-ilk-defs.h>
32 #include <mach/cvmx-ipd-defs.h>
33 #include <mach/cvmx-pcsx-defs.h>
34 #include <mach/cvmx-pcsxx-defs.h>
35 #include <mach/cvmx-pki-defs.h>
36 #include <mach/cvmx-pko-defs.h>
37 #include <mach/cvmx-xcv-defs.h>
38
39 #include <mach/cvmx-hwpko.h>
40 #include <mach/cvmx-ilk.h>
41 #include <mach/cvmx-pki.h>
42 #include <mach/cvmx-pko3.h>
43 #include <mach/cvmx-pko3-queue.h>
44 #include <mach/cvmx-pko3-resources.h>
45
46 #include <mach/cvmx-helper.h>
47 #include <mach/cvmx-helper-board.h>
48 #include <mach/cvmx-helper-cfg.h>
49
50 #include <mach/cvmx-helper-bgx.h>
51 #include <mach/cvmx-helper-cfg.h>
52 #include <mach/cvmx-helper-util.h>
53 #include <mach/cvmx-helper-pki.h>
54
55 #define CVMX_GR_TAG_PKO_PORT_QUEUES(x) \
56 cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'p', 'o', 'q', '_', \
57 ((x) + '0'), '.', '.', '.', '.')
58 #define CVMX_GR_TAG_PKO_L2_QUEUES(x) \
59 cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'l', '2', 'q', '_', \
60 ((x) + '0'), '.', '.', '.', '.')
61 #define CVMX_GR_TAG_PKO_L3_QUEUES(x) \
62 cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'l', '3', 'q', '_', \
63 ((x) + '0'), '.', '.', '.', '.')
64 #define CVMX_GR_TAG_PKO_L4_QUEUES(x) \
65 cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'l', '4', 'q', '_', \
66 ((x) + '0'), '.', '.', '.', '.')
67 #define CVMX_GR_TAG_PKO_L5_QUEUES(x) \
68 cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'l', '5', 'q', '_', \
69 ((x) + '0'), '.', '.', '.', '.')
70 #define CVMX_GR_TAG_PKO_DESCR_QUEUES(x) \
71 cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'd', 'e', 'q', '_', \
72 ((x) + '0'), '.', '.', '.', '.')
73 #define CVMX_GR_TAG_PKO_PORT_INDEX(x) \
74 cvmx_get_gr_tag('c', 'v', 'm', '_', 'p', 'k', 'o', 'p', 'i', 'd', '_', \
75 ((x) + '0'), '.', '.', '.', '.')
76
77 /*
78 * @INRWENAL
79 * Per-DQ parameters, current and maximum queue depth counters
80 */
81 cvmx_pko3_dq_params_t *__cvmx_pko3_dq_params[CVMX_MAX_NODES];
82
83 static const short cvmx_pko_num_queues_78XX[256] = {
84 [CVMX_PKO_PORT_QUEUES] = 32, [CVMX_PKO_L2_QUEUES] = 512,
85 [CVMX_PKO_L3_QUEUES] = 512, [CVMX_PKO_L4_QUEUES] = 1024,
86 [CVMX_PKO_L5_QUEUES] = 1024, [CVMX_PKO_DESCR_QUEUES] = 1024
87 };
88
89 static const short cvmx_pko_num_queues_73XX[256] = {
90 [CVMX_PKO_PORT_QUEUES] = 16, [CVMX_PKO_L2_QUEUES] = 256,
91 [CVMX_PKO_L3_QUEUES] = 256, [CVMX_PKO_L4_QUEUES] = 0,
92 [CVMX_PKO_L5_QUEUES] = 0, [CVMX_PKO_DESCR_QUEUES] = 256
93 };
94
cvmx_pko3_num_level_queues(enum cvmx_pko3_level_e level)95 int cvmx_pko3_num_level_queues(enum cvmx_pko3_level_e level)
96 {
97 unsigned int nq = 0, ne = 0;
98
99 if (OCTEON_IS_MODEL(OCTEON_CN78XX)) {
100 ne = NUM_ELEMENTS(cvmx_pko_num_queues_78XX);
101 nq = cvmx_pko_num_queues_78XX[level];
102 }
103 if (OCTEON_IS_MODEL(OCTEON_CN73XX) || OCTEON_IS_MODEL(OCTEON_CNF75XX)) {
104 ne = NUM_ELEMENTS(cvmx_pko_num_queues_73XX);
105 nq = cvmx_pko_num_queues_73XX[level];
106 }
107
108 if (nq == 0 || level >= ne) {
109 printf("ERROR: %s: queue level %#x invalid\n", __func__, level);
110 return -1;
111 }
112
113 return nq;
114 }
115
116 static inline struct global_resource_tag
__cvmx_pko_get_queues_resource_tag(int node,enum cvmx_pko3_level_e queue_level)117 __cvmx_pko_get_queues_resource_tag(int node, enum cvmx_pko3_level_e queue_level)
118 {
119 if (cvmx_pko3_num_level_queues(queue_level) == 0) {
120 printf("ERROR: %s: queue level %#x invalid\n", __func__,
121 queue_level);
122 return CVMX_GR_TAG_INVALID;
123 }
124
125 switch (queue_level) {
126 case CVMX_PKO_PORT_QUEUES:
127 return CVMX_GR_TAG_PKO_PORT_QUEUES(node);
128 case CVMX_PKO_L2_QUEUES:
129 return CVMX_GR_TAG_PKO_L2_QUEUES(node);
130 case CVMX_PKO_L3_QUEUES:
131 return CVMX_GR_TAG_PKO_L3_QUEUES(node);
132 case CVMX_PKO_L4_QUEUES:
133 return CVMX_GR_TAG_PKO_L4_QUEUES(node);
134 case CVMX_PKO_L5_QUEUES:
135 return CVMX_GR_TAG_PKO_L5_QUEUES(node);
136 case CVMX_PKO_DESCR_QUEUES:
137 return CVMX_GR_TAG_PKO_DESCR_QUEUES(node);
138 default:
139 printf("ERROR: %s: queue level %#x invalid\n", __func__,
140 queue_level);
141 return CVMX_GR_TAG_INVALID;
142 }
143 }
144
145 /**
146 * Allocate or reserve a pko resource - called by wrapper functions
147 * @param tag processed global resource tag
148 * @param base_queue if specified the queue to reserve
149 * @param owner to be specified for resource
150 * @param num_queues to allocate
151 * @param max_num_queues for global resource
152 */
cvmx_pko_alloc_global_resource(struct global_resource_tag tag,int base_queue,int owner,int num_queues,int max_num_queues)153 int cvmx_pko_alloc_global_resource(struct global_resource_tag tag,
154 int base_queue, int owner, int num_queues,
155 int max_num_queues)
156 {
157 int res;
158
159 if (cvmx_create_global_resource_range(tag, max_num_queues)) {
160 debug("ERROR: Failed to create PKO3 resource: %lx-%lx\n",
161 (unsigned long)tag.hi, (unsigned long)tag.lo);
162 return -1;
163 }
164 if (base_queue >= 0) {
165 res = cvmx_reserve_global_resource_range(tag, owner, base_queue,
166 num_queues);
167 } else {
168 res = cvmx_allocate_global_resource_range(tag, owner,
169 num_queues, 1);
170 }
171 if (res < 0) {
172 debug("ERROR: Failed to %s PKO3 tag %lx:%lx, %i %i %i %i.\n",
173 ((base_queue < 0) ? "allocate" : "reserve"),
174 (unsigned long)tag.hi, (unsigned long)tag.lo, base_queue,
175 owner, num_queues, max_num_queues);
176 return -1;
177 }
178
179 return res;
180 }
181
182 /**
183 * Allocate or reserve PKO queues - wrapper for cvmx_pko_alloc_global_resource
184 *
185 * @param node on which to allocate/reserve PKO queues
186 * @param level of PKO queue
187 * @param owner of reserved/allocated resources
188 * @param base_queue to start reservation/allocatation
189 * @param num_queues number of queues to be allocated
190 * @return 0 on success, -1 on failure
191 */
cvmx_pko_alloc_queues(int node,int level,int owner,int base_queue,int num_queues)192 int cvmx_pko_alloc_queues(int node, int level, int owner, int base_queue,
193 int num_queues)
194 {
195 struct global_resource_tag tag =
196 __cvmx_pko_get_queues_resource_tag(node, level);
197 int max_num_queues = cvmx_pko3_num_level_queues(level);
198
199 return cvmx_pko_alloc_global_resource(tag, base_queue, owner,
200 num_queues, max_num_queues);
201 }
202
203 /**
204 * @INTERNAL
205 *
206 * Initialize the pointer to the descriptor queue parameter table.
207 * The table is one named block per node, and may be shared between
208 * applications.
209 */
__cvmx_pko3_dq_param_setup(unsigned int node)210 int __cvmx_pko3_dq_param_setup(unsigned int node)
211 {
212 return 0;
213 }
214