1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Copyright 2011 Freescale Semiconductor, Inc.
4 * Copyright 2020 NXP
5 * Andy Fleming <afleming@gmail.com>
6 *
7 * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
8 */
9
10 #ifndef _PHY_INTERFACE_H
11 #define _PHY_INTERFACE_H
12
13 #include <string.h>
14
15 typedef enum {
16 PHY_INTERFACE_MODE_NA, /* don't touch */
17 PHY_INTERFACE_MODE_INTERNAL,
18 PHY_INTERFACE_MODE_MII,
19 PHY_INTERFACE_MODE_GMII,
20 PHY_INTERFACE_MODE_SGMII,
21 PHY_INTERFACE_MODE_TBI,
22 PHY_INTERFACE_MODE_REVMII,
23 PHY_INTERFACE_MODE_RMII,
24 PHY_INTERFACE_MODE_REVRMII,
25 PHY_INTERFACE_MODE_RGMII,
26 PHY_INTERFACE_MODE_RGMII_ID,
27 PHY_INTERFACE_MODE_RGMII_RXID,
28 PHY_INTERFACE_MODE_RGMII_TXID,
29 PHY_INTERFACE_MODE_RTBI,
30 PHY_INTERFACE_MODE_SMII,
31 PHY_INTERFACE_MODE_XGMII,
32 PHY_INTERFACE_MODE_XLGMII,
33 PHY_INTERFACE_MODE_MOCA,
34 PHY_INTERFACE_MODE_QSGMII,
35 PHY_INTERFACE_MODE_TRGMII,
36 PHY_INTERFACE_MODE_100BASEX,
37 PHY_INTERFACE_MODE_1000BASEX,
38 PHY_INTERFACE_MODE_2500BASEX,
39 PHY_INTERFACE_MODE_5GBASER,
40 PHY_INTERFACE_MODE_RXAUI,
41 PHY_INTERFACE_MODE_XAUI,
42 /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
43 PHY_INTERFACE_MODE_10GBASER,
44 PHY_INTERFACE_MODE_25GBASER,
45 PHY_INTERFACE_MODE_USXGMII,
46 /* 10GBASE-KR - with Clause 73 AN */
47 PHY_INTERFACE_MODE_10GKR,
48 PHY_INTERFACE_MODE_QUSGMII,
49 PHY_INTERFACE_MODE_1000BASEKX,
50 #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
51 /* LX2160A SERDES modes */
52 PHY_INTERFACE_MODE_25G_AUI,
53 PHY_INTERFACE_MODE_XLAUI,
54 PHY_INTERFACE_MODE_CAUI2,
55 PHY_INTERFACE_MODE_CAUI4,
56 #endif
57 #if defined(CONFIG_PHY_NCSI)
58 PHY_INTERFACE_MODE_NCSI,
59 #endif
60 PHY_INTERFACE_MODE_MAX,
61 } phy_interface_t;
62
63 static const char * const phy_interface_strings[] = {
64 [PHY_INTERFACE_MODE_NA] = "",
65 [PHY_INTERFACE_MODE_INTERNAL] = "internal",
66 [PHY_INTERFACE_MODE_MII] = "mii",
67 [PHY_INTERFACE_MODE_GMII] = "gmii",
68 [PHY_INTERFACE_MODE_SGMII] = "sgmii",
69 [PHY_INTERFACE_MODE_TBI] = "tbi",
70 [PHY_INTERFACE_MODE_REVMII] = "rev-mii",
71 [PHY_INTERFACE_MODE_RMII] = "rmii",
72 [PHY_INTERFACE_MODE_REVRMII] = "rev-rmii",
73 [PHY_INTERFACE_MODE_RGMII] = "rgmii",
74 [PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id",
75 [PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid",
76 [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",
77 [PHY_INTERFACE_MODE_RTBI] = "rtbi",
78 [PHY_INTERFACE_MODE_SMII] = "smii",
79 [PHY_INTERFACE_MODE_XGMII] = "xgmii",
80 [PHY_INTERFACE_MODE_XLGMII] = "xlgmii",
81 [PHY_INTERFACE_MODE_MOCA] = "moca",
82 [PHY_INTERFACE_MODE_QSGMII] = "qsgmii",
83 [PHY_INTERFACE_MODE_TRGMII] = "trgmii",
84 [PHY_INTERFACE_MODE_1000BASEX] = "1000base-x",
85 [PHY_INTERFACE_MODE_1000BASEKX] = "1000base-kx",
86 [PHY_INTERFACE_MODE_2500BASEX] = "2500base-x",
87 [PHY_INTERFACE_MODE_5GBASER] = "5gbase-r",
88 [PHY_INTERFACE_MODE_RXAUI] = "rxaui",
89 [PHY_INTERFACE_MODE_XAUI] = "xaui",
90 [PHY_INTERFACE_MODE_10GBASER] = "10gbase-r",
91 [PHY_INTERFACE_MODE_25GBASER] = "25gbase-r",
92 [PHY_INTERFACE_MODE_USXGMII] = "usxgmii",
93 [PHY_INTERFACE_MODE_10GKR] = "10gbase-kr",
94 [PHY_INTERFACE_MODE_100BASEX] = "100base-x",
95 [PHY_INTERFACE_MODE_QUSGMII] = "qusgmii",
96 #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
97 /* LX2160A SERDES modes */
98 [PHY_INTERFACE_MODE_25G_AUI] = "25g-aui",
99 [PHY_INTERFACE_MODE_XLAUI] = "xlaui4",
100 [PHY_INTERFACE_MODE_CAUI2] = "caui2",
101 [PHY_INTERFACE_MODE_CAUI4] = "caui4",
102 #endif
103 #if defined(CONFIG_PHY_NCSI)
104 [PHY_INTERFACE_MODE_NCSI] = "NC-SI",
105 #endif
106 };
107
108 /* Backplane modes:
109 * are considered a sub-type of phy_interface_t: XGMII
110 * and are specified in "phy-connection-type" with one of the following strings
111 */
112 static const char * const backplane_mode_strings[] = {
113 "10gbase-kr",
114 "40gbase-kr4",
115 };
116
phy_string_for_interface(phy_interface_t i)117 static inline const char *phy_string_for_interface(phy_interface_t i)
118 {
119 /* Default to unknown */
120 if (i >= PHY_INTERFACE_MODE_MAX)
121 i = PHY_INTERFACE_MODE_NA;
122
123 return phy_interface_strings[i];
124 }
125
is_backplane_mode(const char * phyconn)126 static inline bool is_backplane_mode(const char *phyconn)
127 {
128 int i;
129
130 if (!phyconn)
131 return false;
132 for (i = 0; i < ARRAY_SIZE(backplane_mode_strings); i++) {
133 if (!strcmp(phyconn, backplane_mode_strings[i]))
134 return true;
135 }
136 return false;
137 }
138
139 #endif /* _PHY_INTERFACE_H */
140