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Searched defs:pll_state (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_cx0_phy.c2007 struct intel_cx0pll_state *pll_state = &crtc_state->dpll_hw_state.cx0pll; in intel_c10pll_update_pll() local
2051 struct intel_c10pll_state *pll_state) in intel_c10pll_readout_hw_state()
2080 const struct intel_c10pll_state *pll_state = &crtc_state->dpll_hw_state.cx0pll.c10; in intel_c10_pll_program() local
2145 static int intel_c20_compute_hdmi_tmds_pll(u64 pixel_clock, struct intel_c20pll_state *pll_state) in intel_c20_compute_hdmi_tmds_pll()
2303 const struct intel_c20pll_state *pll_state) in intel_c20pll_calc_port_clock()
2348 struct intel_c20pll_state *pll_state) in intel_c20pll_readout_hw_state()
2545 const struct intel_c20pll_state *pll_state = &crtc_state->dpll_hw_state.cx0pll.c20; in intel_c20_pll_program() local
2651 const struct intel_c10pll_state *pll_state) in intel_c10pll_calc_port_clock()
3278 struct intel_cx0pll_state *pll_state) in intel_cx0pll_readout_hw_state()
3347 const struct intel_cx0pll_state *pll_state) in intel_cx0pll_calc_port_clock()
A Dintel_snps_phy.c1826 const struct intel_mpllb_state *pll_state = &crtc_state->dpll_hw_state.mpllb; in intel_mpllb_enable() local
1922 const struct intel_mpllb_state *pll_state) in intel_mpllb_calc_port_clock()
1953 struct intel_mpllb_state *pll_state) in intel_mpllb_readout_hw_state()
/linux/sound/soc/codecs/
A Dwm8580.c228 struct pll_state { struct
248 struct pll_state a; argument
/linux/drivers/clk/
A Dclk-stm32f4.c667 int pll_state; in stm32f4_pll_set_rate() local
717 int pll_state, ret; in stm32f4_pll_div_set_rate() local

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