| /u-boot/drivers/i2c/ |
| A D | synquacer_i2c.c | 56 #define BUS_CLK_FR(rate) (((rate) / 20000000) + 1) argument
61 #define CLK_MASTER_STD(rate) \ argument
64 #define CLK_MASTER_FAST(rate) \ argument
69 #define CCR_CS_STD_MAX_18M(rate) \ argument
74 #define CSR_CS_STD_MAX_18M(rate) 0x00 argument
77 #define CCR_CS_FAST_MAX_18M(rate) \ argument
82 #define CSR_CS_FAST_MAX_18M(rate) 0x00 argument
86 #define CCR_CS_STD_MIN_18M(rate) \ argument
91 #define CSR_CS_STD_MIN_18M(rate) \ argument
96 #define CCR_CS_FAST_MIN_18M(rate) \ argument
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| /u-boot/drivers/clk/rockchip/ |
| A D | clk_rk3568.c | 99 ulong pll_id, ulong rate) in rk3568_pmu_pll_set_rate()
208 ulong rate) in rk3568_rtc32k_set_pmuclk()
335 ulong rate) in rk3568_pmu_set_pmuclk()
354 ulong rate = 0; in rk3568_pmuclk_get_rate() local
713 u32 con, sel, rate; in rk3568_bus_get_clk() local
749 ulong clk_id, ulong rate) in rk3568_bus_set_clk()
794 u32 con, sel, rate; in rk3568_perimid_get_clk() local
873 u32 con, sel, rate; in rk3568_top_get_clk() local
1003 ulong rate; in rk3568_i2c_get_clk() local
1030 ulong rate) in rk3568_i2c_set_clk()
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| A D | clk_rv1126.c | 172 ulong rate) in rv1126_rtc32k_set_pmuclk()
327 ulong rate) in rv1126_spi_set_pmuclk()
355 ulong rate) in rv1126_pdpmu_set_pmuclk()
373 ulong rate = 0; in rv1126_pmuclk_get_rate() local
640 ulong rate) in rv1126_pdbus_set_clk()
710 ulong rate) in rv1126_pdphp_set_clk()
793 ulong rate) in rv1126_i2c_set_clk()
958 ulong rate) in rv1126_crypto_set_clk()
1033 ulong rate) in rv1126_mmc_set_clk()
1414 ulong rate = 0; in rv1126_clk_get_rate() local
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| A D | clk_rk3588.c | 126 u32 con, sel, rate; in rk3588_center_get_clk() local
189 ulong clk_id, ulong rate) in rk3588_center_set_clk()
258 u32 con, sel, div, rate, prate; in rk3588_top_get_clk() local
301 ulong clk_id, ulong rate) in rk3588_top_set_clk()
350 ulong rate; in rk3588_i2c_get_clk() local
401 ulong rate) in rk3588_i2c_set_clk()
495 ulong clk_id, ulong rate) in rk3588_spi_set_clk()
579 ulong clk_id, ulong rate) in rk3588_pwm_set_clk()
652 ulong clk_id, ulong rate) in rk3588_adc_set_clk()
778 ulong clk_id, ulong rate) in rk3588_mmc_set_clk()
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| A D | clk_pll.c | 231 rockchip_get_pll_settings(struct rockchip_pll_clock *pll, ulong rate) in rockchip_get_pll_settings()
254 const struct rockchip_pll_rate_table *rate; in rk3036_pll_set_rate() local
323 ulong rate; in rk3036_pll_get_rate() local
390 const struct rockchip_pll_rate_table *rate; in rk3588_pll_set_rate() local
509 u64 rate, postdiv; in rk3588_pll_get_rate() local
556 ulong rate = 0; in rockchip_pll_get_rate() local
609 ulong rate) in rockchip_get_cpu_settings()
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| /u-boot/drivers/clk/aspeed/ |
| A D | clk_ast2600.c | 250 uint32_t rate = ast2600_get_hclk_rate(scu); in ast2600_get_pclk2_rate() local
260 uint32_t rate = 0; in ast2600_get_uxclk_in_rate() local
285 uint32_t rate = 0; in ast2600_get_huxclk_in_rate() local
310 uint32_t rate = ast2600_get_uxclk_in_rate(scu); in ast2600_get_uart_uxclk_rate() local
322 uint32_t rate = ast2600_get_huxclk_in_rate(scu); in ast2600_get_uart_huxclk_rate() local
334 uint32_t rate = 0; in ast2600_get_sdio_clk_rate() local
359 uint32_t rate = 0; in ast2600_get_uart_clk_rate() local
424 ulong rate = 0; in ast2600_clk_get_rate() local
882 uint32_t rate = 0; in ast2600_enable_extsdclk() local
927 uint32_t rate = 0; in ast2600_enable_extemmcclk() local
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| A D | clk_ast2500.c | 99 u32 rate; in ast2500_get_hclk() local
144 ulong rate; in ast2500_clk_get_rate() local
209 ulong rate; member
294 static ulong ast2500_configure_ddr(struct ast2500_scu *scu, ulong rate) in ast2500_configure_ddr()
390 static ulong ast2500_configure_d2pll(struct ast2500_scu *scu, ulong rate) in ast2500_configure_d2pll()
472 static ulong ast2500_clk_set_rate(struct clk *clk, ulong rate) in ast2500_clk_set_rate()
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| /u-boot/drivers/clk/owl/ |
| A D | clk_owl.c | 141 ulong rate; in get_sd_parent_rate() local
170 static ulong owl_set_sd_clk_rate(struct owl_clk_priv *priv, ulong rate, in owl_set_sd_clk_rate()
199 ulong rate; in owl_clk_get_rate() local
212 static ulong owl_clk_set_rate(struct clk *clk, ulong rate) in owl_clk_set_rate()
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| /u-boot/arch/arm/mach-imx/mx7ulp/ |
| A D | scg.c | 56 u32 reg, val, rate; in scg_sircdiv_get_rate() local
94 u32 reg, val, rate; in scg_fircdiv_get_rate() local
132 u32 reg, val, rate; in scg_soscdiv_get_rate() local
170 u32 reg, val, rate; in scg_apll_pfd_get_rate() local
220 u32 reg, val, rate; in scg_spll_pfd_get_rate() local
270 u32 reg, val, rate; in scg_apll_get_rate() local
298 u32 reg, val, rate; in scg_spll_get_rate() local
333 u32 reg, val, rate, div; in scg_ddr_get_rate() local
357 u32 reg, val, rate, nic0_rate; in scg_nic_get_rate() local
438 u32 reg, val, rate; in scg_sys_get_rate() local
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| /u-boot/drivers/clk/renesas/ |
| A D | rcar-cpg-lib.c | 78 u64 rate; in rcar_clk_get_rate64_div_table() local
92 int rcar_clk_set_rate64_div_table(unsigned int parent, u64 parent_rate, ulong rate, in rcar_clk_set_rate64_div_table()
120 u64 rate = 0; in rcar_clk_get_rate64_rpcd2() local
149 int rcar_clk_set_rate64_sdh(unsigned int parent, u64 parent_rate, ulong rate, in rcar_clk_set_rate64_sdh()
163 int rcar_clk_set_rate64_sd(unsigned int parent, u64 parent_rate, ulong rate, in rcar_clk_set_rate64_sd()
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| A D | clk-rcar-gen2.c | 78 u32 value, mult, div, rate = 0; in gen2_clk_get_rate() local
205 static int gen2_clk_setup_mmcif_div(struct clk *clk, ulong rate) in gen2_clk_setup_mmcif_div()
245 static ulong gen2_clk_set_rate(struct clk *clk, ulong rate) in gen2_clk_set_rate()
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| /u-boot/arch/arm/mach-snapdragon/ |
| A D | clock-sdm845.c | 57 const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, uint rate) in qcom_find_freq()
73 static int clk_init_uart(struct msm_clk_priv *priv, uint rate) in clk_init_uart()
83 ulong msm_set_rate(struct clk *clk, ulong rate) in msm_set_rate()
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| A D | clock-apq8016.c | 52 static int clk_init_sdc(struct msm_clk_priv *priv, int slot, uint rate) in clk_init_sdc()
96 ulong msm_set_rate(struct clk *clk, ulong rate) in msm_set_rate()
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| A D | clock-apq8096.c | 43 static int clk_init_sdc(struct msm_clk_priv *priv, uint rate) in clk_init_sdc()
82 ulong msm_set_rate(struct clk *clk, ulong rate) in msm_set_rate()
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| /u-boot/drivers/clk/ |
| A D | clk-hsdk-cgu.c | 194 const u32 rate; member
426 u64 rate; in pll_get() local
479 unsigned long rate, in hsdk_pll_comm_update_rate()
499 unsigned long rate, in hsdk_pll_core_update_rate()
532 static ulong pll_set(struct clk *sclk, ulong rate) in pll_set()
578 static ulong cpu_clk_set(struct clk *sclk, ulong rate) in cpu_clk_set()
636 static ulong axi_clk_set(struct clk *sclk, ulong rate) in axi_clk_set()
641 static ulong tun_hsdk_set(struct clk *sclk, ulong rate) in tun_hsdk_set()
646 static ulong tun_h4xd_set(struct clk *sclk, ulong rate) in tun_h4xd_set()
651 static ulong idiv_set(struct clk *sclk, ulong rate) in idiv_set()
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| A D | clk-composite.c | 54 struct clk *rate = composite->rate; in clk_composite_recalc_rate() local
62 static ulong clk_composite_set_rate(struct clk *clk, unsigned long rate) in clk_composite_set_rate()
105 struct clk *rate, in clk_register_composite()
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| /u-boot/drivers/clk/ti/ |
| A D | clk-divider.c | 72 ulong rate) in _div_round_up()
92 ulong rate) in _div_round()
100 static int clk_ti_divider_best_div(struct clk *clk, ulong rate, in clk_ti_divider_best_div()
172 static ulong clk_ti_divider_round_rate(struct clk *clk, ulong rate) in clk_ti_divider_round_rate()
184 static ulong clk_ti_divider_set_rate(struct clk *clk, ulong rate) in clk_ti_divider_set_rate()
215 ulong rate, parent_rate; in clk_ti_divider_get_rate() local
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| /u-boot/arch/arm/mach-zynq/ |
| A D | clk.c | 40 ulong rate; in set_cpu_clk_info() local
90 unsigned long rate; in soc_clk_dump() local
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| /u-boot/arch/arm/mach-ipq40xx/ |
| A D | clock-ipq4019.c | 22 ulong msm_set_rate(struct clk *clk, ulong rate) in msm_set_rate()
44 static ulong msm_clk_set_rate(struct clk *clk, ulong rate) in msm_clk_set_rate()
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| /u-boot/arch/mips/mach-pic32/ |
| A D | cpu.c | 29 static ulong rate(int id) in rate() function
34 ulong rate; in rate() local
65 ulong rate; in prefetch_init() local
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| /u-boot/drivers/clk/imx/ |
| A D | clk-imx8qm.c | 45 ulong rate; in imx8_clk_get_rate() local
149 ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) in imx8_clk_set_rate()
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| A D | clk-imx8qxp.c | 48 ulong rate; in imx8_clk_get_rate() local
142 ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) in imx8_clk_set_rate()
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| A D | clk-imx8.c | 25 __weak ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) in imx8_clk_set_rate()
50 unsigned long rate; in soc_clk_dump() local
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| A D | clk-pll14xx.c | 117 struct clk_pll14xx *pll, unsigned long rate) in imx_get_pll_settings()
169 static inline bool clk_pll1416x_mp_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1416x_mp_change()
180 static inline bool clk_pll1443x_mpk_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1443x_mpk_change()
193 static inline bool clk_pll1443x_mp_change(const struct imx_pll14xx_rate_table *rate, in clk_pll1443x_mp_change()
217 const struct imx_pll14xx_rate_table *rate; in clk_pll1416x_set_rate() local
283 const struct imx_pll14xx_rate_table *rate; in clk_pll1443x_set_rate() local
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| /u-boot/test/dm/ |
| A D | k210_pll.c | 13 static int dm_test_k210_pll_calc_config(u32 rate, u32 rate_in, in dm_test_k210_pll_calc_config()
76 #define compare(rate, rate_in) do { \ in dm_test_k210_pll() argument
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