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Searched defs:reg_val (Results 1 – 25 of 46) sorted by relevance

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/u-boot/include/
A Dbitfield.h49 static inline uint bitfield_extract(uint reg_val, uint shift, uint width) in bitfield_extract()
58 static inline uint bitfield_replace(uint reg_val, uint shift, uint width, in bitfield_replace()
73 static inline uint bitfield_extract_by_mask(uint reg_val, uint mask) in bitfield_extract_by_mask()
84 static inline uint bitfield_replace_by_mask(uint reg_val, uint mask, in bitfield_replace_by_mask()
/u-boot/drivers/video/tegra124/
A Dsor.c116 u32 reg_val; in tegra_dc_sor_set_power_state() local
147 u32 reg_val; in tegra_dc_sor_set_dp_linkctl() local
183 u32 reg_val; in tegra_dc_sor_enable_lane_sequencer() local
218 u32 reg_val; in tegra_dc_sor_power_dplanes() local
248 u32 reg_val; in tegra_dc_sor_set_panel_power() local
280 u32 reg_val; in tegra_dc_sor_set_dp_mode() local
329 u32 reg_val; in tegra_dc_sor_io_set_dpd() local
376 u32 reg_val; in tegra_dc_sor_set_internal_panel() local
393 u32 reg_val; in tegra_dc_sor_read_link_config() local
431 u32 reg_val; in tegra_dc_sor_set_lane_count() local
[all …]
/u-boot/drivers/usb/musb-new/
A Dsunxi.c98 static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val) in USBC_WakeUp_ClearChangeDetect()
111 u32 reg_val; in USBC_EnableIdPullUp() local
121 u32 reg_val; in USBC_EnableDpDmPullUp() local
131 u32 reg_val; in USBC_ForceIdToLow() local
142 u32 reg_val; in USBC_ForceIdToHigh() local
153 u32 reg_val; in USBC_ForceVbusValidToLow() local
164 u32 reg_val; in USBC_ForceVbusValidToHigh() local
/u-boot/drivers/mtd/nand/raw/
A Dtegra_nand.c123 u32 reg_val; in nand_waitfor_cmd_completion() local
213 int reg_val; in nand_dev_ready() local
245 u32 reg_val; in nand_clear_interrupt_status() local
397 u32 reg_val; in check_ecc_error() local
441 u32 reg_val; in start_command() local
472 struct fdt_nand *config, u32 *reg_val) in set_bus_width_page_size()
514 u32 reg_val; in nand_rw_page() local
730 u32 reg_val; in nand_rw_oob() local
862 u32 reg_val, clk_rate, clk_period, time_val; in setup_timing() local
A Darasan_nfc.c276 u32 reg_val; in arasan_nand_select_chip() local
292 u32 reg_val; in arasan_nand_enable_ecc() local
340 u32 reg_val, i, pktsize, pktnum; in arasan_nand_read_page() local
519 u32 reg_val, i, pktsize, pktnum; in arasan_nand_write_page_hwecc() local
712 u32 reg_val, page; in arasan_nand_send_wrcmd() local
757 u32 reg_val; in arasan_nand_write_buf() local
810 u32 reg_val, page; in arasan_nand_erase() local
868 u32 reg_val; in arasan_nand_read_status() local
922 u32 reg_val, addr_cycles, page; in arasan_nand_send_rdcmd() local
975 u32 reg_val, i; in arasan_nand_read_buf() local
A Dkmeter1_nand.c52 u8 reg_val = read_mode(); in kpn_nand_hwcontrol() local
/u-boot/arch/arm/mach-sunxi/
A Ddram_sun4i.c68 u32 reg_val; in mctl_ddr3_reset() local
241 u32 reg_val; in mctl_setup_dram_clock() local
389 u32 reg_val; in dramc_scan_readpipe() local
515 u32 reg_val; in mctl_set_impedance() local
566 u32 reg_val; in dramc_init_helper() local
A Dcpu_info.c123 uint32_t reg_val; in sun8i_efuse_read() local
A Ddram_sunxi_dw.c312 u32 reg_val; in mctl_h3_zq_calibration_quirk() local
370 u32 reg_val; in mctl_v3s_zq_calibration_quirk() local
/u-boot/drivers/power/regulator/
A Dsandbox.c81 uint8_t reg_val; in out_get_value() local
108 uint8_t reg_val; in out_set_value() local
143 uint8_t reg_val; in out_get_mode() local
169 int reg_val = -1; in out_set_mode() local
/u-boot/drivers/net/phy/
A Dmscc.c298 u16 reg_val; in vsc8584_cmd() local
1021 u16 reg_val; in mscc_vsc8531_vsc8541_init_scripts() local
1130 u16 reg_val = 0; in mscc_phy_soft_reset() local
1157 u16 reg_val = 0; in vsc8531_vsc8541_mac_config() local
1229 u16 reg_val; in vsc8531_vsc8541_clkout_config() local
1270 u16 reg_val; in vsc8531_vsc8541_clk_skew_config() local
1301 u16 reg_val; in vsc8531_config() local
1360 u16 reg_val; in vsc8541_config() local
1420 u16 reg_val; in vsc8584_config_init() local
A Dbroadcom.c40 int reg_val; in bcm_phy_write_misc() local
A Dadin.c187 u16 reg_val; in adin_config_rgmii_mode() local
/u-boot/drivers/ddr/imx/imx8ulp/
A Dddr_init.c46 u32 reg_val; in ddr_enable_pll_bypass() local
82 u32 reg_val; in ddr_calibration() local
/u-boot/arch/arm/mach-imx/imx8ulp/upower/
A Dupower_hal.c76 int upower_pmic_i2c_write(u32 reg_addr, u32 reg_val) in upower_pmic_i2c_write()
99 int upower_pmic_i2c_read(u32 reg_addr, u32 *reg_val) in upower_pmic_i2c_read()
/u-boot/arch/arm/mach-imx/mx7/
A Dddr.c140 u32 reg_val, field_val; in imx_ddr_size() local
/u-boot/drivers/ata/
A Dahci_sunxi.c21 u32 reg_val; in sunxi_ahci_phy_init() local
/u-boot/drivers/ddr/marvell/a38x/
A Dmv_ddr_plat.c328 u32 reg_val = data; in dunit_write() local
665 u32 reg_val; in is_prfa_done() local
686 u32 reg_val = ((data & PRFA_DATA_MASK) << PRFA_DATA_OFFS) | in prfa_write() local
710 u32 i, reg_val; in prfa_read() local
1335 u32 reg_val; in mv_ddr_pre_training_soc_config() local
1443 u32 reg_val; in mv_ddr_post_training_soc_config() local
/u-boot/arch/arm/mach-mvebu/serdes/a38x/
A Dsys_env_lib.h113 #define REF_CLK_SELECTOR_VAL_PEX0(reg_val) (reg_val >> 2) & 0x1 argument
114 #define REF_CLK_SELECTOR_VAL_PEX1(reg_val) (reg_val >> 3) & 0x1 argument
115 #define REF_CLK_SELECTOR_VAL_PEX2(reg_val) (reg_val >> 30) & 0x1 argument
116 #define REF_CLK_SELECTOR_VAL_PEX3(reg_val) (reg_val >> 31) & 0x1 argument
117 #define REF_CLK_SELECTOR_VAL(reg_val) (reg_val & 0x1) argument
/u-boot/arch/arm/mach-exynos/
A Dlowlevel_init.c72 uint32_t val, reg_val; in low_power_start() local
/u-boot/drivers/spi/
A Dmtk_spim.c174 u32 reg_val; in mtk_spim_hw_init() local
256 u32 spi_clk_hz, div, sck_time, cs_time, reg_val; in mtk_spim_prepare_transfer() local
307 u32 packet_size, packet_loop, reg_val; in mtk_spim_setup_packet() local
442 u32 reg_val, nio = 1, tx_size; in mtk_spim_exec_op() local
A Dspi-aspeed-smc.c156 u32 reg_val; in ast2400_fmc_chip_set_4byte() local
244 u32 reg_val; in ast2500_spi_chip_set_4byte() local
384 u32 reg_val; in ast2600_spi_chip_set_4byte() local
932 u32 reg_val; in aspeed_spi_ctrl_init() local
/u-boot/arch/arm/mach-omap2/
A Dvc.c101 u32 reg_val; in omap_vc_bypass_send_value() local
/u-boot/arch/arm/mach-zynq/
A Dslcr.c127 u32 reg_val; in zynq_slcr_devcfg_disable() local
/u-boot/drivers/w1/
A Dmxc_w1.c134 u16 reg_val; in mxc_w1_reset() local

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