1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3 * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
4 */
5
6 #include <command.h>
7 #include <console.h>
8 #include <dfu.h>
9 #include <image.h>
10 #include <malloc.h>
11 #include <misc.h>
12 #include <mmc.h>
13 #include <part.h>
14 #include <tee.h>
15 #include <asm/arch/stm32mp1_smc.h>
16 #include <asm/global_data.h>
17 #include <dm/device_compat.h>
18 #include <dm/uclass.h>
19 #include <jffs2/load_kernel.h>
20 #include <linux/list.h>
21 #include <linux/list_sort.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/sizes.h>
24
25 #include "stm32prog.h"
26
27 /* Primary GPT header size for 128 entries : 17kB = 34 LBA of 512B */
28 #define GPT_HEADER_SZ 34
29
30 #define OPT_SELECT BIT(0)
31 #define OPT_EMPTY BIT(1)
32 #define OPT_DELETE BIT(2)
33
34 #define IS_SELECT(part) ((part)->option & OPT_SELECT)
35 #define IS_EMPTY(part) ((part)->option & OPT_EMPTY)
36 #define IS_DELETE(part) ((part)->option & OPT_DELETE)
37
38 #define ALT_BUF_LEN SZ_1K
39
40 #define ROOTFS_MMC0_UUID \
41 EFI_GUID(0xE91C4E10, 0x16E6, 0x4C0E, \
42 0xBD, 0x0E, 0x77, 0xBE, 0xCF, 0x4A, 0x35, 0x82)
43
44 #define ROOTFS_MMC1_UUID \
45 EFI_GUID(0x491F6117, 0x415D, 0x4F53, \
46 0x88, 0xC9, 0x6E, 0x0D, 0xE5, 0x4D, 0xEA, 0xC6)
47
48 #define ROOTFS_MMC2_UUID \
49 EFI_GUID(0xFD58F1C7, 0xBE0D, 0x4338, \
50 0x88, 0xE9, 0xAD, 0x8F, 0x05, 0x0A, 0xEB, 0x18)
51
52 /* RAW partition (binary / bootloader) used Linux - reserved UUID */
53 #define LINUX_RESERVED_UUID "8DA63339-0007-60C0-C436-083AC8230908"
54
55 /*
56 * unique partition guid (uuid) for partition named "rootfs"
57 * on each MMC instance = SD Card or eMMC
58 * allow fixed kernel bootcmd: "rootf=PARTUID=e91c4e10-..."
59 */
60 static const efi_guid_t uuid_mmc[3] = {
61 ROOTFS_MMC0_UUID,
62 ROOTFS_MMC1_UUID,
63 ROOTFS_MMC2_UUID
64 };
65
66 /* FIP type partition UUID used by TF-A*/
67 #define FIP_TYPE_UUID "19D5DF83-11B0-457B-BE2C-7559C13142A5"
68
69 /* unique partition guid (uuid) for FIP partitions A/B */
70 #define FIP_A_UUID \
71 EFI_GUID(0x4FD84C93, 0x54EF, 0x463F, \
72 0xA7, 0xEF, 0xAE, 0x25, 0xFF, 0x88, 0x70, 0x87)
73
74 #define FIP_B_UUID \
75 EFI_GUID(0x09C54952, 0xD5BF, 0x45AF, \
76 0xAC, 0xEE, 0x33, 0x53, 0x03, 0x76, 0x6F, 0xB3)
77
78 static const char * const fip_part_name[] = {
79 "fip-a",
80 "fip-b"
81 };
82
83 static const efi_guid_t fip_part_uuid[] = {
84 FIP_A_UUID,
85 FIP_B_UUID
86 };
87
88 /* order of column in flash layout file */
89 enum stm32prog_col_t {
90 COL_OPTION,
91 COL_ID,
92 COL_NAME,
93 COL_TYPE,
94 COL_IP,
95 COL_OFFSET,
96 COL_NB_STM32
97 };
98
99 #define FIP_TOC_HEADER_NAME 0xAA640001
100
101 struct fip_toc_header {
102 u32 name;
103 u32 serial_number;
104 u64 flags;
105 };
106
107 #define TA_NVMEM_UUID { 0x1a8342cc, 0x81a5, 0x4512, \
108 { 0x99, 0xfe, 0x9e, 0x2b, 0x3e, 0x37, 0xd6, 0x26 } }
109
110 /*
111 * Read NVMEM memory for STM32CubeProgrammer
112 *
113 * [in] value[0].a: Type (0 for OTP access)
114 * [out] memref[1].buffer Output buffer to return all read values
115 * [out] memref[1].size Size of buffer to be read
116 *
117 * Return codes:
118 * TEE_SUCCESS - Invoke command success
119 * TEE_ERROR_BAD_PARAMETERS - Incorrect input param
120 */
121 #define TA_NVMEM_READ 0x0
122
123 /*
124 * Write NVMEM memory for STM32CubeProgrammer
125 *
126 * [in] value[0].a Type (0 for OTP access)
127 * [in] memref[1].buffer Input buffer with the values to write
128 * [in] memref[1].size Size of buffer to be written
129 *
130 * Return codes:
131 * TEE_SUCCESS - Invoke command success
132 * TEE_ERROR_BAD_PARAMETERS - Incorrect input param
133 */
134 #define TA_NVMEM_WRITE 0x1
135
136 /* value of TA_NVMEM type = value[in] a */
137 #define NVMEM_OTP 0
138
139 DECLARE_GLOBAL_DATA_PTR;
140
141 /* OPTEE TA NVMEM open helper */
optee_ta_open(struct stm32prog_data * data)142 static int optee_ta_open(struct stm32prog_data *data)
143 {
144 const struct tee_optee_ta_uuid uuid = TA_NVMEM_UUID;
145 struct tee_open_session_arg arg;
146 struct udevice *tee = NULL;
147 int rc;
148
149 if (data->tee)
150 return 0;
151
152 tee = tee_find_device(NULL, NULL, NULL, NULL);
153 if (!tee)
154 return -ENODEV;
155
156 memset(&arg, 0, sizeof(arg));
157 tee_optee_ta_uuid_to_octets(arg.uuid, &uuid);
158 rc = tee_open_session(tee, &arg, 0, NULL);
159 if (rc < 0)
160 return -ENODEV;
161
162 data->tee = tee;
163 data->tee_session = arg.session;
164
165 return 0;
166 }
167
168 /* OPTEE TA NVMEM invoke helper */
optee_ta_invoke(struct stm32prog_data * data,int cmd,int type,void * buff,ulong size)169 static int optee_ta_invoke(struct stm32prog_data *data, int cmd, int type,
170 void *buff, ulong size)
171 {
172 struct tee_invoke_arg arg;
173 struct tee_param param[2];
174 struct tee_shm *buff_shm;
175 int rc;
176
177 rc = tee_shm_register(data->tee, buff, size, 0, &buff_shm);
178 if (rc)
179 return rc;
180
181 memset(&arg, 0, sizeof(arg));
182 arg.func = cmd;
183 arg.session = data->tee_session;
184
185 memset(param, 0, sizeof(param));
186 param[0].attr = TEE_PARAM_ATTR_TYPE_VALUE_INPUT;
187 param[0].u.value.a = type;
188
189 if (cmd == TA_NVMEM_WRITE)
190 param[1].attr = TEE_PARAM_ATTR_TYPE_MEMREF_INPUT;
191 else
192 param[1].attr = TEE_PARAM_ATTR_TYPE_MEMREF_OUTPUT;
193
194 param[1].u.memref.shm = buff_shm;
195 param[1].u.memref.size = size;
196
197 rc = tee_invoke_func(data->tee, &arg, 2, param);
198 if (rc < 0 || arg.ret != 0) {
199 dev_err(data->tee,
200 "TA_NVMEM invoke failed TEE err: %x, err:%x\n",
201 arg.ret, rc);
202 if (!rc)
203 rc = -EIO;
204 }
205
206 tee_shm_free(buff_shm);
207
208 return rc;
209 }
210
211 /* partition handling routines : CONFIG_CMD_MTDPARTS */
212 int mtdparts_init(void);
213 int find_dev_and_part(const char *id, struct mtd_device **dev,
214 u8 *part_num, struct part_info **part);
215
stm32prog_get_error(struct stm32prog_data * data)216 char *stm32prog_get_error(struct stm32prog_data *data)
217 {
218 static const char error_msg[] = "Unspecified";
219
220 if (strlen(data->error) == 0)
221 strcpy(data->error, error_msg);
222
223 return data->error;
224 }
225
stm32prog_is_fip_header(struct fip_toc_header * header)226 static bool stm32prog_is_fip_header(struct fip_toc_header *header)
227 {
228 return (header->name == FIP_TOC_HEADER_NAME) && header->serial_number;
229 }
230
stm32prog_is_stm32_header_v1(struct stm32_header_v1 * header)231 static bool stm32prog_is_stm32_header_v1(struct stm32_header_v1 *header)
232 {
233 unsigned int i;
234
235 if (header->magic_number !=
236 (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
237 log_debug("%s:invalid magic number : 0x%x\n",
238 __func__, header->magic_number);
239 return false;
240 }
241 if (header->header_version != 0x00010000) {
242 log_debug("%s:invalid header version : 0x%x\n",
243 __func__, header->header_version);
244 return false;
245 }
246
247 if (header->reserved1 || header->reserved2) {
248 log_debug("%s:invalid reserved field\n", __func__);
249 return false;
250 }
251 for (i = 0; i < sizeof(header->padding); i++) {
252 if (header->padding[i] != 0) {
253 log_debug("%s:invalid padding field\n", __func__);
254 return false;
255 }
256 }
257
258 return true;
259 }
260
stm32prog_is_stm32_header_v2(struct stm32_header_v2 * header)261 static bool stm32prog_is_stm32_header_v2(struct stm32_header_v2 *header)
262 {
263 unsigned int i;
264
265 if (header->magic_number !=
266 (('S' << 0) | ('T' << 8) | ('M' << 16) | (0x32 << 24))) {
267 log_debug("%s:invalid magic number : 0x%x\n",
268 __func__, header->magic_number);
269 return false;
270 }
271 if (header->header_version != 0x00020000) {
272 log_debug("%s:invalid header version : 0x%x\n",
273 __func__, header->header_version);
274 return false;
275 }
276 if (header->reserved1 || header->reserved2)
277 return false;
278
279 for (i = 0; i < sizeof(header->padding); i++) {
280 if (header->padding[i] != 0) {
281 log_debug("%s:invalid padding field\n", __func__);
282 return false;
283 }
284 }
285
286 return true;
287 }
288
stm32prog_header_check(uintptr_t raw_header,struct image_header_s * header)289 void stm32prog_header_check(uintptr_t raw_header, struct image_header_s *header)
290 {
291 struct stm32_header_v1 *v1_header = (struct stm32_header_v1 *)raw_header;
292 struct stm32_header_v2 *v2_header = (struct stm32_header_v2 *)raw_header;
293
294 if (!raw_header || !header) {
295 log_debug("%s:no header data\n", __func__);
296 return;
297 }
298
299 if (stm32prog_is_fip_header((struct fip_toc_header *)raw_header)) {
300 header->type = HEADER_FIP;
301 header->length = 0;
302 return;
303 }
304 if (stm32prog_is_stm32_header_v1(v1_header)) {
305 header->type = HEADER_STM32IMAGE;
306 header->image_checksum = le32_to_cpu(v1_header->image_checksum);
307 header->image_length = le32_to_cpu(v1_header->image_length);
308 header->length = sizeof(struct stm32_header_v1);
309 return;
310 }
311 if (stm32prog_is_stm32_header_v2(v2_header)) {
312 header->type = HEADER_STM32IMAGE_V2;
313 header->image_checksum = le32_to_cpu(v2_header->image_checksum);
314 header->image_length = le32_to_cpu(v2_header->image_length);
315 header->length = sizeof(struct stm32_header_v1) +
316 v2_header->extension_headers_length;
317 return;
318 }
319
320 header->type = HEADER_NONE;
321 header->image_checksum = 0x0;
322 header->image_length = 0x0;
323 }
324
stm32prog_header_checksum(uintptr_t addr,struct image_header_s * header)325 static u32 stm32prog_header_checksum(uintptr_t addr, struct image_header_s *header)
326 {
327 u32 i, checksum;
328 u8 *payload;
329
330 /* compute checksum on payload */
331 payload = (u8 *)addr;
332 checksum = 0;
333 for (i = header->image_length; i > 0; i--)
334 checksum += *(payload++);
335
336 return checksum;
337 }
338
339 /* FLASHLAYOUT PARSING *****************************************/
parse_option(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)340 static int parse_option(struct stm32prog_data *data,
341 int i, char *p, struct stm32prog_part_t *part)
342 {
343 int result = 0;
344 char *c = p;
345
346 part->option = 0;
347 if (!strcmp(p, "-"))
348 return 0;
349
350 while (*c) {
351 switch (*c) {
352 case 'P':
353 part->option |= OPT_SELECT;
354 break;
355 case 'E':
356 part->option |= OPT_EMPTY;
357 break;
358 case 'D':
359 part->option |= OPT_DELETE;
360 break;
361 default:
362 result = -EINVAL;
363 stm32prog_err("Layout line %d: invalid option '%c' in %s)",
364 i, *c, p);
365 return -EINVAL;
366 }
367 c++;
368 }
369 if (!(part->option & OPT_SELECT)) {
370 stm32prog_err("Layout line %d: missing 'P' in option %s", i, p);
371 return -EINVAL;
372 }
373
374 return result;
375 }
376
parse_id(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)377 static int parse_id(struct stm32prog_data *data,
378 int i, char *p, struct stm32prog_part_t *part)
379 {
380 int result = 0;
381 unsigned long value;
382
383 result = strict_strtoul(p, 0, &value);
384 part->id = value;
385 if (result || value > PHASE_LAST_USER) {
386 stm32prog_err("Layout line %d: invalid phase value = %s", i, p);
387 result = -EINVAL;
388 }
389
390 return result;
391 }
392
parse_name(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)393 static int parse_name(struct stm32prog_data *data,
394 int i, char *p, struct stm32prog_part_t *part)
395 {
396 int result = 0;
397
398 if (strlen(p) < sizeof(part->name)) {
399 strcpy(part->name, p);
400 } else {
401 stm32prog_err("Layout line %d: partition name too long [%zd]: %s",
402 i, strlen(p), p);
403 result = -EINVAL;
404 }
405
406 return result;
407 }
408
parse_type(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)409 static int parse_type(struct stm32prog_data *data,
410 int i, char *p, struct stm32prog_part_t *part)
411 {
412 int result = 0;
413 int len = 0;
414
415 part->bin_nb = 0;
416 if (!strncmp(p, "Binary", 6)) {
417 part->part_type = PART_BINARY;
418
419 /* search for Binary(X) case */
420 len = strlen(p);
421 part->bin_nb = 1;
422 if (len > 6) {
423 if (len < 8 ||
424 (p[6] != '(') ||
425 (p[len - 1] != ')'))
426 result = -EINVAL;
427 else
428 part->bin_nb =
429 dectoul(&p[7], NULL);
430 }
431 } else if (!strcmp(p, "FIP")) {
432 part->part_type = PART_FIP;
433 } else if (!strcmp(p, "System")) {
434 part->part_type = PART_SYSTEM;
435 } else if (!strcmp(p, "FileSystem")) {
436 part->part_type = PART_FILESYSTEM;
437 } else if (!strcmp(p, "RawImage")) {
438 part->part_type = RAW_IMAGE;
439 } else {
440 result = -EINVAL;
441 }
442 if (result)
443 stm32prog_err("Layout line %d: type parsing error : '%s'",
444 i, p);
445
446 return result;
447 }
448
parse_ip(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)449 static int parse_ip(struct stm32prog_data *data,
450 int i, char *p, struct stm32prog_part_t *part)
451 {
452 int result = 0;
453 unsigned int len = 0;
454
455 part->dev_id = 0;
456 if (!strcmp(p, "none")) {
457 part->target = STM32PROG_NONE;
458 } else if (!strncmp(p, "mmc", 3)) {
459 part->target = STM32PROG_MMC;
460 len = 3;
461 } else if (!strncmp(p, "nor", 3)) {
462 part->target = STM32PROG_NOR;
463 len = 3;
464 } else if (!strncmp(p, "nand", 4)) {
465 part->target = STM32PROG_NAND;
466 len = 4;
467 } else if (!strncmp(p, "spi-nand", 8)) {
468 part->target = STM32PROG_SPI_NAND;
469 len = 8;
470 } else if (!strncmp(p, "ram", 3)) {
471 part->target = STM32PROG_RAM;
472 len = 0;
473 } else {
474 result = -EINVAL;
475 }
476 if (len) {
477 /* only one digit allowed for device id */
478 if (strlen(p) != len + 1) {
479 result = -EINVAL;
480 } else {
481 part->dev_id = p[len] - '0';
482 if (part->dev_id > 9)
483 result = -EINVAL;
484 }
485 }
486 if (result)
487 stm32prog_err("Layout line %d: ip parsing error: '%s'", i, p);
488
489 return result;
490 }
491
parse_offset(struct stm32prog_data * data,int i,char * p,struct stm32prog_part_t * part)492 static int parse_offset(struct stm32prog_data *data,
493 int i, char *p, struct stm32prog_part_t *part)
494 {
495 int result = 0;
496 char *tail;
497
498 part->part_id = 0;
499 part->addr = 0;
500 part->size = 0;
501 /* eMMC boot parttion */
502 if (!strncmp(p, "boot", 4)) {
503 if (strlen(p) != 5) {
504 result = -EINVAL;
505 } else {
506 if (p[4] == '1')
507 part->part_id = -1;
508 else if (p[4] == '2')
509 part->part_id = -2;
510 else
511 result = -EINVAL;
512 }
513 if (result)
514 stm32prog_err("Layout line %d: invalid part '%s'",
515 i, p);
516 } else {
517 part->addr = simple_strtoull(p, &tail, 0);
518 if (tail == p || *tail != '\0') {
519 stm32prog_err("Layout line %d: invalid offset '%s'",
520 i, p);
521 result = -EINVAL;
522 }
523 }
524
525 return result;
526 }
527
528 static
529 int (* const parse[COL_NB_STM32])(struct stm32prog_data *data, int i, char *p,
530 struct stm32prog_part_t *part) = {
531 [COL_OPTION] = parse_option,
532 [COL_ID] = parse_id,
533 [COL_NAME] = parse_name,
534 [COL_TYPE] = parse_type,
535 [COL_IP] = parse_ip,
536 [COL_OFFSET] = parse_offset,
537 };
538
parse_flash_layout(struct stm32prog_data * data,uintptr_t addr,ulong size)539 static int parse_flash_layout(struct stm32prog_data *data,
540 uintptr_t addr,
541 ulong size)
542 {
543 int column = 0, part_nb = 0, ret;
544 bool end_of_line, eof;
545 char *p, *start, *last, *col;
546 struct stm32prog_part_t *part;
547 struct image_header_s header;
548 int part_list_size;
549 int i;
550
551 data->part_nb = 0;
552
553 /* check if STM32image is detected */
554 stm32prog_header_check(addr, &header);
555 if (header.type == HEADER_STM32IMAGE) {
556 u32 checksum;
557
558 addr = addr + header.length;
559 size = header.image_length;
560
561 checksum = stm32prog_header_checksum(addr, &header);
562 if (checksum != header.image_checksum) {
563 stm32prog_err("Layout: invalid checksum : 0x%x expected 0x%x",
564 checksum, header.image_checksum);
565 return -EIO;
566 }
567 }
568 if (!size)
569 return -EINVAL;
570
571 start = (char *)addr;
572 last = start + size;
573
574 *last = 0x0; /* force null terminated string */
575 log_debug("flash layout =\n%s\n", start);
576
577 /* calculate expected number of partitions */
578 part_list_size = 1;
579 p = start;
580 while (*p && (p < last)) {
581 if (*p++ == '\n') {
582 part_list_size++;
583 if (p < last && *p == '#')
584 part_list_size--;
585 }
586 }
587 if (part_list_size > PHASE_LAST_USER) {
588 stm32prog_err("Layout: too many partition (%d)",
589 part_list_size);
590 return -1;
591 }
592 part = calloc(sizeof(struct stm32prog_part_t), part_list_size);
593 if (!part) {
594 stm32prog_err("Layout: alloc failed");
595 return -ENOMEM;
596 }
597 data->part_array = part;
598
599 /* main parsing loop */
600 i = 1;
601 eof = false;
602 p = start;
603 col = start; /* 1st column */
604 end_of_line = false;
605 while (!eof) {
606 switch (*p) {
607 /* CR is ignored and replaced by NULL character */
608 case '\r':
609 *p = '\0';
610 p++;
611 continue;
612 case '\0':
613 end_of_line = true;
614 eof = true;
615 break;
616 case '\n':
617 end_of_line = true;
618 break;
619 case '\t':
620 break;
621 case '#':
622 /* comment line is skipped */
623 if (column == 0 && p == col) {
624 while ((p < last) && *p)
625 if (*p++ == '\n')
626 break;
627 col = p;
628 i++;
629 if (p >= last || !*p) {
630 eof = true;
631 end_of_line = true;
632 }
633 continue;
634 }
635 /* fall through */
636 /* by default continue with the next character */
637 default:
638 p++;
639 continue;
640 }
641
642 /* replace by \0: allow string parsing for each column */
643 *p = '\0';
644 p++;
645 if (p >= last) {
646 eof = true;
647 end_of_line = true;
648 }
649
650 /* skip empty line and multiple TAB in tsv file */
651 if (strlen(col) == 0) {
652 col = p;
653 /* skip empty line */
654 if (column == 0 && end_of_line) {
655 end_of_line = false;
656 i++;
657 }
658 continue;
659 }
660
661 if (column < COL_NB_STM32) {
662 ret = parse[column](data, i, col, part);
663 if (ret)
664 return ret;
665 }
666
667 /* save the beginning of the next column */
668 column++;
669 col = p;
670
671 if (!end_of_line)
672 continue;
673
674 /* end of the line detected */
675 end_of_line = false;
676
677 if (column < COL_NB_STM32) {
678 stm32prog_err("Layout line %d: no enought column", i);
679 return -EINVAL;
680 }
681 column = 0;
682 part_nb++;
683 part++;
684 i++;
685 if (part_nb >= part_list_size) {
686 part = NULL;
687 if (!eof) {
688 stm32prog_err("Layout: no enought memory for %d part",
689 part_nb);
690 return -EINVAL;
691 }
692 }
693 }
694 data->part_nb = part_nb;
695 if (data->part_nb == 0) {
696 stm32prog_err("Layout: no partition found");
697 return -ENODEV;
698 }
699
700 return 0;
701 }
702
part_cmp(void * priv,struct list_head * a,struct list_head * b)703 static int __init part_cmp(void *priv, struct list_head *a, struct list_head *b)
704 {
705 struct stm32prog_part_t *parta, *partb;
706
707 parta = container_of(a, struct stm32prog_part_t, list);
708 partb = container_of(b, struct stm32prog_part_t, list);
709
710 if (parta->part_id != partb->part_id)
711 return parta->part_id - partb->part_id;
712 else
713 return parta->addr > partb->addr ? 1 : -1;
714 }
715
get_mtd_by_target(char * string,enum stm32prog_target target,int dev_id)716 static void get_mtd_by_target(char *string, enum stm32prog_target target,
717 int dev_id)
718 {
719 const char *dev_str;
720
721 switch (target) {
722 case STM32PROG_NOR:
723 dev_str = "nor";
724 break;
725 case STM32PROG_NAND:
726 dev_str = "nand";
727 break;
728 case STM32PROG_SPI_NAND:
729 dev_str = "spi-nand";
730 break;
731 default:
732 dev_str = "invalid";
733 break;
734 }
735 sprintf(string, "%s%d", dev_str, dev_id);
736 }
737
init_device(struct stm32prog_data * data,struct stm32prog_dev_t * dev)738 static int init_device(struct stm32prog_data *data,
739 struct stm32prog_dev_t *dev)
740 {
741 struct mmc *mmc = NULL;
742 struct blk_desc *block_dev = NULL;
743 struct mtd_info *mtd = NULL;
744 char mtd_id[16];
745 int part_id;
746 int ret;
747 u64 first_addr = 0, last_addr = 0;
748 struct stm32prog_part_t *part, *next_part;
749 u64 part_addr, part_size;
750 bool part_found;
751 const char *part_name;
752
753 switch (dev->target) {
754 case STM32PROG_MMC:
755 if (!IS_ENABLED(CONFIG_MMC)) {
756 stm32prog_err("unknown device type = %d", dev->target);
757 return -ENODEV;
758 }
759 mmc = find_mmc_device(dev->dev_id);
760 if (!mmc || mmc_init(mmc)) {
761 stm32prog_err("mmc device %d not found", dev->dev_id);
762 return -ENODEV;
763 }
764 block_dev = mmc_get_blk_desc(mmc);
765 if (!block_dev) {
766 stm32prog_err("mmc device %d not probed", dev->dev_id);
767 return -ENODEV;
768 }
769 dev->erase_size = mmc->erase_grp_size * block_dev->blksz;
770 dev->mmc = mmc;
771
772 /* reserve a full erase group for each GTP headers */
773 if (mmc->erase_grp_size > GPT_HEADER_SZ) {
774 first_addr = dev->erase_size;
775 last_addr = (u64)(block_dev->lba -
776 mmc->erase_grp_size) *
777 block_dev->blksz;
778 } else {
779 first_addr = (u64)GPT_HEADER_SZ * block_dev->blksz;
780 last_addr = (u64)(block_dev->lba - GPT_HEADER_SZ - 1) *
781 block_dev->blksz;
782 }
783 log_debug("MMC %d: lba=%ld blksz=%ld\n", dev->dev_id,
784 block_dev->lba, block_dev->blksz);
785 log_debug(" available address = 0x%llx..0x%llx\n",
786 first_addr, last_addr);
787 log_debug(" full_update = %d\n", dev->full_update);
788 break;
789 case STM32PROG_NOR:
790 case STM32PROG_NAND:
791 case STM32PROG_SPI_NAND:
792 if (!IS_ENABLED(CONFIG_MTD)) {
793 stm32prog_err("unknown device type = %d", dev->target);
794 return -ENODEV;
795 }
796 get_mtd_by_target(mtd_id, dev->target, dev->dev_id);
797 log_debug("%s\n", mtd_id);
798
799 mtdparts_init();
800 mtd = get_mtd_device_nm(mtd_id);
801 if (IS_ERR(mtd)) {
802 stm32prog_err("MTD device %s not found", mtd_id);
803 return -ENODEV;
804 }
805 first_addr = 0;
806 last_addr = mtd->size;
807 dev->erase_size = mtd->erasesize;
808 log_debug("MTD device %s: size=%lld erasesize=%d\n",
809 mtd_id, mtd->size, mtd->erasesize);
810 log_debug(" available address = 0x%llx..0x%llx\n",
811 first_addr, last_addr);
812 dev->mtd = mtd;
813 break;
814 case STM32PROG_RAM:
815 first_addr = gd->bd->bi_dram[0].start;
816 last_addr = first_addr + gd->bd->bi_dram[0].size;
817 dev->erase_size = 1;
818 break;
819 default:
820 stm32prog_err("unknown device type = %d", dev->target);
821 return -ENODEV;
822 }
823 log_debug(" erase size = 0x%x\n", dev->erase_size);
824 log_debug(" full_update = %d\n", dev->full_update);
825
826 /* order partition list in offset order */
827 list_sort(NULL, &dev->part_list, &part_cmp);
828 part_id = 1;
829 log_debug("id : Opt Phase Name target.n dev.n addr size part_off part_size\n");
830 list_for_each_entry(part, &dev->part_list, list) {
831 if (part->bin_nb > 1) {
832 if ((dev->target != STM32PROG_NAND &&
833 dev->target != STM32PROG_SPI_NAND) ||
834 part->id >= PHASE_FIRST_USER ||
835 strncmp(part->name, "fsbl", 4)) {
836 stm32prog_err("%s (0x%x): multiple binary %d not supported",
837 part->name, part->id,
838 part->bin_nb);
839 return -EINVAL;
840 }
841 }
842 if (part->part_type == RAW_IMAGE) {
843 part->part_id = 0x0;
844 part->addr = 0x0;
845 if (block_dev)
846 part->size = block_dev->lba * block_dev->blksz;
847 else
848 part->size = last_addr;
849 log_debug("-- : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx\n",
850 part->option, part->id, part->name,
851 part->part_type, part->bin_nb, part->target,
852 part->dev_id, part->addr, part->size);
853 continue;
854 }
855 if (part->part_id < 0) { /* boot hw partition for eMMC */
856 if (mmc) {
857 part->size = mmc->capacity_boot;
858 } else {
859 stm32prog_err("%s (0x%x): hw partition not expected : %d",
860 part->name, part->id,
861 part->part_id);
862 return -ENODEV;
863 }
864 } else {
865 part->part_id = part_id++;
866
867 /* last partition : size to the end of the device */
868 if (part->list.next != &dev->part_list) {
869 next_part =
870 container_of(part->list.next,
871 struct stm32prog_part_t,
872 list);
873 if (part->addr < next_part->addr) {
874 part->size = next_part->addr -
875 part->addr;
876 } else {
877 stm32prog_err("%s (0x%x): same address : 0x%llx == %s (0x%x): 0x%llx",
878 part->name, part->id,
879 part->addr,
880 next_part->name,
881 next_part->id,
882 next_part->addr);
883 return -EINVAL;
884 }
885 } else {
886 if (part->addr <= last_addr) {
887 part->size = last_addr - part->addr;
888 } else {
889 stm32prog_err("%s (0x%x): invalid address 0x%llx (max=0x%llx)",
890 part->name, part->id,
891 part->addr, last_addr);
892 return -EINVAL;
893 }
894 }
895 if (part->addr < first_addr) {
896 stm32prog_err("%s (0x%x): invalid address 0x%llx (min=0x%llx)",
897 part->name, part->id,
898 part->addr, first_addr);
899 return -EINVAL;
900 }
901 }
902 if ((part->addr & ((u64)part->dev->erase_size - 1)) != 0) {
903 stm32prog_err("%s (0x%x): not aligned address : 0x%llx on erase size 0x%x",
904 part->name, part->id, part->addr,
905 part->dev->erase_size);
906 return -EINVAL;
907 }
908 log_debug("%02d : %1d %02x %14s %02d.%d %02d.%02d %08llx %08llx",
909 part->part_id, part->option, part->id, part->name,
910 part->part_type, part->bin_nb, part->target,
911 part->dev_id, part->addr, part->size);
912
913 part_addr = 0;
914 part_size = 0;
915 part_found = false;
916
917 /* check coherency with existing partition */
918 if (block_dev) {
919 /*
920 * block devices with GPT: check user partition size
921 * only for partial update, the GPT partions are be
922 * created for full update
923 */
924 if (dev->full_update || part->part_id < 0) {
925 log_debug("\n");
926 continue;
927 }
928 struct disk_partition partinfo;
929
930 ret = part_get_info(block_dev, part->part_id,
931 &partinfo);
932
933 if (ret) {
934 stm32prog_err("%s (0x%x):Couldn't find part %d on device mmc %d",
935 part->name, part->id,
936 part_id, part->dev_id);
937 return -ENODEV;
938 }
939 part_addr = (u64)partinfo.start * partinfo.blksz;
940 part_size = (u64)partinfo.size * partinfo.blksz;
941 part_name = (char *)partinfo.name;
942 part_found = true;
943 }
944
945 if (IS_ENABLED(CONFIG_MTD) && mtd) {
946 char mtd_part_id[32];
947 struct part_info *mtd_part;
948 struct mtd_device *mtd_dev;
949 u8 part_num;
950
951 sprintf(mtd_part_id, "%s,%d", mtd_id,
952 part->part_id - 1);
953 ret = find_dev_and_part(mtd_part_id, &mtd_dev,
954 &part_num, &mtd_part);
955 if (ret != 0) {
956 stm32prog_err("%s (0x%x): Invalid MTD partition %s",
957 part->name, part->id,
958 mtd_part_id);
959 return -ENODEV;
960 }
961 part_addr = mtd_part->offset;
962 part_size = mtd_part->size;
963 part_name = mtd_part->name;
964 part_found = true;
965 }
966
967 /* no partition for this device */
968 if (!part_found) {
969 log_debug("\n");
970 continue;
971 }
972
973 log_debug(" %08llx %08llx\n", part_addr, part_size);
974
975 if (part->addr != part_addr) {
976 stm32prog_err("%s (0x%x): Bad address for partition %d (%s) = 0x%llx <> 0x%llx expected",
977 part->name, part->id, part->part_id,
978 part_name, part->addr, part_addr);
979 return -ENODEV;
980 }
981 if (part->size != part_size) {
982 stm32prog_err("%s (0x%x): Bad size for partition %d (%s) at 0x%llx = 0x%llx <> 0x%llx expected",
983 part->name, part->id, part->part_id,
984 part_name, part->addr, part->size,
985 part_size);
986 return -ENODEV;
987 }
988 }
989 return 0;
990 }
991
treat_partition_list(struct stm32prog_data * data)992 static int treat_partition_list(struct stm32prog_data *data)
993 {
994 int i, j;
995 struct stm32prog_part_t *part;
996
997 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
998 data->dev[j].target = STM32PROG_NONE;
999 INIT_LIST_HEAD(&data->dev[j].part_list);
1000 }
1001
1002 #ifdef CONFIG_STM32MP15x_STM32IMAGE
1003 data->tee_detected = false;
1004 #endif
1005 data->fsbl_nor_detected = false;
1006 for (i = 0; i < data->part_nb; i++) {
1007 part = &data->part_array[i];
1008 part->alt_id = -1;
1009
1010 /* skip partition with IP="none" */
1011 if (part->target == STM32PROG_NONE) {
1012 if (IS_SELECT(part)) {
1013 stm32prog_err("Layout: selected none phase = 0x%x for part %s",
1014 part->id, part->name);
1015 return -EINVAL;
1016 }
1017 continue;
1018 }
1019
1020 if (part->id == PHASE_FLASHLAYOUT ||
1021 part->id > PHASE_LAST_USER) {
1022 stm32prog_err("Layout: invalid phase = 0x%x for part %s",
1023 part->id, part->name);
1024 return -EINVAL;
1025 }
1026 for (j = i + 1; j < data->part_nb; j++) {
1027 if (part->id == data->part_array[j].id) {
1028 stm32prog_err("Layout: duplicated phase 0x%x for part %s and %s",
1029 part->id, part->name, data->part_array[j].name);
1030 return -EINVAL;
1031 }
1032 }
1033 for (j = 0; j < STM32PROG_MAX_DEV; j++) {
1034 if (data->dev[j].target == STM32PROG_NONE) {
1035 /* new device found */
1036 data->dev[j].target = part->target;
1037 data->dev[j].dev_id = part->dev_id;
1038 data->dev[j].full_update = true;
1039 data->dev_nb++;
1040 break;
1041 } else if ((part->target == data->dev[j].target) &&
1042 (part->dev_id == data->dev[j].dev_id)) {
1043 break;
1044 }
1045 }
1046 if (j == STM32PROG_MAX_DEV) {
1047 stm32prog_err("Layout: too many device");
1048 return -EINVAL;
1049 }
1050 switch (part->target) {
1051 case STM32PROG_NOR:
1052 if (!data->fsbl_nor_detected &&
1053 !strncmp(part->name, "fsbl", 4))
1054 data->fsbl_nor_detected = true;
1055 /* fallthrough */
1056 case STM32PROG_NAND:
1057 case STM32PROG_SPI_NAND:
1058 #ifdef CONFIG_STM32MP15x_STM32IMAGE
1059 if (!data->tee_detected &&
1060 !strncmp(part->name, "tee", 3))
1061 data->tee_detected = true;
1062 break;
1063 #endif
1064 default:
1065 break;
1066 }
1067 part->dev = &data->dev[j];
1068 if (!IS_SELECT(part))
1069 part->dev->full_update = false;
1070 list_add_tail(&part->list, &data->dev[j].part_list);
1071 }
1072
1073 return 0;
1074 }
1075
create_gpt_partitions(struct stm32prog_data * data)1076 static int create_gpt_partitions(struct stm32prog_data *data)
1077 {
1078 int offset = 0;
1079 const int buflen = SZ_8K;
1080 char *buf;
1081 char uuid[UUID_STR_LEN + 1];
1082 unsigned char *uuid_bin;
1083 unsigned int mmc_id;
1084 int i, j;
1085 bool rootfs_found;
1086 struct stm32prog_part_t *part;
1087 const char *type_str;
1088
1089 buf = malloc(buflen);
1090 if (!buf)
1091 return -ENOMEM;
1092
1093 /* initialize the selected device */
1094 for (i = 0; i < data->dev_nb; i++) {
1095 /* create gpt partition support only for full update on MMC */
1096 if (data->dev[i].target != STM32PROG_MMC ||
1097 !data->dev[i].full_update)
1098 continue;
1099
1100 printf("partitions on mmc%d: ", data->dev[i].dev_id);
1101 offset = 0;
1102 rootfs_found = false;
1103 memset(buf, 0, buflen);
1104
1105 list_for_each_entry(part, &data->dev[i].part_list, list) {
1106 /* skip eMMC boot partitions */
1107 if (part->part_id < 0)
1108 continue;
1109 /* skip Raw Image */
1110 if (part->part_type == RAW_IMAGE)
1111 continue;
1112
1113 if (offset + 100 > buflen) {
1114 log_debug("\n%s: buffer too small, %s skippped",
1115 __func__, part->name);
1116 continue;
1117 }
1118
1119 if (!offset)
1120 offset += sprintf(buf, "gpt write mmc %d \"",
1121 data->dev[i].dev_id);
1122
1123 offset += snprintf(buf + offset, buflen - offset,
1124 "name=%s,start=0x%llx,size=0x%llx",
1125 part->name,
1126 part->addr,
1127 part->size);
1128
1129 switch (part->part_type) {
1130 case PART_BINARY:
1131 type_str = LINUX_RESERVED_UUID;
1132 break;
1133 case PART_FIP:
1134 type_str = FIP_TYPE_UUID;
1135 break;
1136 default:
1137 type_str = "linux";
1138 break;
1139 }
1140 offset += snprintf(buf + offset,
1141 buflen - offset,
1142 ",type=%s", type_str);
1143
1144 if (part->part_type == PART_SYSTEM)
1145 offset += snprintf(buf + offset,
1146 buflen - offset,
1147 ",bootable");
1148
1149 /* partition UUID */
1150 uuid_bin = NULL;
1151 if (!rootfs_found && !strcmp(part->name, "rootfs")) {
1152 mmc_id = part->dev_id;
1153 rootfs_found = true;
1154 if (mmc_id < ARRAY_SIZE(uuid_mmc))
1155 uuid_bin = (unsigned char *)uuid_mmc[mmc_id].b;
1156 }
1157 if (part->part_type == PART_FIP) {
1158 for (j = 0; j < ARRAY_SIZE(fip_part_name); j++)
1159 if (!strcmp(part->name, fip_part_name[j])) {
1160 uuid_bin = (unsigned char *)fip_part_uuid[j].b;
1161 break;
1162 }
1163 }
1164 if (uuid_bin) {
1165 uuid_bin_to_str(uuid_bin, uuid, UUID_STR_FORMAT_GUID);
1166 offset += snprintf(buf + offset,
1167 buflen - offset,
1168 ",uuid=%s", uuid);
1169 }
1170
1171 offset += snprintf(buf + offset, buflen - offset, ";");
1172 }
1173
1174 if (offset) {
1175 offset += snprintf(buf + offset, buflen - offset, "\"");
1176 log_debug("\ncmd: %s\n", buf);
1177 if (run_command(buf, 0)) {
1178 stm32prog_err("GPT partitionning fail: %s",
1179 buf);
1180 free(buf);
1181
1182 return -1;
1183 }
1184 }
1185
1186 if (data->dev[i].mmc)
1187 part_init(mmc_get_blk_desc(data->dev[i].mmc));
1188
1189 #ifdef DEBUG
1190 sprintf(buf, "gpt verify mmc %d", data->dev[i].dev_id);
1191 log_debug("\ncmd: %s", buf);
1192 if (run_command(buf, 0))
1193 printf("fail !\n");
1194 else
1195 printf("OK\n");
1196
1197 sprintf(buf, "part list mmc %d", data->dev[i].dev_id);
1198 run_command(buf, 0);
1199 #endif
1200 puts("done\n");
1201 }
1202
1203 #ifdef DEBUG
1204 run_command("mtd list", 0);
1205 #endif
1206 free(buf);
1207
1208 return 0;
1209 }
1210
stm32prog_alt_add(struct stm32prog_data * data,struct dfu_entity * dfu,struct stm32prog_part_t * part)1211 static int stm32prog_alt_add(struct stm32prog_data *data,
1212 struct dfu_entity *dfu,
1213 struct stm32prog_part_t *part)
1214 {
1215 int ret = 0;
1216 int offset = 0;
1217 char devstr[10];
1218 char dfustr[10];
1219 char buf[ALT_BUF_LEN];
1220 u32 size;
1221 char multiplier, type;
1222
1223 /* max 3 digit for sector size */
1224 if (part->size > SZ_1M) {
1225 size = (u32)(part->size / SZ_1M);
1226 multiplier = 'M';
1227 } else if (part->size > SZ_1K) {
1228 size = (u32)(part->size / SZ_1K);
1229 multiplier = 'K';
1230 } else {
1231 size = (u32)part->size;
1232 multiplier = 'B';
1233 }
1234 if (IS_SELECT(part) && !IS_EMPTY(part))
1235 type = 'e'; /*Readable and Writeable*/
1236 else
1237 type = 'a';/*Readable*/
1238
1239 memset(buf, 0, sizeof(buf));
1240 offset = snprintf(buf, ALT_BUF_LEN - offset,
1241 "@%s/0x%02x/1*%d%c%c ",
1242 part->name, part->id,
1243 size, multiplier, type);
1244
1245 if (part->target == STM32PROG_RAM) {
1246 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1247 "ram 0x%llx 0x%llx",
1248 part->addr, part->size);
1249 } else if (part->part_type == RAW_IMAGE) {
1250 u64 dfu_size;
1251
1252 if (part->dev->target == STM32PROG_MMC)
1253 dfu_size = part->size / part->dev->mmc->read_bl_len;
1254 else
1255 dfu_size = part->size;
1256 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1257 "raw 0x0 0x%llx", dfu_size);
1258 } else if (part->part_id < 0) {
1259 u64 nb_blk = part->size / part->dev->mmc->read_bl_len;
1260
1261 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1262 "raw 0x%llx 0x%llx",
1263 part->addr, nb_blk);
1264 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1265 " mmcpart %d", -(part->part_id));
1266 } else {
1267 if (part->part_type == PART_SYSTEM &&
1268 (part->target == STM32PROG_NAND ||
1269 part->target == STM32PROG_NOR ||
1270 part->target == STM32PROG_SPI_NAND))
1271 offset += snprintf(buf + offset,
1272 ALT_BUF_LEN - offset,
1273 "partubi");
1274 else
1275 offset += snprintf(buf + offset,
1276 ALT_BUF_LEN - offset,
1277 "part");
1278 /* dev_id requested by DFU MMC */
1279 if (part->target == STM32PROG_MMC)
1280 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1281 " %d", part->dev_id);
1282 offset += snprintf(buf + offset, ALT_BUF_LEN - offset,
1283 " %d", part->part_id);
1284 }
1285 ret = -ENODEV;
1286 switch (part->target) {
1287 case STM32PROG_MMC:
1288 if (IS_ENABLED(CONFIG_MMC)) {
1289 ret = 0;
1290 sprintf(dfustr, "mmc");
1291 sprintf(devstr, "%d", part->dev_id);
1292 }
1293 break;
1294 case STM32PROG_NAND:
1295 case STM32PROG_NOR:
1296 case STM32PROG_SPI_NAND:
1297 if (IS_ENABLED(CONFIG_MTD)) {
1298 ret = 0;
1299 sprintf(dfustr, "mtd");
1300 get_mtd_by_target(devstr, part->target, part->dev_id);
1301 }
1302 break;
1303 case STM32PROG_RAM:
1304 ret = 0;
1305 sprintf(dfustr, "ram");
1306 sprintf(devstr, "0");
1307 break;
1308 default:
1309 break;
1310 }
1311 if (ret) {
1312 stm32prog_err("invalid target: %d", part->target);
1313 return ret;
1314 }
1315 log_debug("dfu_alt_add(%s,%s,%s)\n", dfustr, devstr, buf);
1316 ret = dfu_alt_add(dfu, dfustr, devstr, buf);
1317 log_debug("dfu_alt_add(%s,%s,%s) result %d\n",
1318 dfustr, devstr, buf, ret);
1319
1320 return ret;
1321 }
1322
stm32prog_alt_add_virt(struct dfu_entity * dfu,char * name,int phase,int size)1323 static int stm32prog_alt_add_virt(struct dfu_entity *dfu,
1324 char *name, int phase, int size)
1325 {
1326 int ret = 0;
1327 char devstr[4];
1328 char buf[ALT_BUF_LEN];
1329
1330 sprintf(devstr, "%d", phase);
1331 sprintf(buf, "@%s/0x%02x/1*%dBe", name, phase, size);
1332 ret = dfu_alt_add(dfu, "virt", devstr, buf);
1333 log_debug("dfu_alt_add(virt,%s,%s) result %d\n", devstr, buf, ret);
1334
1335 return ret;
1336 }
1337
dfu_init_entities(struct stm32prog_data * data)1338 static int dfu_init_entities(struct stm32prog_data *data)
1339 {
1340 int ret = 0;
1341 int phase, i, alt_id;
1342 struct stm32prog_part_t *part;
1343 struct dfu_entity *dfu;
1344 int alt_nb;
1345 u32 otp_size = 0;
1346
1347 alt_nb = 1; /* number of virtual = CMD*/
1348
1349 if (IS_ENABLED(CONFIG_CMD_STM32PROG_OTP)) {
1350 /* OTP_SIZE_SMC = 0 if SMC is not supported */
1351 otp_size = OTP_SIZE_SMC;
1352 /* check if PTA BSEC is supported */
1353 ret = optee_ta_open(data);
1354 log_debug("optee_ta_open(PTA_NVMEM) result %d\n", ret);
1355 if (!ret && data->tee)
1356 otp_size = OTP_SIZE_TA;
1357 if (otp_size)
1358 alt_nb++; /* OTP*/
1359 }
1360
1361 if (CONFIG_IS_ENABLED(DM_PMIC))
1362 alt_nb++; /* PMIC NVMEM*/
1363
1364 if (data->part_nb == 0)
1365 alt_nb++; /* +1 for FlashLayout */
1366 else
1367 for (i = 0; i < data->part_nb; i++) {
1368 if (data->part_array[i].target != STM32PROG_NONE)
1369 alt_nb++;
1370 }
1371
1372 if (dfu_alt_init(alt_nb, &dfu))
1373 return -ENODEV;
1374
1375 puts("DFU alt info setting: ");
1376 if (data->part_nb) {
1377 alt_id = 0;
1378 ret = 0;
1379 for (phase = 1;
1380 (phase <= PHASE_LAST_USER) &&
1381 (alt_id < alt_nb) && !ret;
1382 phase++) {
1383 /* ordering alt setting by phase id */
1384 part = NULL;
1385 for (i = 0; i < data->part_nb; i++) {
1386 if (phase == data->part_array[i].id) {
1387 part = &data->part_array[i];
1388 break;
1389 }
1390 }
1391 if (!part)
1392 continue;
1393 if (part->target == STM32PROG_NONE)
1394 continue;
1395 part->alt_id = alt_id;
1396 alt_id++;
1397
1398 ret = stm32prog_alt_add(data, dfu, part);
1399 }
1400 } else {
1401 char buf[ALT_BUF_LEN];
1402
1403 sprintf(buf, "@FlashLayout/0x%02x/1*256Ke ram %x 40000",
1404 PHASE_FLASHLAYOUT, CONFIG_SYS_LOAD_ADDR);
1405 ret = dfu_alt_add(dfu, "ram", NULL, buf);
1406 log_debug("dfu_alt_add(ram, NULL,%s) result %d\n", buf, ret);
1407 }
1408
1409 if (!ret)
1410 ret = stm32prog_alt_add_virt(dfu, "virtual", PHASE_CMD, CMD_SIZE);
1411
1412 if (!ret && IS_ENABLED(CONFIG_CMD_STM32PROG_OTP) && otp_size)
1413 ret = stm32prog_alt_add_virt(dfu, "OTP", PHASE_OTP, otp_size);
1414
1415 if (!ret && CONFIG_IS_ENABLED(DM_PMIC))
1416 ret = stm32prog_alt_add_virt(dfu, "PMIC", PHASE_PMIC, PMIC_SIZE);
1417
1418 if (ret)
1419 stm32prog_err("dfu init failed: %d", ret);
1420 puts("done\n");
1421
1422 #ifdef DEBUG
1423 dfu_show_entities();
1424 #endif
1425 return ret;
1426 }
1427
stm32prog_otp_write(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1428 int stm32prog_otp_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1429 long *size)
1430 {
1431 u32 otp_size = data->tee ? OTP_SIZE_TA : OTP_SIZE_SMC;
1432 log_debug("%s: %x %lx\n", __func__, offset, *size);
1433
1434 if (!IS_ENABLED(CONFIG_CMD_STM32PROG_OTP)) {
1435 stm32prog_err("OTP update not supported");
1436
1437 return -EOPNOTSUPP;
1438 }
1439
1440 if (!data->otp_part) {
1441 data->otp_part = memalign(CONFIG_SYS_CACHELINE_SIZE, otp_size);
1442 if (!data->otp_part)
1443 return -ENOMEM;
1444 }
1445
1446 if (!offset)
1447 memset(data->otp_part, 0, otp_size);
1448
1449 if (offset + *size > otp_size)
1450 *size = otp_size - offset;
1451
1452 memcpy((void *)((uintptr_t)data->otp_part + offset), buffer, *size);
1453
1454 return 0;
1455 }
1456
stm32prog_otp_read(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1457 int stm32prog_otp_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1458 long *size)
1459 {
1460 u32 otp_size = data->tee ? OTP_SIZE_TA : OTP_SIZE_SMC;
1461 int result = 0;
1462
1463 if (!IS_ENABLED(CONFIG_CMD_STM32PROG_OTP)) {
1464 stm32prog_err("OTP update not supported");
1465
1466 return -EOPNOTSUPP;
1467 }
1468
1469 log_debug("%s: %x %lx\n", __func__, offset, *size);
1470 /* alway read for first packet */
1471 if (!offset) {
1472 if (!data->otp_part)
1473 data->otp_part =
1474 memalign(CONFIG_SYS_CACHELINE_SIZE, otp_size);
1475
1476 if (!data->otp_part) {
1477 result = -ENOMEM;
1478 goto end_otp_read;
1479 }
1480
1481 /* init struct with 0 */
1482 memset(data->otp_part, 0, otp_size);
1483
1484 /* call the service */
1485 result = -EOPNOTSUPP;
1486 if (data->tee && CONFIG_IS_ENABLED(OPTEE))
1487 result = optee_ta_invoke(data, TA_NVMEM_READ, NVMEM_OTP,
1488 data->otp_part, OTP_SIZE_TA);
1489 else if (IS_ENABLED(CONFIG_ARM_SMCCC))
1490 result = stm32_smc_exec(STM32_SMC_BSEC, STM32_SMC_READ_ALL,
1491 (unsigned long)data->otp_part, 0);
1492 if (result)
1493 goto end_otp_read;
1494 }
1495
1496 if (!data->otp_part) {
1497 result = -ENOMEM;
1498 goto end_otp_read;
1499 }
1500
1501 if (offset + *size > otp_size)
1502 *size = otp_size - offset;
1503 memcpy(buffer, (void *)((uintptr_t)data->otp_part + offset), *size);
1504
1505 end_otp_read:
1506 log_debug("%s: result %i\n", __func__, result);
1507
1508 return result;
1509 }
1510
stm32prog_otp_start(struct stm32prog_data * data)1511 int stm32prog_otp_start(struct stm32prog_data *data)
1512 {
1513 int result = 0;
1514 struct arm_smccc_res res;
1515
1516 if (!IS_ENABLED(CONFIG_CMD_STM32PROG_OTP)) {
1517 stm32prog_err("OTP update not supported");
1518
1519 return -EOPNOTSUPP;
1520 }
1521
1522 if (!data->otp_part) {
1523 stm32prog_err("start OTP without data");
1524 return -1;
1525 }
1526
1527 result = -EOPNOTSUPP;
1528 if (data->tee && CONFIG_IS_ENABLED(OPTEE)) {
1529 result = optee_ta_invoke(data, TA_NVMEM_WRITE, NVMEM_OTP,
1530 data->otp_part, OTP_SIZE_TA);
1531 } else if (IS_ENABLED(CONFIG_ARM_SMCCC)) {
1532 arm_smccc_smc(STM32_SMC_BSEC, STM32_SMC_WRITE_ALL,
1533 (uintptr_t)data->otp_part, 0, 0, 0, 0, 0, &res);
1534
1535 if (!res.a0) {
1536 switch (res.a1) {
1537 case 0:
1538 result = 0;
1539 break;
1540 case 1:
1541 stm32prog_err("Provisioning");
1542 result = 0;
1543 break;
1544 default:
1545 log_err("%s: OTP incorrect value (err = %ld)\n",
1546 __func__, res.a1);
1547 result = -EINVAL;
1548 break;
1549 }
1550 } else {
1551 log_err("%s: Failed to exec svc=%x op=%x in secure mode (err = %ld)\n",
1552 __func__, STM32_SMC_BSEC, STM32_SMC_WRITE_ALL, res.a0);
1553 result = -EINVAL;
1554 }
1555 }
1556
1557 free(data->otp_part);
1558 data->otp_part = NULL;
1559 log_debug("%s: result %i\n", __func__, result);
1560
1561 return result;
1562 }
1563
stm32prog_pmic_write(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1564 int stm32prog_pmic_write(struct stm32prog_data *data, u32 offset, u8 *buffer,
1565 long *size)
1566 {
1567 log_debug("%s: %x %lx\n", __func__, offset, *size);
1568
1569 if (!offset)
1570 memset(data->pmic_part, 0, PMIC_SIZE);
1571
1572 if (offset + *size > PMIC_SIZE)
1573 *size = PMIC_SIZE - offset;
1574
1575 memcpy(&data->pmic_part[offset], buffer, *size);
1576
1577 return 0;
1578 }
1579
stm32prog_pmic_read(struct stm32prog_data * data,u32 offset,u8 * buffer,long * size)1580 int stm32prog_pmic_read(struct stm32prog_data *data, u32 offset, u8 *buffer,
1581 long *size)
1582 {
1583 int result = 0, ret;
1584 struct udevice *dev;
1585
1586 if (!IS_ENABLED(CONFIG_PMIC_STPMIC1)) {
1587 stm32prog_err("PMIC update not supported");
1588
1589 return -EOPNOTSUPP;
1590 }
1591
1592 log_debug("%s: %x %lx\n", __func__, offset, *size);
1593 ret = uclass_get_device_by_driver(UCLASS_MISC,
1594 DM_DRIVER_GET(stpmic1_nvm),
1595 &dev);
1596 if (ret)
1597 return ret;
1598
1599 /* alway request PMIC for first packet */
1600 if (!offset) {
1601 /* init struct with 0 */
1602 memset(data->pmic_part, 0, PMIC_SIZE);
1603
1604 ret = uclass_get_device_by_driver(UCLASS_MISC,
1605 DM_DRIVER_GET(stpmic1_nvm),
1606 &dev);
1607 if (ret)
1608 return ret;
1609
1610 ret = misc_read(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1611 if (ret < 0) {
1612 result = ret;
1613 goto end_pmic_read;
1614 }
1615 if (ret != PMIC_SIZE) {
1616 result = -EACCES;
1617 goto end_pmic_read;
1618 }
1619 }
1620
1621 if (offset + *size > PMIC_SIZE)
1622 *size = PMIC_SIZE - offset;
1623
1624 memcpy(buffer, &data->pmic_part[offset], *size);
1625
1626 end_pmic_read:
1627 log_debug("%s: result %i\n", __func__, result);
1628 return result;
1629 }
1630
stm32prog_pmic_start(struct stm32prog_data * data)1631 int stm32prog_pmic_start(struct stm32prog_data *data)
1632 {
1633 int ret;
1634 struct udevice *dev;
1635
1636 if (!IS_ENABLED(CONFIG_PMIC_STPMIC1)) {
1637 stm32prog_err("PMIC update not supported");
1638
1639 return -EOPNOTSUPP;
1640 }
1641
1642 ret = uclass_get_device_by_driver(UCLASS_MISC,
1643 DM_DRIVER_GET(stpmic1_nvm),
1644 &dev);
1645 if (ret)
1646 return ret;
1647
1648 return misc_write(dev, 0xF8, data->pmic_part, PMIC_SIZE);
1649 }
1650
1651 /* copy FSBL on NAND to improve reliability on NAND */
stm32prog_copy_fsbl(struct stm32prog_part_t * part)1652 static int stm32prog_copy_fsbl(struct stm32prog_part_t *part)
1653 {
1654 int ret, i;
1655 void *fsbl;
1656 struct image_header_s header;
1657 struct stm32_header_v2 raw_header; /* V2 size > v1 size */
1658 struct dfu_entity *dfu;
1659 long size, offset;
1660
1661 if (part->target != STM32PROG_NAND &&
1662 part->target != STM32PROG_SPI_NAND)
1663 return -EINVAL;
1664
1665 dfu = dfu_get_entity(part->alt_id);
1666
1667 /* read header */
1668 dfu_transaction_cleanup(dfu);
1669 size = sizeof(raw_header);
1670 ret = dfu->read_medium(dfu, 0, (void *)&raw_header, &size);
1671 if (ret)
1672 return ret;
1673
1674 stm32prog_header_check((ulong)&raw_header, &header);
1675 if (header.type != HEADER_STM32IMAGE &&
1676 header.type != HEADER_STM32IMAGE_V2)
1677 return -ENOENT;
1678
1679 /* read header + payload */
1680 size = header.image_length + header.length;
1681 size = round_up(size, part->dev->mtd->erasesize);
1682 fsbl = calloc(1, size);
1683 if (!fsbl)
1684 return -ENOMEM;
1685 ret = dfu->read_medium(dfu, 0, fsbl, &size);
1686 log_debug("%s read size=%lx ret=%d\n", __func__, size, ret);
1687 if (ret)
1688 goto error;
1689
1690 dfu_transaction_cleanup(dfu);
1691 offset = 0;
1692 for (i = part->bin_nb - 1; i > 0; i--) {
1693 offset += size;
1694 /* write to the next erase block */
1695 ret = dfu->write_medium(dfu, offset, fsbl, &size);
1696 log_debug("%s copy at ofset=%lx size=%lx ret=%d",
1697 __func__, offset, size, ret);
1698 if (ret)
1699 goto error;
1700 }
1701
1702 error:
1703 free(fsbl);
1704 return ret;
1705 }
1706
stm32prog_end_phase(struct stm32prog_data * data,u64 offset)1707 static void stm32prog_end_phase(struct stm32prog_data *data, u64 offset)
1708 {
1709 if (data->phase == PHASE_FLASHLAYOUT) {
1710 #if defined(CONFIG_LEGACY_IMAGE_FORMAT)
1711 if (genimg_get_format((void *)CONFIG_SYS_LOAD_ADDR) == IMAGE_FORMAT_LEGACY) {
1712 data->script = CONFIG_SYS_LOAD_ADDR;
1713 data->phase = PHASE_END;
1714 log_notice("U-Boot script received\n");
1715 return;
1716 }
1717 #endif
1718 log_notice("\nFlashLayout received, size = %lld\n", offset);
1719 if (parse_flash_layout(data, CONFIG_SYS_LOAD_ADDR, offset))
1720 stm32prog_err("Layout: invalid FlashLayout");
1721 return;
1722 }
1723
1724 if (!data->cur_part)
1725 return;
1726
1727 if (data->cur_part->target == STM32PROG_RAM) {
1728 if (data->cur_part->part_type == PART_SYSTEM)
1729 data->uimage = data->cur_part->addr;
1730 if (data->cur_part->part_type == PART_FILESYSTEM)
1731 data->dtb = data->cur_part->addr;
1732 if (data->cur_part->part_type == PART_BINARY) {
1733 data->initrd = data->cur_part->addr;
1734 data->initrd_size = offset;
1735 }
1736 }
1737
1738 if (CONFIG_IS_ENABLED(MMC) &&
1739 data->cur_part->part_id < 0) {
1740 char cmdbuf[60];
1741
1742 sprintf(cmdbuf, "mmc bootbus %d 0 0 0; mmc partconf %d 1 %d 0",
1743 data->cur_part->dev_id, data->cur_part->dev_id,
1744 -(data->cur_part->part_id));
1745 if (run_command(cmdbuf, 0)) {
1746 stm32prog_err("commands '%s' failed", cmdbuf);
1747 return;
1748 }
1749 }
1750
1751 if (IS_ENABLED(CONFIG_MTD) &&
1752 data->cur_part->bin_nb > 1) {
1753 if (stm32prog_copy_fsbl(data->cur_part)) {
1754 stm32prog_err("%s (0x%x): copy of fsbl failed",
1755 data->cur_part->name, data->cur_part->id);
1756 return;
1757 }
1758 }
1759 }
1760
stm32prog_do_reset(struct stm32prog_data * data)1761 void stm32prog_do_reset(struct stm32prog_data *data)
1762 {
1763 if (data->phase == PHASE_RESET) {
1764 data->phase = PHASE_DO_RESET;
1765 puts("Reset requested\n");
1766 }
1767 }
1768
stm32prog_next_phase(struct stm32prog_data * data)1769 void stm32prog_next_phase(struct stm32prog_data *data)
1770 {
1771 int phase, i;
1772 struct stm32prog_part_t *part;
1773 bool found;
1774
1775 phase = data->phase;
1776 switch (phase) {
1777 case PHASE_RESET:
1778 case PHASE_END:
1779 case PHASE_DO_RESET:
1780 return;
1781 }
1782
1783 /* found next selected partition */
1784 data->dfu_seq = 0;
1785 data->cur_part = NULL;
1786 data->phase = PHASE_END;
1787 found = false;
1788 do {
1789 phase++;
1790 if (phase > PHASE_LAST_USER)
1791 break;
1792 for (i = 0; i < data->part_nb; i++) {
1793 part = &data->part_array[i];
1794 if (part->id == phase) {
1795 if (IS_SELECT(part) && !IS_EMPTY(part)) {
1796 data->cur_part = part;
1797 data->phase = phase;
1798 found = true;
1799 }
1800 break;
1801 }
1802 }
1803 } while (!found);
1804
1805 if (data->phase == PHASE_END)
1806 puts("Phase=END\n");
1807 }
1808
part_delete(struct stm32prog_data * data,struct stm32prog_part_t * part)1809 static int part_delete(struct stm32prog_data *data,
1810 struct stm32prog_part_t *part)
1811 {
1812 int ret = 0;
1813 unsigned long blks, blks_offset, blks_size;
1814 struct blk_desc *block_dev = NULL;
1815 char cmdbuf[40];
1816 char devstr[10];
1817
1818 printf("Erasing %s ", part->name);
1819 switch (part->target) {
1820 case STM32PROG_MMC:
1821 if (!IS_ENABLED(CONFIG_MMC)) {
1822 ret = -1;
1823 stm32prog_err("%s (0x%x): erase invalid",
1824 part->name, part->id);
1825 break;
1826 }
1827 printf("on mmc %d: ", part->dev->dev_id);
1828 block_dev = mmc_get_blk_desc(part->dev->mmc);
1829 blks_offset = lldiv(part->addr, part->dev->mmc->read_bl_len);
1830 blks_size = lldiv(part->size, part->dev->mmc->read_bl_len);
1831 /* -1 or -2 : delete boot partition of MMC
1832 * need to switch to associated hwpart 1 or 2
1833 */
1834 if (part->part_id < 0)
1835 if (blk_select_hwpart_devnum(UCLASS_MMC,
1836 part->dev->dev_id,
1837 -part->part_id))
1838 return -1;
1839
1840 blks = blk_derase(block_dev, blks_offset, blks_size);
1841
1842 /* return to user partition */
1843 if (part->part_id < 0)
1844 blk_select_hwpart_devnum(UCLASS_MMC,
1845 part->dev->dev_id, 0);
1846 if (blks != blks_size) {
1847 ret = -1;
1848 stm32prog_err("%s (0x%x): MMC erase failed",
1849 part->name, part->id);
1850 }
1851 break;
1852 case STM32PROG_NOR:
1853 case STM32PROG_NAND:
1854 case STM32PROG_SPI_NAND:
1855 if (!IS_ENABLED(CONFIG_MTD)) {
1856 ret = -1;
1857 stm32prog_err("%s (0x%x): erase invalid",
1858 part->name, part->id);
1859 break;
1860 }
1861 get_mtd_by_target(devstr, part->target, part->dev->dev_id);
1862 printf("on %s: ", devstr);
1863 sprintf(cmdbuf, "mtd erase %s 0x%llx 0x%llx",
1864 devstr, part->addr, part->size);
1865 if (run_command(cmdbuf, 0)) {
1866 ret = -1;
1867 stm32prog_err("%s (0x%x): MTD erase commands failed (%s)",
1868 part->name, part->id, cmdbuf);
1869 }
1870 break;
1871 case STM32PROG_RAM:
1872 printf("on ram: ");
1873 memset((void *)(uintptr_t)part->addr, 0, (size_t)part->size);
1874 break;
1875 default:
1876 ret = -1;
1877 stm32prog_err("%s (0x%x): erase invalid", part->name, part->id);
1878 break;
1879 }
1880 if (!ret)
1881 printf("done\n");
1882
1883 return ret;
1884 }
1885
stm32prog_devices_init(struct stm32prog_data * data)1886 static void stm32prog_devices_init(struct stm32prog_data *data)
1887 {
1888 int i;
1889 int ret;
1890 struct stm32prog_part_t *part;
1891
1892 ret = treat_partition_list(data);
1893 if (ret)
1894 goto error;
1895
1896 /* empty flashlayout */
1897 if (!data->dev_nb)
1898 return;
1899
1900 /* initialize the selected device */
1901 for (i = 0; i < data->dev_nb; i++) {
1902 ret = init_device(data, &data->dev[i]);
1903 if (ret)
1904 goto error;
1905 }
1906
1907 /* delete RAW partition before create partition */
1908 for (i = 0; i < data->part_nb; i++) {
1909 part = &data->part_array[i];
1910
1911 if (part->part_type != RAW_IMAGE)
1912 continue;
1913
1914 if (!IS_SELECT(part) || !IS_DELETE(part))
1915 continue;
1916
1917 ret = part_delete(data, part);
1918 if (ret)
1919 goto error;
1920 }
1921
1922 if (IS_ENABLED(CONFIG_MMC)) {
1923 ret = create_gpt_partitions(data);
1924 if (ret)
1925 goto error;
1926 }
1927
1928 /* delete partition GPT or MTD */
1929 for (i = 0; i < data->part_nb; i++) {
1930 part = &data->part_array[i];
1931
1932 if (part->part_type == RAW_IMAGE)
1933 continue;
1934
1935 if (!IS_SELECT(part) || !IS_DELETE(part))
1936 continue;
1937
1938 ret = part_delete(data, part);
1939 if (ret)
1940 goto error;
1941 }
1942
1943 return;
1944
1945 error:
1946 data->part_nb = 0;
1947 }
1948
stm32prog_dfu_init(struct stm32prog_data * data)1949 int stm32prog_dfu_init(struct stm32prog_data *data)
1950 {
1951 /* init device if no error */
1952 if (data->part_nb)
1953 stm32prog_devices_init(data);
1954
1955 if (data->part_nb)
1956 stm32prog_next_phase(data);
1957
1958 /* prepare DFU for device read/write */
1959 dfu_free_entities();
1960 return dfu_init_entities(data);
1961 }
1962
stm32prog_init(struct stm32prog_data * data,uintptr_t addr,ulong size)1963 int stm32prog_init(struct stm32prog_data *data, uintptr_t addr, ulong size)
1964 {
1965 memset(data, 0x0, sizeof(*data));
1966 data->read_phase = PHASE_RESET;
1967 data->phase = PHASE_FLASHLAYOUT;
1968
1969 return parse_flash_layout(data, addr, size);
1970 }
1971
stm32prog_clean(struct stm32prog_data * data)1972 void stm32prog_clean(struct stm32prog_data *data)
1973 {
1974 /* clean */
1975 dfu_free_entities();
1976 free(data->part_array);
1977 free(data->otp_part);
1978 free(data->buffer);
1979
1980 if (CONFIG_IS_ENABLED(OPTEE) && data->tee) {
1981 tee_close_session(data->tee, data->tee_session);
1982 data->tee = NULL;
1983 data->tee_session = 0x0;
1984 }
1985 }
1986
1987 /* DFU callback: used after serial and direct DFU USB access */
dfu_flush_callback(struct dfu_entity * dfu)1988 void dfu_flush_callback(struct dfu_entity *dfu)
1989 {
1990 if (!stm32prog_data)
1991 return;
1992
1993 if (dfu->dev_type == DFU_DEV_VIRT) {
1994 if (dfu->data.virt.dev_num == PHASE_OTP)
1995 stm32prog_otp_start(stm32prog_data);
1996 else if (dfu->data.virt.dev_num == PHASE_PMIC)
1997 stm32prog_pmic_start(stm32prog_data);
1998 return;
1999 }
2000
2001 if (dfu->dev_type == DFU_DEV_RAM) {
2002 if (dfu->alt == 0 &&
2003 stm32prog_data->phase == PHASE_FLASHLAYOUT) {
2004 stm32prog_end_phase(stm32prog_data, dfu->offset);
2005 /* waiting DFU DETACH for reenumeration */
2006 }
2007 }
2008
2009 if (!stm32prog_data->cur_part)
2010 return;
2011
2012 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
2013 stm32prog_end_phase(stm32prog_data, dfu->offset);
2014 stm32prog_next_phase(stm32prog_data);
2015 }
2016 }
2017
dfu_initiated_callback(struct dfu_entity * dfu)2018 void dfu_initiated_callback(struct dfu_entity *dfu)
2019 {
2020 if (!stm32prog_data)
2021 return;
2022
2023 if (!stm32prog_data->cur_part)
2024 return;
2025
2026 /* force the saved offset for the current partition */
2027 if (dfu->alt == stm32prog_data->cur_part->alt_id) {
2028 dfu->offset = stm32prog_data->offset;
2029 stm32prog_data->dfu_seq = 0;
2030 log_debug("dfu offset = 0x%llx\n", dfu->offset);
2031 }
2032 }
2033
dfu_error_callback(struct dfu_entity * dfu,const char * msg)2034 void dfu_error_callback(struct dfu_entity *dfu, const char *msg)
2035 {
2036 struct stm32prog_data *data = stm32prog_data;
2037
2038 if (!stm32prog_data)
2039 return;
2040
2041 if (!stm32prog_data->cur_part)
2042 return;
2043
2044 if (dfu->alt == stm32prog_data->cur_part->alt_id)
2045 stm32prog_err(msg);
2046 }
2047