1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * boot-common.c
4 *
5 * Common bootmode functions for omap based boards
6 *
7 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
8 */
9
10 #include <common.h>
11 #include <ahci.h>
12 #include <log.h>
13 #include <dm/uclass.h>
14 #include <fs_loader.h>
15 #include <spl.h>
16 #include <asm/global_data.h>
17 #include <asm/omap_common.h>
18 #include <asm/omap_sec_common.h>
19 #include <asm/arch/omap.h>
20 #include <asm/arch/mmc_host_def.h>
21 #include <asm/arch/sys_proto.h>
22 #include <watchdog.h>
23 #include <scsi.h>
24 #include <i2c.h>
25 #include <remoteproc.h>
26 #include <image.h>
27
28 DECLARE_GLOBAL_DATA_PTR;
29
30 #define IPU1_LOAD_ADDR (0xa17ff000)
31 #define MAX_REMOTECORE_BIN_SIZE (8 * 0x100000)
32 #define IPU2_LOAD_ADDR (IPU1_LOAD_ADDR + MAX_REMOTECORE_BIN_SIZE)
33
omap_sys_boot_device(void)34 __weak u32 omap_sys_boot_device(void)
35 {
36 return BOOT_DEVICE_NONE;
37 }
38
save_omap_boot_params(void)39 void save_omap_boot_params(void)
40 {
41 u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
42 struct omap_boot_parameters *omap_boot_params;
43 int sys_boot_device = 0;
44 u32 boot_device;
45 u32 boot_mode;
46
47 if ((boot_params < NON_SECURE_SRAM_START) ||
48 (boot_params > NON_SECURE_SRAM_END))
49 return;
50
51 omap_boot_params = (struct omap_boot_parameters *)boot_params;
52
53 boot_device = omap_boot_params->boot_device;
54 boot_mode = MMCSD_MODE_UNDEFINED;
55
56 /* Boot device */
57
58 #ifdef BOOT_DEVICE_NAND_I2C
59 /*
60 * Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
61 * Otherwise the SPL boot IF can't handle this device correctly.
62 * Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
63 * Draco leads to this boot-device passed to SPL from the BootROM.
64 */
65 if (boot_device == BOOT_DEVICE_NAND_I2C)
66 boot_device = BOOT_DEVICE_NAND;
67 #endif
68 #ifdef BOOT_DEVICE_QSPI_4
69 /*
70 * We get different values for QSPI_1 and QSPI_4 being used, but
71 * don't actually care about this difference. Rather than
72 * mangle the later code, if we're coming in as QSPI_4 just
73 * change to the QSPI_1 value.
74 */
75 if (boot_device == BOOT_DEVICE_QSPI_4)
76 boot_device = BOOT_DEVICE_SPI;
77 #endif
78 #ifdef CONFIG_TI816X
79 /*
80 * On PG2.0 and later TI816x the values we get when booting are not the
81 * same as on PG1.0, which is what the defines are based on. Update
82 * them as needed.
83 */
84 if (get_cpu_rev() != 1) {
85 if (boot_device == 0x05) {
86 omap_boot_params->boot_device = BOOT_DEVICE_NAND;
87 boot_device = BOOT_DEVICE_NAND;
88 }
89 if (boot_device == 0x08) {
90 omap_boot_params->boot_device = BOOT_DEVICE_MMC1;
91 boot_device = BOOT_DEVICE_MMC1;
92 }
93 }
94 #endif
95 /*
96 * When booting from peripheral booting, the boot device is not usable
97 * as-is (unless there is support for it), so the boot device is instead
98 * figured out using the SYS_BOOT pins.
99 */
100 switch (boot_device) {
101 #if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
102 case BOOT_DEVICE_UART:
103 sys_boot_device = 1;
104 break;
105 #endif
106 #if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_STORAGE)
107 case BOOT_DEVICE_USB:
108 sys_boot_device = 1;
109 break;
110 #endif
111 #if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USB_ETHER)
112 case BOOT_DEVICE_USBETH:
113 sys_boot_device = 1;
114 break;
115 #endif
116 #if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH)
117 case BOOT_DEVICE_CPGMAC:
118 sys_boot_device = 1;
119 break;
120 #endif
121 #if defined(BOOT_DEVICE_DFU) && !defined(CONFIG_SPL_DFU)
122 case BOOT_DEVICE_DFU:
123 sys_boot_device = 1;
124 break;
125 #endif
126 }
127
128 if (sys_boot_device) {
129 boot_device = omap_sys_boot_device();
130
131 /* MMC raw mode will fallback to FS mode. */
132 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
133 (boot_device <= MMC_BOOT_DEVICES_END))
134 boot_mode = MMCSD_MODE_RAW;
135 }
136
137 gd->arch.omap_boot_device = boot_device;
138
139 /* Boot mode */
140
141 #ifdef CONFIG_OMAP34XX
142 if ((boot_device >= MMC_BOOT_DEVICES_START) &&
143 (boot_device <= MMC_BOOT_DEVICES_END)) {
144 switch (boot_device) {
145 case BOOT_DEVICE_MMC1:
146 boot_mode = MMCSD_MODE_FS;
147 break;
148 case BOOT_DEVICE_MMC2:
149 boot_mode = MMCSD_MODE_RAW;
150 break;
151 }
152 }
153 #else
154 /*
155 * If the boot device was dynamically changed and doesn't match what
156 * the bootrom initially booted, we cannot use the boot device
157 * descriptor to figure out the boot mode.
158 */
159 if ((boot_device == omap_boot_params->boot_device) &&
160 (boot_device >= MMC_BOOT_DEVICES_START) &&
161 (boot_device <= MMC_BOOT_DEVICES_END)) {
162 boot_params = omap_boot_params->boot_device_descriptor;
163 if ((boot_params < NON_SECURE_SRAM_START) ||
164 (boot_params > NON_SECURE_SRAM_END))
165 return;
166
167 boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
168 if ((boot_params < NON_SECURE_SRAM_START) ||
169 (boot_params > NON_SECURE_SRAM_END))
170 return;
171
172 boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
173
174 if (boot_mode != MMCSD_MODE_FS &&
175 boot_mode != MMCSD_MODE_RAW)
176 #ifdef CONFIG_SUPPORT_EMMC_BOOT
177 boot_mode = MMCSD_MODE_EMMCBOOT;
178 #else
179 boot_mode = MMCSD_MODE_UNDEFINED;
180 #endif
181 }
182 #endif
183
184 gd->arch.omap_boot_mode = boot_mode;
185
186 #if !defined(CONFIG_TI816X) && \
187 !defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
188
189 /* CH flags */
190
191 gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
192 #endif
193 }
194
195 #ifdef CONFIG_SPL_BUILD
spl_boot_device(void)196 u32 spl_boot_device(void)
197 {
198 return gd->arch.omap_boot_device;
199 }
200
spl_mmc_boot_mode(struct mmc * mmc,const u32 boot_device)201 u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device)
202 {
203 return gd->arch.omap_boot_mode;
204 }
205
load_firmware(char * name_fw,u32 * loadaddr)206 int load_firmware(char *name_fw, u32 *loadaddr)
207 {
208 struct udevice *fsdev;
209 int size = 0;
210
211 if (!IS_ENABLED(CONFIG_FS_LOADER))
212 return 0;
213
214 if (!*loadaddr)
215 return 0;
216
217 if (!get_fs_loader(&fsdev)) {
218 size = request_firmware_into_buf(fsdev, name_fw,
219 (void *)*loadaddr, 0, 0);
220 }
221
222 return size;
223 }
224
spl_boot_ipu(void)225 void spl_boot_ipu(void)
226 {
227 int ret, size;
228 u32 loadaddr = IPU1_LOAD_ADDR;
229
230 if (!IS_ENABLED(CONFIG_SPL_BUILD) ||
231 !IS_ENABLED(CONFIG_REMOTEPROC_TI_IPU))
232 return;
233
234 size = load_firmware("dra7-ipu1-fw.xem4", &loadaddr);
235 if (size <= 0) {
236 pr_err("Firmware loading failed\n");
237 goto skip_ipu1;
238 }
239
240 enable_ipu1_clocks();
241 ret = rproc_dev_init(0);
242 if (ret) {
243 debug("%s: IPU1 failed to initialize on rproc (%d)\n",
244 __func__, ret);
245 goto skip_ipu1;
246 }
247
248 ret = rproc_load(0, IPU1_LOAD_ADDR, 0x2000000);
249 if (ret) {
250 debug("%s: IPU1 failed to load on rproc (%d)\n", __func__,
251 ret);
252 goto skip_ipu1;
253 }
254
255 debug("Starting IPU1...\n");
256
257 ret = rproc_start(0);
258 if (ret)
259 debug("%s: IPU1 failed to start (%d)\n", __func__, ret);
260
261 skip_ipu1:
262 loadaddr = IPU2_LOAD_ADDR;
263 size = load_firmware("dra7-ipu2-fw.xem4", &loadaddr);
264 if (size <= 0) {
265 pr_err("Firmware loading failed for ipu2\n");
266 return;
267 }
268
269 enable_ipu2_clocks();
270 ret = rproc_dev_init(1);
271 if (ret) {
272 debug("%s: IPU2 failed to initialize on rproc (%d)\n", __func__,
273 ret);
274 return;
275 }
276
277 ret = rproc_load(1, IPU2_LOAD_ADDR, 0x2000000);
278 if (ret) {
279 debug("%s: IPU2 failed to load on rproc (%d)\n", __func__,
280 ret);
281 return;
282 }
283
284 debug("Starting IPU2...\n");
285
286 ret = rproc_start(1);
287 if (ret)
288 debug("%s: IPU2 failed to start (%d)\n", __func__, ret);
289 }
290
spl_board_init(void)291 void spl_board_init(void)
292 {
293 /* Prepare console output */
294 preloader_console_init();
295
296 #if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
297 gpmc_init();
298 #endif
299 #if defined(CONFIG_SPL_I2C) && !CONFIG_IS_ENABLED(DM_I2C)
300 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
301 #endif
302 #if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW)
303 arch_misc_init();
304 #endif
305 #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
306 hw_watchdog_init();
307 #endif
308 #ifdef CONFIG_AM33XX
309 am33xx_spl_board_init();
310 #endif
311 if (IS_ENABLED(CONFIG_SPL_BUILD) &&
312 IS_ENABLED(CONFIG_REMOTEPROC_TI_IPU))
313 spl_boot_ipu();
314 }
315
jump_to_image_no_args(struct spl_image_info * spl_image)316 void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
317 {
318 typedef void __noreturn (*image_entry_noargs_t)(u32 *);
319 image_entry_noargs_t image_entry =
320 (image_entry_noargs_t) spl_image->entry_point;
321
322 u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
323
324 debug("image entry point: 0x%lX\n", spl_image->entry_point);
325 /* Pass the saved boot_params from rom code */
326 image_entry((u32 *)boot_params);
327 }
328 #endif
329
330 #ifdef CONFIG_SCSI_AHCI_PLAT
arch_preboot_os(void)331 void arch_preboot_os(void)
332 {
333 ahci_reset((void __iomem *)DWC_AHSATA_BASE);
334 }
335 #endif
336
337 #ifdef CONFIG_TI_SECURE_DEVICE
board_fit_image_post_process(const void * fit,int node,void ** p_image,size_t * p_size)338 void board_fit_image_post_process(const void *fit, int node, void **p_image,
339 size_t *p_size)
340 {
341 secure_boot_verify_image(p_image, p_size);
342 }
343
tee_image_process(ulong tee_image,size_t tee_size)344 static void tee_image_process(ulong tee_image, size_t tee_size)
345 {
346 secure_tee_install((u32)tee_image);
347 }
348 U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, tee_image_process);
349 #endif
350