1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * drivers/usb/gadget/dwc2_udc_otg.c
4 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
5 *
6 * Copyright (C) 2008 for Samsung Electronics
7 *
8 * BSP Support for Samsung's UDC driver
9 * available at:
10 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
11 *
12 * State machine bugfixes:
13 * Marek Szyprowski <m.szyprowski@samsung.com>
14 *
15 * Ported to u-boot:
16 * Marek Szyprowski <m.szyprowski@samsung.com>
17 * Lukasz Majewski <l.majewski@samsumg.com>
18 */
19 #undef DEBUG
20 #include <common.h>
21 #include <clk.h>
22 #include <dm.h>
23 #include <generic-phy.h>
24 #include <log.h>
25 #include <malloc.h>
26 #include <reset.h>
27 #include <dm/device_compat.h>
28 #include <dm/devres.h>
29 #include <linux/bug.h>
30 #include <linux/delay.h>
31
32 #include <linux/errno.h>
33 #include <linux/list.h>
34
35 #include <linux/usb/ch9.h>
36 #include <linux/usb/otg.h>
37 #include <linux/usb/gadget.h>
38
39 #include <phys2bus.h>
40 #include <asm/byteorder.h>
41 #include <asm/unaligned.h>
42 #include <asm/io.h>
43
44 #include <asm/mach-types.h>
45
46 #include <power/regulator.h>
47
48 #include "dwc2_udc_otg_regs.h"
49 #include "dwc2_udc_otg_priv.h"
50
51 /***********************************************************/
52
53 #define OTG_DMA_MODE 1
54
55 #define DEBUG_SETUP 0
56 #define DEBUG_EP0 0
57 #define DEBUG_ISR 0
58 #define DEBUG_OUT_EP 0
59 #define DEBUG_IN_EP 0
60
61 #include <usb/dwc2_udc.h>
62
63 #define EP0_CON 0
64 #define EP_MASK 0xF
65
66 static char *state_names[] = {
67 "WAIT_FOR_SETUP",
68 "DATA_STATE_XMIT",
69 "DATA_STATE_NEED_ZLP",
70 "WAIT_FOR_OUT_STATUS",
71 "DATA_STATE_RECV",
72 "WAIT_FOR_COMPLETE",
73 "WAIT_FOR_OUT_COMPLETE",
74 "WAIT_FOR_IN_COMPLETE",
75 "WAIT_FOR_NULL_COMPLETE",
76 };
77
78 #define DRIVER_VERSION "15 March 2009"
79
80 struct dwc2_udc *the_controller;
81
82 static const char driver_name[] = "dwc2-udc";
83 static const char ep0name[] = "ep0-control";
84
85 /* Max packet size*/
86 static unsigned int ep0_fifo_size = 64;
87 static unsigned int ep_fifo_size = 512;
88 static unsigned int ep_fifo_size2 = 1024;
89 static int reset_available = 1;
90
91 static struct usb_ctrlrequest *usb_ctrl;
92 static dma_addr_t usb_ctrl_dma_addr;
93
94 /*
95 Local declarations.
96 */
97 static int dwc2_ep_enable(struct usb_ep *ep,
98 const struct usb_endpoint_descriptor *);
99 static int dwc2_ep_disable(struct usb_ep *ep);
100 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
101 gfp_t gfp_flags);
102 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
103
104 static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
105 static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
106 static int dwc2_fifo_status(struct usb_ep *ep);
107 static void dwc2_fifo_flush(struct usb_ep *ep);
108 static void dwc2_ep0_read(struct dwc2_udc *dev);
109 static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
110 static void dwc2_handle_ep0(struct dwc2_udc *dev);
111 static int dwc2_ep0_write(struct dwc2_udc *dev);
112 static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
113 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
114 static void stop_activity(struct dwc2_udc *dev,
115 struct usb_gadget_driver *driver);
116 static int udc_enable(struct dwc2_udc *dev);
117 static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
118 static void reconfig_usbd(struct dwc2_udc *dev);
119 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
120 static void nuke(struct dwc2_ep *ep, int status);
121 static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
122 static void dwc2_udc_set_nak(struct dwc2_ep *ep);
123
set_udc_gadget_private_data(void * p)124 void set_udc_gadget_private_data(void *p)
125 {
126 debug_cond(DEBUG_SETUP != 0,
127 "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
128 the_controller, p);
129 the_controller->gadget.dev.device_data = p;
130 }
131
get_udc_gadget_private_data(struct usb_gadget * gadget)132 void *get_udc_gadget_private_data(struct usb_gadget *gadget)
133 {
134 return gadget->dev.device_data;
135 }
136
137 static struct usb_ep_ops dwc2_ep_ops = {
138 .enable = dwc2_ep_enable,
139 .disable = dwc2_ep_disable,
140
141 .alloc_request = dwc2_alloc_request,
142 .free_request = dwc2_free_request,
143
144 .queue = dwc2_queue,
145 .dequeue = dwc2_dequeue,
146
147 .set_halt = dwc2_udc_set_halt,
148 .fifo_status = dwc2_fifo_status,
149 .fifo_flush = dwc2_fifo_flush,
150 };
151
152 #define create_proc_files() do {} while (0)
153 #define remove_proc_files() do {} while (0)
154
155 /***********************************************************/
156
157 struct dwc2_usbotg_reg *reg;
158
dfu_usb_get_reset(void)159 bool dfu_usb_get_reset(void)
160 {
161 return !!(readl(®->gintsts) & INT_RESET);
162 }
163
otg_phy_init(struct dwc2_udc * dev)164 __weak void otg_phy_init(struct dwc2_udc *dev) {}
otg_phy_off(struct dwc2_udc * dev)165 __weak void otg_phy_off(struct dwc2_udc *dev) {}
166
167 /***********************************************************/
168
169 #include "dwc2_udc_otg_xfer_dma.c"
170
171 /*
172 * udc_disable - disable USB device controller
173 */
udc_disable(struct dwc2_udc * dev)174 static void udc_disable(struct dwc2_udc *dev)
175 {
176 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
177
178 udc_set_address(dev, 0);
179
180 dev->ep0state = WAIT_FOR_SETUP;
181 dev->gadget.speed = USB_SPEED_UNKNOWN;
182 dev->usb_address = 0;
183
184 otg_phy_off(dev);
185 }
186
187 /*
188 * udc_reinit - initialize software state
189 */
udc_reinit(struct dwc2_udc * dev)190 static void udc_reinit(struct dwc2_udc *dev)
191 {
192 unsigned int i;
193
194 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
195
196 /* device/ep0 records init */
197 INIT_LIST_HEAD(&dev->gadget.ep_list);
198 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
199 dev->ep0state = WAIT_FOR_SETUP;
200
201 /* basic endpoint records init */
202 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
203 struct dwc2_ep *ep = &dev->ep[i];
204
205 if (i != 0)
206 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
207
208 ep->desc = 0;
209 ep->stopped = 0;
210 INIT_LIST_HEAD(&ep->queue);
211 ep->pio_irqs = 0;
212 }
213
214 /* the rest was statically initialized, and is read-only */
215 }
216
217 #define BYTES2MAXP(x) (x / 8)
218 #define MAXP2BYTES(x) (x * 8)
219
220 /* until it's enabled, this UDC should be completely invisible
221 * to any USB host.
222 */
udc_enable(struct dwc2_udc * dev)223 static int udc_enable(struct dwc2_udc *dev)
224 {
225 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
226
227 otg_phy_init(dev);
228 reconfig_usbd(dev);
229
230 debug_cond(DEBUG_SETUP != 0,
231 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
232 readl(®->gintmsk));
233
234 dev->gadget.speed = USB_SPEED_UNKNOWN;
235
236 return 0;
237 }
238
dwc2_gadget_pullup(struct usb_gadget * g,int is_on)239 static int dwc2_gadget_pullup(struct usb_gadget *g, int is_on)
240 {
241 clrsetbits_le32(®->dctl, SOFT_DISCONNECT,
242 is_on ? 0 : SOFT_DISCONNECT);
243
244 return 0;
245 }
246
247 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
248 /*
249 Register entry point for the peripheral controller driver.
250 */
usb_gadget_register_driver(struct usb_gadget_driver * driver)251 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
252 {
253 struct dwc2_udc *dev = the_controller;
254 int retval = 0;
255 unsigned long flags = 0;
256
257 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
258
259 if (!driver || driver->speed < USB_SPEED_FULL
260 || !driver->bind || !driver->disconnect || !driver->setup)
261 return -EINVAL;
262 if (!dev)
263 return -ENODEV;
264 if (dev->driver)
265 return -EBUSY;
266
267 spin_lock_irqsave(&dev->lock, flags);
268 /* first hook up the driver ... */
269 dev->driver = driver;
270 spin_unlock_irqrestore(&dev->lock, flags);
271
272 if (retval) { /* TODO */
273 printf("target device_add failed, error %d\n", retval);
274 return retval;
275 }
276
277 retval = driver->bind(&dev->gadget);
278 if (retval) {
279 debug_cond(DEBUG_SETUP != 0,
280 "%s: bind to driver --> error %d\n",
281 dev->gadget.name, retval);
282 dev->driver = 0;
283 return retval;
284 }
285
286 enable_irq(IRQ_OTG);
287
288 debug_cond(DEBUG_SETUP != 0,
289 "Registered gadget driver %s\n", dev->gadget.name);
290 udc_enable(dev);
291
292 return 0;
293 }
294
295 /*
296 * Unregister entry point for the peripheral controller driver.
297 */
usb_gadget_unregister_driver(struct usb_gadget_driver * driver)298 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
299 {
300 struct dwc2_udc *dev = the_controller;
301 unsigned long flags = 0;
302
303 if (!dev)
304 return -ENODEV;
305 if (!driver || driver != dev->driver)
306 return -EINVAL;
307
308 spin_lock_irqsave(&dev->lock, flags);
309 dev->driver = 0;
310 stop_activity(dev, driver);
311 spin_unlock_irqrestore(&dev->lock, flags);
312
313 driver->unbind(&dev->gadget);
314
315 disable_irq(IRQ_OTG);
316
317 udc_disable(dev);
318 return 0;
319 }
320 #else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
321
dwc2_gadget_start(struct usb_gadget * g,struct usb_gadget_driver * driver)322 static int dwc2_gadget_start(struct usb_gadget *g,
323 struct usb_gadget_driver *driver)
324 {
325 struct dwc2_udc *dev = the_controller;
326
327 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
328
329 if (!driver || driver->speed < USB_SPEED_FULL ||
330 !driver->bind || !driver->disconnect || !driver->setup)
331 return -EINVAL;
332
333 if (!dev)
334 return -ENODEV;
335
336 if (dev->driver)
337 return -EBUSY;
338
339 /* first hook up the driver ... */
340 dev->driver = driver;
341
342 debug_cond(DEBUG_SETUP != 0,
343 "Registered gadget driver %s\n", dev->gadget.name);
344 return udc_enable(dev);
345 }
346
dwc2_gadget_stop(struct usb_gadget * g)347 static int dwc2_gadget_stop(struct usb_gadget *g)
348 {
349 struct dwc2_udc *dev = the_controller;
350
351 if (!dev)
352 return -ENODEV;
353
354 if (!dev->driver)
355 return -EINVAL;
356
357 dev->driver = 0;
358 stop_activity(dev, dev->driver);
359
360 udc_disable(dev);
361
362 return 0;
363 }
364
365 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
366
367 /*
368 * done - retire a request; caller blocked irqs
369 */
done(struct dwc2_ep * ep,struct dwc2_request * req,int status)370 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
371 {
372 unsigned int stopped = ep->stopped;
373
374 debug("%s: %s %p, req = %p, stopped = %d\n",
375 __func__, ep->ep.name, ep, &req->req, stopped);
376
377 list_del_init(&req->queue);
378
379 if (likely(req->req.status == -EINPROGRESS))
380 req->req.status = status;
381 else
382 status = req->req.status;
383
384 if (status && status != -ESHUTDOWN) {
385 debug("complete %s req %p stat %d len %u/%u\n",
386 ep->ep.name, &req->req, status,
387 req->req.actual, req->req.length);
388 }
389
390 /* don't modify queue heads during completion callback */
391 ep->stopped = 1;
392
393 #ifdef DEBUG
394 printf("calling complete callback\n");
395 {
396 int i, len = req->req.length;
397
398 printf("pkt[%d] = ", req->req.length);
399 if (len > 64)
400 len = 64;
401 for (i = 0; i < len; i++) {
402 printf("%02x", ((u8 *)req->req.buf)[i]);
403 if ((i & 7) == 7)
404 printf(" ");
405 }
406 printf("\n");
407 }
408 #endif
409 spin_unlock(&ep->dev->lock);
410 req->req.complete(&ep->ep, &req->req);
411 spin_lock(&ep->dev->lock);
412
413 debug("callback completed\n");
414
415 ep->stopped = stopped;
416 }
417
418 /*
419 * nuke - dequeue ALL requests
420 */
nuke(struct dwc2_ep * ep,int status)421 static void nuke(struct dwc2_ep *ep, int status)
422 {
423 struct dwc2_request *req;
424
425 debug("%s: %s %p\n", __func__, ep->ep.name, ep);
426
427 /* called with irqs blocked */
428 while (!list_empty(&ep->queue)) {
429 req = list_entry(ep->queue.next, struct dwc2_request, queue);
430 done(ep, req, status);
431 }
432 }
433
stop_activity(struct dwc2_udc * dev,struct usb_gadget_driver * driver)434 static void stop_activity(struct dwc2_udc *dev,
435 struct usb_gadget_driver *driver)
436 {
437 int i;
438
439 /* don't disconnect drivers more than once */
440 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
441 driver = 0;
442 dev->gadget.speed = USB_SPEED_UNKNOWN;
443
444 /* prevent new request submissions, kill any outstanding requests */
445 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
446 struct dwc2_ep *ep = &dev->ep[i];
447 ep->stopped = 1;
448 nuke(ep, -ESHUTDOWN);
449 }
450
451 /* report disconnect; the driver is already quiesced */
452 if (driver) {
453 spin_unlock(&dev->lock);
454 driver->disconnect(&dev->gadget);
455 spin_lock(&dev->lock);
456 }
457
458 /* re-init driver-visible data structures */
459 udc_reinit(dev);
460 }
461
reconfig_usbd(struct dwc2_udc * dev)462 static void reconfig_usbd(struct dwc2_udc *dev)
463 {
464 /* 2. Soft-reset OTG Core and then unreset again. */
465 int i;
466 unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl);
467 uint32_t dflt_gusbcfg;
468 uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
469 u32 max_hw_ep;
470 int pdata_hw_ep;
471
472 debug("Resetting OTG controller\n");
473
474 dflt_gusbcfg =
475 0<<15 /* PHY Low Power Clock sel*/
476 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
477 |0x5<<10 /* Turnaround time*/
478 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
479 /* 1:SRP enable] H1= 1,1*/
480 |0<<7 /* Ulpi DDR sel*/
481 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
482 |0<<4 /* 0: utmi+, 1:ulpi*/
483 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
484 |0<<3 /* phy i/f 0:8bit, 1:16bit*/
485 #else
486 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
487 #endif
488 |0x7<<0; /* HS/FS Timeout**/
489
490 if (dev->pdata->usb_gusbcfg)
491 dflt_gusbcfg = dev->pdata->usb_gusbcfg;
492
493 writel(dflt_gusbcfg, ®->gusbcfg);
494
495 /* 3. Put the OTG device core in the disconnected state.*/
496 uTemp = readl(®->dctl);
497 uTemp |= SOFT_DISCONNECT;
498 writel(uTemp, ®->dctl);
499
500 udelay(20);
501
502 /* 4. Make the OTG device core exit from the disconnected state.*/
503 uTemp = readl(®->dctl);
504 uTemp = uTemp & ~SOFT_DISCONNECT;
505 writel(uTemp, ®->dctl);
506
507 /* 5. Configure OTG Core to initial settings of device mode.*/
508 /* [][1: full speed(30Mhz) 0:high speed]*/
509 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg);
510
511 mdelay(1);
512
513 /* 6. Unmask the core interrupts*/
514 writel(GINTMSK_INIT, ®->gintmsk);
515
516 /* 7. Set NAK bit of EP0, EP1, EP2*/
517 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl);
518 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl);
519
520 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
521 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl);
522 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl);
523 }
524
525 /* 8. Unmask EPO interrupts*/
526 writel(((1 << EP0_CON) << DAINT_OUT_BIT)
527 | (1 << EP0_CON), ®->daintmsk);
528
529 /* 9. Unmask device OUT EP common interrupts*/
530 writel(DOEPMSK_INIT, ®->doepmsk);
531
532 /* 10. Unmask device IN EP common interrupts*/
533 writel(DIEPMSK_INIT, ®->diepmsk);
534
535 rx_fifo_sz = RX_FIFO_SIZE;
536 np_tx_fifo_sz = NPTX_FIFO_SIZE;
537 tx_fifo_sz = PTX_FIFO_SIZE;
538
539 if (dev->pdata->rx_fifo_sz)
540 rx_fifo_sz = dev->pdata->rx_fifo_sz;
541 if (dev->pdata->np_tx_fifo_sz)
542 np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
543 if (dev->pdata->tx_fifo_sz)
544 tx_fifo_sz = dev->pdata->tx_fifo_sz;
545
546 /* 11. Set Rx FIFO Size (in 32-bit words) */
547 writel(rx_fifo_sz, ®->grxfsiz);
548
549 /* 12. Set Non Periodic Tx FIFO Size */
550 writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
551 ®->gnptxfsiz);
552
553 /* retrieve the number of IN Endpoints (excluding ep0) */
554 max_hw_ep = (readl(®->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
555 GHWCFG4_NUM_IN_EPS_SHIFT;
556 pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
557
558 /* tx_fifo_sz_nb should equal to number of IN Endpoint */
559 if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
560 pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
561 max_hw_ep, pdata_hw_ep);
562
563 for (i = 0; i < max_hw_ep; i++) {
564 if (pdata_hw_ep)
565 tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
566
567 writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
568 tx_fifo_sz << 16, ®->dieptxf[i]);
569 }
570 /* Flush the RX FIFO */
571 writel(RX_FIFO_FLUSH, ®->grstctl);
572 while (readl(®->grstctl) & RX_FIFO_FLUSH)
573 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
574
575 /* Flush all the Tx FIFO's */
576 writel(TX_FIFO_FLUSH_ALL, ®->grstctl);
577 writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl);
578 while (readl(®->grstctl) & TX_FIFO_FLUSH)
579 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
580
581 /* 13. Clear NAK bit of EP0, EP1, EP2*/
582 /* For Slave mode*/
583 /* EP0: Control OUT */
584 writel(DEPCTL_EPDIS | DEPCTL_CNAK,
585 ®->out_endp[EP0_CON].doepctl);
586
587 /* 14. Initialize OTG Link Core.*/
588 writel(GAHBCFG_INIT, ®->gahbcfg);
589 }
590
set_max_pktsize(struct dwc2_udc * dev,enum usb_device_speed speed)591 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
592 {
593 unsigned int ep_ctrl;
594 int i;
595
596 if (speed == USB_SPEED_HIGH) {
597 ep0_fifo_size = 64;
598 ep_fifo_size = 512;
599 ep_fifo_size2 = 1024;
600 dev->gadget.speed = USB_SPEED_HIGH;
601 } else {
602 ep0_fifo_size = 64;
603 ep_fifo_size = 64;
604 ep_fifo_size2 = 64;
605 dev->gadget.speed = USB_SPEED_FULL;
606 }
607
608 dev->ep[0].ep.maxpacket = ep0_fifo_size;
609 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
610 dev->ep[i].ep.maxpacket = ep_fifo_size;
611
612 /* EP0 - Control IN (64 bytes)*/
613 ep_ctrl = readl(®->in_endp[EP0_CON].diepctl);
614 writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl);
615
616 /* EP0 - Control OUT (64 bytes)*/
617 ep_ctrl = readl(®->out_endp[EP0_CON].doepctl);
618 writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl);
619 }
620
dwc2_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)621 static int dwc2_ep_enable(struct usb_ep *_ep,
622 const struct usb_endpoint_descriptor *desc)
623 {
624 struct dwc2_ep *ep;
625 struct dwc2_udc *dev;
626 unsigned long flags = 0;
627
628 debug("%s: %p\n", __func__, _ep);
629
630 ep = container_of(_ep, struct dwc2_ep, ep);
631 if (!_ep || !desc || ep->desc || _ep->name == ep0name
632 || desc->bDescriptorType != USB_DT_ENDPOINT
633 || ep->bEndpointAddress != desc->bEndpointAddress
634 || ep_maxpacket(ep) <
635 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
636
637 debug("%s: bad ep or descriptor\n", __func__);
638 return -EINVAL;
639 }
640
641 /* xfer types must match, except that interrupt ~= bulk */
642 if (ep->bmAttributes != desc->bmAttributes
643 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
644 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
645
646 debug("%s: %s type mismatch\n", __func__, _ep->name);
647 return -EINVAL;
648 }
649
650 /* hardware _could_ do smaller, but driver doesn't */
651 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
652 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) >
653 ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
654
655 debug("%s: bad %s maxpacket\n", __func__, _ep->name);
656 return -ERANGE;
657 }
658
659 dev = ep->dev;
660 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
661
662 debug("%s: bogus device state\n", __func__);
663 return -ESHUTDOWN;
664 }
665
666 _ep->desc = desc;
667 ep->stopped = 0;
668 ep->desc = desc;
669 ep->pio_irqs = 0;
670 ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
671
672 /* Reset halt state */
673 dwc2_udc_set_nak(ep);
674 dwc2_udc_set_halt(_ep, 0);
675
676 spin_lock_irqsave(&ep->dev->lock, flags);
677 dwc2_udc_ep_activate(ep);
678 spin_unlock_irqrestore(&ep->dev->lock, flags);
679
680 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
681 __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
682 return 0;
683 }
684
685 /*
686 * Disable EP
687 */
dwc2_ep_disable(struct usb_ep * _ep)688 static int dwc2_ep_disable(struct usb_ep *_ep)
689 {
690 struct dwc2_ep *ep;
691 unsigned long flags = 0;
692
693 debug("%s: %p\n", __func__, _ep);
694
695 ep = container_of(_ep, struct dwc2_ep, ep);
696 if (!_ep || !ep->desc) {
697 debug("%s: %s not enabled\n", __func__,
698 _ep ? ep->ep.name : NULL);
699 return -EINVAL;
700 }
701
702 spin_lock_irqsave(&ep->dev->lock, flags);
703
704 /* Nuke all pending requests */
705 nuke(ep, -ESHUTDOWN);
706
707 _ep->desc = NULL;
708 ep->desc = 0;
709 ep->stopped = 1;
710
711 spin_unlock_irqrestore(&ep->dev->lock, flags);
712
713 debug("%s: disabled %s\n", __func__, _ep->name);
714 return 0;
715 }
716
dwc2_alloc_request(struct usb_ep * ep,gfp_t gfp_flags)717 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
718 gfp_t gfp_flags)
719 {
720 struct dwc2_request *req;
721
722 debug("%s: %s %p\n", __func__, ep->name, ep);
723
724 req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
725 if (!req)
726 return 0;
727
728 memset(req, 0, sizeof *req);
729 INIT_LIST_HEAD(&req->queue);
730
731 return &req->req;
732 }
733
dwc2_free_request(struct usb_ep * ep,struct usb_request * _req)734 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
735 {
736 struct dwc2_request *req;
737
738 debug("%s: %p\n", __func__, ep);
739
740 req = container_of(_req, struct dwc2_request, req);
741 WARN_ON(!list_empty(&req->queue));
742 kfree(req);
743 }
744
745 /* dequeue JUST ONE request */
dwc2_dequeue(struct usb_ep * _ep,struct usb_request * _req)746 static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
747 {
748 struct dwc2_ep *ep;
749 struct dwc2_request *req;
750 unsigned long flags = 0;
751
752 debug("%s: %p\n", __func__, _ep);
753
754 ep = container_of(_ep, struct dwc2_ep, ep);
755 if (!_ep || ep->ep.name == ep0name)
756 return -EINVAL;
757
758 spin_lock_irqsave(&ep->dev->lock, flags);
759
760 /* make sure it's actually queued on this endpoint */
761 list_for_each_entry(req, &ep->queue, queue) {
762 if (&req->req == _req)
763 break;
764 }
765 if (&req->req != _req) {
766 spin_unlock_irqrestore(&ep->dev->lock, flags);
767 return -EINVAL;
768 }
769
770 done(ep, req, -ECONNRESET);
771
772 spin_unlock_irqrestore(&ep->dev->lock, flags);
773 return 0;
774 }
775
776 /*
777 * Return bytes in EP FIFO
778 */
dwc2_fifo_status(struct usb_ep * _ep)779 static int dwc2_fifo_status(struct usb_ep *_ep)
780 {
781 int count = 0;
782 struct dwc2_ep *ep;
783
784 ep = container_of(_ep, struct dwc2_ep, ep);
785 if (!_ep) {
786 debug("%s: bad ep\n", __func__);
787 return -ENODEV;
788 }
789
790 debug("%s: %d\n", __func__, ep_index(ep));
791
792 /* LPD can't report unclaimed bytes from IN fifos */
793 if (ep_is_in(ep))
794 return -EOPNOTSUPP;
795
796 return count;
797 }
798
799 /*
800 * Flush EP FIFO
801 */
dwc2_fifo_flush(struct usb_ep * _ep)802 static void dwc2_fifo_flush(struct usb_ep *_ep)
803 {
804 struct dwc2_ep *ep;
805
806 ep = container_of(_ep, struct dwc2_ep, ep);
807 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
808 debug("%s: bad ep\n", __func__);
809 return;
810 }
811
812 debug("%s: %d\n", __func__, ep_index(ep));
813 }
814
815 static const struct usb_gadget_ops dwc2_udc_ops = {
816 .pullup = dwc2_gadget_pullup,
817 /* current versions must always be self-powered */
818 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
819 .udc_start = dwc2_gadget_start,
820 .udc_stop = dwc2_gadget_stop,
821 #endif
822 };
823
824 static struct dwc2_udc memory = {
825 .usb_address = 0,
826 .gadget = {
827 .ops = &dwc2_udc_ops,
828 .ep0 = &memory.ep[0].ep,
829 .name = driver_name,
830 },
831
832 /* control endpoint */
833 .ep[0] = {
834 .ep = {
835 .name = ep0name,
836 .ops = &dwc2_ep_ops,
837 .maxpacket = EP0_FIFO_SIZE,
838 },
839 .dev = &memory,
840
841 .bEndpointAddress = 0,
842 .bmAttributes = 0,
843
844 .ep_type = ep_control,
845 },
846
847 /* first group of endpoints */
848 .ep[1] = {
849 .ep = {
850 .name = "ep1in-bulk",
851 .ops = &dwc2_ep_ops,
852 .maxpacket = EP_FIFO_SIZE,
853 },
854 .dev = &memory,
855
856 .bEndpointAddress = USB_DIR_IN | 1,
857 .bmAttributes = USB_ENDPOINT_XFER_BULK,
858
859 .ep_type = ep_bulk_out,
860 .fifo_num = 1,
861 },
862
863 .ep[2] = {
864 .ep = {
865 .name = "ep2out-bulk",
866 .ops = &dwc2_ep_ops,
867 .maxpacket = EP_FIFO_SIZE,
868 },
869 .dev = &memory,
870
871 .bEndpointAddress = USB_DIR_OUT | 2,
872 .bmAttributes = USB_ENDPOINT_XFER_BULK,
873
874 .ep_type = ep_bulk_in,
875 .fifo_num = 2,
876 },
877
878 .ep[3] = {
879 .ep = {
880 .name = "ep3in-int",
881 .ops = &dwc2_ep_ops,
882 .maxpacket = EP_FIFO_SIZE,
883 },
884 .dev = &memory,
885
886 .bEndpointAddress = USB_DIR_IN | 3,
887 .bmAttributes = USB_ENDPOINT_XFER_INT,
888
889 .ep_type = ep_interrupt,
890 .fifo_num = 3,
891 },
892 };
893
894 /*
895 * probe - binds to the platform device
896 */
897
dwc2_udc_probe(struct dwc2_plat_otg_data * pdata)898 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
899 {
900 struct dwc2_udc *dev = &memory;
901 int retval = 0;
902
903 debug("%s: %p\n", __func__, pdata);
904
905 dev->pdata = pdata;
906
907 reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
908
909 dev->gadget.is_dualspeed = 1; /* Hack only*/
910 dev->gadget.is_otg = 0;
911 dev->gadget.is_a_peripheral = 0;
912 dev->gadget.b_hnp_enable = 0;
913 dev->gadget.a_hnp_support = 0;
914 dev->gadget.a_alt_hnp_support = 0;
915
916 the_controller = dev;
917
918 usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
919 ROUND(sizeof(struct usb_ctrlrequest),
920 CONFIG_SYS_CACHELINE_SIZE));
921 if (!usb_ctrl) {
922 pr_err("No memory available for UDC!\n");
923 return -ENOMEM;
924 }
925
926 usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
927
928 udc_reinit(dev);
929
930 return retval;
931 }
932
dwc2_udc_handle_interrupt(void)933 int dwc2_udc_handle_interrupt(void)
934 {
935 u32 intr_status = readl(®->gintsts);
936 u32 gintmsk = readl(®->gintmsk);
937
938 if (intr_status & gintmsk)
939 return dwc2_udc_irq(1, (void *)the_controller);
940
941 return 0;
942 }
943
944 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
945
usb_gadget_handle_interrupts(int index)946 int usb_gadget_handle_interrupts(int index)
947 {
948 return dwc2_udc_handle_interrupt();
949 }
950
951 #else /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
952
953 struct dwc2_priv_data {
954 struct clk_bulk clks;
955 struct reset_ctl_bulk resets;
956 struct phy_bulk phys;
957 struct udevice *usb33d_supply;
958 };
959
dm_usb_gadget_handle_interrupts(struct udevice * dev)960 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
961 {
962 return dwc2_udc_handle_interrupt();
963 }
964
dwc2_phy_setup(struct udevice * dev,struct phy_bulk * phys)965 static int dwc2_phy_setup(struct udevice *dev, struct phy_bulk *phys)
966 {
967 int ret;
968
969 ret = generic_phy_get_bulk(dev, phys);
970 if (ret)
971 return ret;
972
973 ret = generic_phy_init_bulk(phys);
974 if (ret)
975 return ret;
976
977 ret = generic_phy_power_on_bulk(phys);
978 if (ret)
979 generic_phy_exit_bulk(phys);
980
981 return ret;
982 }
983
dwc2_phy_shutdown(struct udevice * dev,struct phy_bulk * phys)984 static void dwc2_phy_shutdown(struct udevice *dev, struct phy_bulk *phys)
985 {
986 generic_phy_power_off_bulk(phys);
987 generic_phy_exit_bulk(phys);
988 }
989
dwc2_udc_otg_of_to_plat(struct udevice * dev)990 static int dwc2_udc_otg_of_to_plat(struct udevice *dev)
991 {
992 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
993 ulong drvdata;
994 void (*set_params)(struct dwc2_plat_otg_data *data);
995 int ret;
996
997 if (usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_PERIPHERAL &&
998 usb_get_dr_mode(dev_ofnode(dev)) != USB_DR_MODE_OTG) {
999 dev_dbg(dev, "Invalid mode\n");
1000 return -ENODEV;
1001 }
1002
1003 plat->regs_otg = dev_read_addr(dev);
1004
1005 plat->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
1006 plat->np_tx_fifo_sz = dev_read_u32_default(dev, "g-np-tx-fifo-size", 0);
1007
1008 ret = dev_read_size(dev, "g-tx-fifo-size");
1009 if (ret > 0)
1010 plat->tx_fifo_sz_nb = ret / sizeof(u32);
1011 if (plat->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
1012 plat->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
1013 if (plat->tx_fifo_sz_nb) {
1014 ret = dev_read_u32_array(dev, "g-tx-fifo-size",
1015 plat->tx_fifo_sz_array,
1016 plat->tx_fifo_sz_nb);
1017 if (ret)
1018 return ret;
1019 }
1020
1021 plat->force_b_session_valid =
1022 dev_read_bool(dev, "u-boot,force-b-session-valid");
1023
1024 plat->force_vbus_detection =
1025 dev_read_bool(dev, "u-boot,force-vbus-detection");
1026
1027 /* force plat according compatible */
1028 drvdata = dev_get_driver_data(dev);
1029 if (drvdata) {
1030 set_params = (void *)drvdata;
1031 set_params(plat);
1032 }
1033
1034 return 0;
1035 }
1036
dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data * p)1037 static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
1038 {
1039 p->activate_stm_id_vb_detection = true;
1040 p->usb_gusbcfg =
1041 0 << 15 /* PHY Low Power Clock sel*/
1042 | 0x9 << 10 /* USB Turnaround time (0x9 for HS phy) */
1043 | 0 << 9 /* [0:HNP disable,1:HNP enable]*/
1044 | 0 << 8 /* [0:SRP disable 1:SRP enable]*/
1045 | 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
1046 | 0x7 << 0; /* FS timeout calibration**/
1047
1048 if (p->force_b_session_valid)
1049 p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
1050 }
1051
dwc2_udc_otg_reset_init(struct udevice * dev,struct reset_ctl_bulk * resets)1052 static int dwc2_udc_otg_reset_init(struct udevice *dev,
1053 struct reset_ctl_bulk *resets)
1054 {
1055 int ret;
1056
1057 ret = reset_get_bulk(dev, resets);
1058 if (ret == -ENOTSUPP || ret == -ENOENT)
1059 return 0;
1060
1061 if (ret)
1062 return ret;
1063
1064 ret = reset_assert_bulk(resets);
1065
1066 if (!ret) {
1067 udelay(2);
1068 ret = reset_deassert_bulk(resets);
1069 }
1070 if (ret) {
1071 reset_release_bulk(resets);
1072 return ret;
1073 }
1074
1075 return 0;
1076 }
1077
dwc2_udc_otg_clk_init(struct udevice * dev,struct clk_bulk * clks)1078 static int dwc2_udc_otg_clk_init(struct udevice *dev,
1079 struct clk_bulk *clks)
1080 {
1081 int ret;
1082
1083 ret = clk_get_bulk(dev, clks);
1084 if (ret == -ENOSYS)
1085 return 0;
1086
1087 if (ret)
1088 return ret;
1089
1090 ret = clk_enable_bulk(clks);
1091 if (ret) {
1092 clk_release_bulk(clks);
1093 return ret;
1094 }
1095
1096 return 0;
1097 }
1098
dwc2_udc_otg_probe(struct udevice * dev)1099 static int dwc2_udc_otg_probe(struct udevice *dev)
1100 {
1101 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
1102 struct dwc2_priv_data *priv = dev_get_priv(dev);
1103 struct dwc2_usbotg_reg *usbotg_reg =
1104 (struct dwc2_usbotg_reg *)plat->regs_otg;
1105 int ret;
1106
1107 ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
1108 if (ret)
1109 return ret;
1110
1111 ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
1112 if (ret)
1113 return ret;
1114
1115 ret = dwc2_phy_setup(dev, &priv->phys);
1116 if (ret)
1117 return ret;
1118
1119 if (plat->activate_stm_id_vb_detection) {
1120 if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
1121 (!plat->force_b_session_valid ||
1122 plat->force_vbus_detection)) {
1123 ret = device_get_supply_regulator(dev, "usb33d-supply",
1124 &priv->usb33d_supply);
1125 if (ret) {
1126 dev_err(dev, "can't get voltage level detector supply\n");
1127 return ret;
1128 }
1129 ret = regulator_set_enable(priv->usb33d_supply, true);
1130 if (ret) {
1131 dev_err(dev, "can't enable voltage level detector supply\n");
1132 return ret;
1133 }
1134 }
1135
1136 if (plat->force_b_session_valid &&
1137 !plat->force_vbus_detection) {
1138 /* Override VBUS detection: enable then value*/
1139 setbits_le32(&usbotg_reg->gotgctl, VB_VALOEN);
1140 setbits_le32(&usbotg_reg->gotgctl, VB_VALOVAL);
1141 } else {
1142 /* Enable VBUS sensing */
1143 setbits_le32(&usbotg_reg->ggpio,
1144 GGPIO_STM32_OTG_GCCFG_VBDEN);
1145 }
1146 if (plat->force_b_session_valid) {
1147 /* Override B session bits: enable then value */
1148 setbits_le32(&usbotg_reg->gotgctl, A_VALOEN | B_VALOEN);
1149 setbits_le32(&usbotg_reg->gotgctl,
1150 A_VALOVAL | B_VALOVAL);
1151 } else {
1152 /* Enable ID detection */
1153 setbits_le32(&usbotg_reg->ggpio,
1154 GGPIO_STM32_OTG_GCCFG_IDEN);
1155 }
1156 }
1157
1158 ret = dwc2_udc_probe(plat);
1159 if (ret)
1160 return ret;
1161
1162 the_controller->driver = 0;
1163
1164 ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
1165
1166 return ret;
1167 }
1168
dwc2_udc_otg_remove(struct udevice * dev)1169 static int dwc2_udc_otg_remove(struct udevice *dev)
1170 {
1171 struct dwc2_priv_data *priv = dev_get_priv(dev);
1172
1173 usb_del_gadget_udc(&the_controller->gadget);
1174
1175 reset_release_bulk(&priv->resets);
1176
1177 clk_release_bulk(&priv->clks);
1178
1179 dwc2_phy_shutdown(dev, &priv->phys);
1180
1181 return dm_scan_fdt_dev(dev);
1182 }
1183
1184 static const struct udevice_id dwc2_udc_otg_ids[] = {
1185 { .compatible = "snps,dwc2" },
1186 { .compatible = "brcm,bcm2835-usb" },
1187 { .compatible = "st,stm32mp15-hsotg",
1188 .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
1189 {},
1190 };
1191
1192 U_BOOT_DRIVER(dwc2_udc_otg) = {
1193 .name = "dwc2-udc-otg",
1194 .id = UCLASS_USB_GADGET_GENERIC,
1195 .of_match = dwc2_udc_otg_ids,
1196 .of_to_plat = dwc2_udc_otg_of_to_plat,
1197 .probe = dwc2_udc_otg_probe,
1198 .remove = dwc2_udc_otg_remove,
1199 .plat_auto = sizeof(struct dwc2_plat_otg_data),
1200 .priv_auto = sizeof(struct dwc2_priv_data),
1201 };
1202
dwc2_udc_B_session_valid(struct udevice * dev)1203 int dwc2_udc_B_session_valid(struct udevice *dev)
1204 {
1205 struct dwc2_plat_otg_data *plat = dev_get_plat(dev);
1206 struct dwc2_usbotg_reg *usbotg_reg =
1207 (struct dwc2_usbotg_reg *)plat->regs_otg;
1208
1209 return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
1210 }
1211 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
1212