1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2008-2014 Freescale Semiconductor, Inc. 4 * Copyright 2021 NXP 5 * 6 */ 7 8 #ifndef __JR_H 9 #define __JR_H 10 11 #include <linux/compiler.h> 12 #include "fsl_sec.h" 13 #include "type.h" 14 #include <misc.h> 15 16 #define JR_SIZE 4 17 /* Timeout currently defined as 10 sec */ 18 #define CFG_USEC_DEQ_TIMEOUT 10000000U 19 20 #define DEFAULT_JR_ID 0 21 #define DEFAULT_JR_LIODN 0 22 #define DEFAULT_IRQ 0 /* Interrupts not to be configured */ 23 24 #define MCFGR_SWRST ((uint32_t)(1)<<31) /* Software Reset */ 25 #define MCFGR_DMA_RST ((uint32_t)(1)<<28) /* DMA Reset */ 26 #define MCFGR_PS_SHIFT 16 27 #define MCFGR_AWCACHE_SHIFT 8 28 #define MCFGR_AWCACHE_MASK (0xf << MCFGR_AWCACHE_SHIFT) 29 #define MCFGR_ARCACHE_SHIFT 12 30 #define MCFGR_ARCACHE_MASK (0xf << MCFGR_ARCACHE_SHIFT) 31 32 #define JR_INTMASK 0x00000001 33 #define JRCR_RESET 0x01 34 #define JRINT_ERR_HALT_INPROGRESS 0x4 35 #define JRINT_ERR_HALT_MASK 0xc 36 #define JRNSLIODN_SHIFT 16 37 #define JRNSLIODN_MASK 0x0fff0000 38 #define JRSLIODN_SHIFT 0 39 #define JRSLIODN_MASK 0x00000fff 40 41 #define JRDID_MS_PRIM_DID BIT(0) 42 #define JRDID_MS_PRIM_TZ BIT(4) 43 #define JRDID_MS_TZ_OWN BIT(15) 44 45 #define JQ_DEQ_ERR (-1) 46 #define JQ_DEQ_TO_ERR (-2) 47 #define JQ_ENQ_ERR (-3) 48 49 #define RNG4_MAX_HANDLES 2 50 51 enum { 52 /* Run caam jobring descriptor(in buf) */ 53 CAAM_JR_RUN_DESC, 54 }; 55 56 struct op_ring { 57 caam_dma_addr_t desc; 58 uint32_t status; 59 } __packed; 60 61 struct jr_info { 62 void (*callback)(uint32_t status, void *arg); 63 caam_dma_addr_t desc_phys_addr; 64 uint32_t desc_len; 65 uint32_t op_done; 66 void *arg; 67 }; 68 69 struct jobring { 70 int jq_id; 71 int irq; 72 int liodn; 73 /* Head is the index where software would enq the descriptor in 74 * the i/p ring 75 */ 76 int head; 77 /* Tail index would be used by s/w ehile enqueuing to determine if 78 * there is any space left in the s/w maintained i/p rings 79 */ 80 /* Also in case of deq tail will be incremented only in case of 81 * in-order job completion 82 */ 83 int tail; 84 /* Read index of the output ring. It may not match with tail in case 85 * of out of order completetion 86 */ 87 int read_idx; 88 /* Write index to input ring. Would be always equal to head */ 89 int write_idx; 90 /* Size of the rings. */ 91 int size; 92 /* Op ring size aligned to cache line size */ 93 int op_size; 94 /* The ip and output rings have to be accessed by SEC. So the 95 * pointers will ahve to point to the housekeeping region provided 96 * by SEC 97 */ 98 /*Circular Ring of i/p descriptors */ 99 caam_dma_addr_t *input_ring; 100 /* Circular Ring of o/p descriptors */ 101 /* Circula Ring containing info regarding descriptors in i/p 102 * and o/p ring 103 */ 104 /* This ring can be on the stack */ 105 struct jr_info info[JR_SIZE]; 106 struct op_ring *output_ring; 107 /* Offset in CCSR to the SEC engine to which this JR belongs */ 108 uint32_t sec_offset; 109 110 }; 111 112 struct result { 113 int done; 114 uint32_t status; 115 }; 116 117 /* 118 * struct caam_regs - CAAM initialization register interface 119 * 120 * Interface to caam memory map, jobring register, jobring storage. 121 */ 122 struct caam_regs { 123 ccsr_sec_t *sec; /*caam initialization registers*/ 124 struct jr_regs *regs; /*jobring configuration registers*/ 125 u8 jrid; /*id to identify a jobring*/ 126 /*Private sub-storage for a single JobR*/ 127 struct jobring jr[CONFIG_SYS_FSL_MAX_NUM_OF_SEC]; 128 }; 129 130 void caam_jr_strstatus(u32 status); 131 int run_descriptor_jr(uint32_t *desc); 132 133 #endif 134