1// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2/*
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
4 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
5 * Copyright (C) 2020 Marek Vasut <marex@denx.de>
6 */
7
8#include "stm32mp15-pinctrl.dtsi"
9#include "stm32mp15xxac-pinctrl.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/mfd/st,stpmic1.h>
12
13/ {
14	aliases {
15		spi0 = &qspi;
16	};
17
18	memory@c0000000 {
19		device_type = "memory";
20		reg = <0xc0000000 0x40000000>;
21	};
22
23	reserved-memory {
24		#address-cells = <1>;
25		#size-cells = <1>;
26		ranges;
27
28		mcuram2: mcuram2@10000000 {
29			compatible = "shared-dma-pool";
30			reg = <0x10000000 0x40000>;
31			no-map;
32		};
33
34		vdev0vring0: vdev0vring0@10040000 {
35			compatible = "shared-dma-pool";
36			reg = <0x10040000 0x1000>;
37			no-map;
38		};
39
40		vdev0vring1: vdev0vring1@10041000 {
41			compatible = "shared-dma-pool";
42			reg = <0x10041000 0x1000>;
43			no-map;
44		};
45
46		vdev0buffer: vdev0buffer@10042000 {
47			compatible = "shared-dma-pool";
48			reg = <0x10042000 0x4000>;
49			no-map;
50		};
51
52		mcuram: mcuram@30000000 {
53			compatible = "shared-dma-pool";
54			reg = <0x30000000 0x40000>;
55			no-map;
56		};
57
58		retram: retram@38000000 {
59			compatible = "shared-dma-pool";
60			reg = <0x38000000 0x10000>;
61			no-map;
62		};
63
64		optee_memory: optee@fe000000 {
65			reg = <0xfe000000 0x2000000>;
66			no-map;
67		};
68	};
69};
70
71&crc1 {
72	status = "okay";
73};
74
75&dts {
76	status = "okay";
77};
78
79&i2c4 {
80	pinctrl-names = "default";
81	pinctrl-0 = <&i2c4_pins_a>;
82	i2c-scl-rising-time-ns = <185>;
83	i2c-scl-falling-time-ns = <20>;
84	status = "okay";
85	/delete-property/dmas;
86	/delete-property/dma-names;
87
88	pmic: stpmic@33 {
89		compatible = "st,stpmic1";
90		reg = <0x33>;
91		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
92		interrupt-controller;
93		#interrupt-cells = <2>;
94		status = "okay";
95
96		regulators {
97			compatible = "st,stpmic1-regulators";
98
99			ldo1-supply = <&v3v3>;
100			ldo2-supply = <&v3v3>;
101			ldo3-supply = <&vdd_ddr>;
102			ldo5-supply = <&v3v3>;
103			ldo6-supply = <&v3v3>;
104			pwr_sw1-supply = <&bst_out>;
105			pwr_sw2-supply = <&bst_out>;
106
107			vddcore: buck1 {
108				regulator-name = "vddcore";
109				regulator-min-microvolt = <1200000>;
110				regulator-max-microvolt = <1350000>;
111				regulator-always-on;
112				regulator-initial-mode = <0>;
113				regulator-over-current-protection;
114			};
115
116			vdd_ddr: buck2 {
117				regulator-name = "vdd_ddr";
118				regulator-min-microvolt = <1350000>;
119				regulator-max-microvolt = <1350000>;
120				regulator-always-on;
121				regulator-initial-mode = <0>;
122				regulator-over-current-protection;
123			};
124
125			vdd: buck3 {
126				regulator-name = "vdd";
127				regulator-min-microvolt = <3300000>;
128				regulator-max-microvolt = <3300000>;
129				regulator-always-on;
130				regulator-initial-mode = <0>;
131				regulator-over-current-protection;
132			};
133
134			v3v3: buck4 {
135				regulator-name = "v3v3";
136				regulator-min-microvolt = <3300000>;
137				regulator-max-microvolt = <3300000>;
138				regulator-always-on;
139				regulator-over-current-protection;
140				regulator-initial-mode = <0>;
141			};
142
143			vdda: ldo1 {
144				regulator-name = "vdda";
145				regulator-min-microvolt = <2900000>;
146				regulator-max-microvolt = <2900000>;
147				interrupts = <IT_CURLIM_LDO1 0>;
148			};
149
150			v2v8: ldo2 {
151				regulator-name = "v2v8";
152				regulator-min-microvolt = <2800000>;
153				regulator-max-microvolt = <2800000>;
154				interrupts = <IT_CURLIM_LDO2 0>;
155			};
156
157			vtt_ddr: ldo3 {
158				regulator-name = "vtt_ddr";
159				regulator-min-microvolt = <500000>;
160				regulator-max-microvolt = <750000>;
161				regulator-always-on;
162				regulator-over-current-protection;
163			};
164
165			vdd_usb: ldo4 {
166				regulator-name = "vdd_usb";
167				interrupts = <IT_CURLIM_LDO4 0>;
168			};
169
170			vdd_sd: ldo5 {
171				regulator-name = "vdd_sd";
172				regulator-min-microvolt = <2900000>;
173				regulator-max-microvolt = <2900000>;
174				interrupts = <IT_CURLIM_LDO5 0>;
175				regulator-boot-on;
176			};
177
178			v1v8: ldo6 {
179				regulator-name = "v1v8";
180				regulator-min-microvolt = <1800000>;
181				regulator-max-microvolt = <1800000>;
182				interrupts = <IT_CURLIM_LDO6 0>;
183				regulator-enable-ramp-delay = <300000>;
184			};
185
186			vref_ddr: vref_ddr {
187				regulator-name = "vref_ddr";
188				regulator-always-on;
189			};
190
191			bst_out: boost {
192				regulator-name = "bst_out";
193				interrupts = <IT_OCP_BOOST 0>;
194			};
195
196			vbus_otg: pwr_sw1 {
197				regulator-name = "vbus_otg";
198				interrupts = <IT_OCP_OTG 0>;
199				regulator-active-discharge = <1>;
200			};
201
202			vbus_sw: pwr_sw2 {
203				regulator-name = "vbus_sw";
204				interrupts = <IT_OCP_SWOUT 0>;
205				regulator-active-discharge = <1>;
206			};
207		};
208
209		onkey {
210			compatible = "st,stpmic1-onkey";
211			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 1>;
212			interrupt-names = "onkey-falling", "onkey-rising";
213			status = "okay";
214		};
215
216		watchdog {
217			compatible = "st,stpmic1-wdt";
218			status = "disabled";
219		};
220	};
221};
222
223&ipcc {
224	status = "okay";
225};
226
227&iwdg2 {
228	timeout-sec = <32>;
229	status = "okay";
230};
231
232&m4_rproc {
233	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
234			<&vdev0vring1>, <&vdev0buffer>;
235	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
236	mbox-names = "vq0", "vq1", "shutdown", "detach";
237	interrupt-parent = <&exti>;
238	interrupts = <68 1>;
239	status = "okay";
240};
241
242&optee {
243	status = "okay";
244};
245
246&pwr_regulators {
247	vdd-supply = <&vdd>;
248	vdd_3v3_usbfs-supply = <&vdd_usb>;
249};
250
251&qspi {
252	pinctrl-names = "default", "sleep";
253	pinctrl-0 = <&qspi_clk_pins_a
254		     &qspi_bk1_pins_a
255		     &qspi_cs1_pins_a>;
256	pinctrl-1 = <&qspi_clk_sleep_pins_a
257		     &qspi_bk1_sleep_pins_a
258		     &qspi_cs1_sleep_pins_a>;
259	reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
260	#address-cells = <1>;
261	#size-cells = <0>;
262	status = "okay";
263
264	flash0: flash@0 {
265		compatible = "jedec,spi-nor";
266		reg = <0>;
267		spi-rx-bus-width = <4>;
268		spi-max-frequency = <50000000>;
269		#address-cells = <1>;
270		#size-cells = <1>;
271	};
272};
273
274&rng1 {
275	status = "okay";
276};
277
278&rtc {
279	status = "okay";
280};
281