1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2023 XenServer.
4  */
5 #include <xen/kernel.h>
6 
7 #include <xen/lib/x86/cpu-policy.h>
8 
9 #include <asm/debugreg.h>
10 
x86_adj_dr6_rsvd(const struct cpu_policy * p,unsigned int dr6)11 unsigned int x86_adj_dr6_rsvd(const struct cpu_policy *p, unsigned int dr6)
12 {
13     unsigned int ones = X86_DR6_DEFAULT;
14 
15     /*
16      * The i586 and later processors had most but not all reserved bits read
17      * as 1s.  New features allocated in this space have inverted polarity,
18      * and don't force their respective bit to 1.
19      */
20     if ( p->feat.rtm )
21         ones &= ~X86_DR6_RTM;
22     if ( p->feat.bld )
23         ones &= ~X86_DR6_BLD;
24 
25     dr6 |= ones;
26     dr6 &= ~X86_DR6_ZEROS;
27 
28     return dr6;
29 }
30 
x86_adj_dr7_rsvd(const struct cpu_policy * p,unsigned int dr7)31 unsigned int x86_adj_dr7_rsvd(const struct cpu_policy *p, unsigned int dr7)
32 {
33     unsigned int zeros = X86_DR7_ZEROS;
34 
35     /*
36      * Most but not all reserved bits force to zero.  Hardware lacking
37      * optional features force more bits to zero.
38      */
39     if ( !p->feat.rtm )
40         zeros |= X86_DR7_RTM;
41 
42     dr7 &= ~zeros;
43     dr7 |= X86_DR7_DEFAULT;
44 
45     return dr7;
46 }
47