Searched refs:AMDGPU_FENCE_FLAG_INT (Results 1 – 15 of 15) sorted by relevance
63 #define AMDGPU_FENCE_FLAG_INT (1 << 1) macro
182 seq, flags | AMDGPU_FENCE_FLAG_INT); in amdgpu_fence_emit()
527 if (flags & AMDGPU_FENCE_FLAG_INT) { in vpe_ring_emit_fence()
409 if (flags & AMDGPU_FENCE_FLAG_INT) { in sdma_v7_0_ring_emit_fence()
377 if (flags & AMDGPU_FENCE_FLAG_INT) { in sdma_v6_0_ring_emit_fence()
396 if ((flags & AMDGPU_FENCE_FLAG_INT)) { in sdma_v5_2_ring_emit_fence()
577 if (flags & AMDGPU_FENCE_FLAG_INT) { in sdma_v5_0_ring_emit_fence()
2116 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v7_0_ring_emit_fence_gfx()2163 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v7_0_ring_emit_fence_compute()
6151 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v8_0_ring_emit_fence_gfx()6248 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v8_0_ring_emit_fence_compute()6278 if (flags & AMDGPU_FENCE_FLAG_INT) { in gfx_v8_0_ring_emit_fence_kiq()
5529 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_0_ring_emit_fence()5636 if (flags & AMDGPU_FENCE_FLAG_INT) { in gfx_v9_0_ring_emit_fence_kiq()5719 ring->trail_seq, AMDGPU_FENCE_FLAG_EXEC | AMDGPU_FENCE_FLAG_INT); in gfx_v9_0_ring_preempt_ib()
2891 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v9_4_3_ring_emit_fence()2984 if (flags & AMDGPU_FENCE_FLAG_INT) { in gfx_v9_4_3_ring_emit_fence_kiq()
4374 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v12_0_ring_emit_fence()4456 if (flags & AMDGPU_FENCE_FLAG_INT) { in gfx_v12_0_ring_emit_fence_kiq()
1807 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v6_0_ring_emit_fence()
5689 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v11_0_ring_emit_fence()5779 if (flags & AMDGPU_FENCE_FLAG_INT) { in gfx_v11_0_ring_emit_fence_kiq()
8608 bool int_sel = flags & AMDGPU_FENCE_FLAG_INT; in gfx_v10_0_ring_emit_fence()8688 if (flags & AMDGPU_FENCE_FLAG_INT) { in gfx_v10_0_ring_emit_fence_kiq()
Completed in 101 milliseconds