Searched refs:AMDGPU_RING_PRIO_DEFAULT (Results 1 – 25 of 43) sorted by relevance
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_ring_mux.c | 37 { AMDGPU_RING_PRIO_DEFAULT, "gfx_low"},
88 if (mux->ring_entry[i].ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT) { in amdgpu_mux_resubmit_chunks()
218 if (ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT) in amdgpu_ring_mux_set_wptr()
242 if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT || mux->wptr_resubmit < wptr) { in amdgpu_ring_mux_set_wptr()
357 sw_ring_info[idx].hw_pio : AMDGPU_RING_PRIO_DEFAULT; in amdgpu_sw_ring_priority()
369 if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT && in amdgpu_mcbp_scan()
372 if (ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT && in amdgpu_mcbp_scan()
398 if (adev->gfx.mcbp && ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT) { in amdgpu_sw_ring_ib_begin()
413 if (adev->gfx.mcbp && ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT) in amdgpu_sw_ring_ib_end()
424 if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT) in amdgpu_sw_ring_ib_mark_offset()
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| A D | jpeg_v3_0.c | 108 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v3_0_sw_init()
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| A D | amdgpu_ctx.c | 158 hw_prio = AMDGPU_RING_PRIO_DEFAULT; in amdgpu_ctx_get_hw_prio()
164 hw_prio = AMDGPU_RING_PRIO_DEFAULT; in amdgpu_ctx_get_hw_prio()
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| A D | jpeg_v5_0_0.c | 96 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v5_0_0_sw_init()
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| A D | uvd_v3_1.c | 565 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v3_1_sw_init()
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| A D | uvd_v4_2.c | 122 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v4_2_sw_init()
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| A D | jpeg_v4_0.c | 116 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v4_0_sw_init()
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| A D | amdgpu_ring.h | 52 AMDGPU_RING_PRIO_DEFAULT = 1, enumerator
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| A D | jpeg_v1_0.c | 499 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v1_0_sw_init()
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| A D | jpeg_v2_5.c | 138 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v2_5_sw_init()
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| A D | uvd_v5_0.c | 120 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v5_0_sw_init()
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| A D | uvd_v6_0.c | 415 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v6_0_sw_init()
429 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v6_0_sw_init()
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| A D | jpeg_v2_0.c | 94 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v2_0_sw_init()
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| A D | jpeg_v4_0_5.c | 148 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v4_0_5_sw_init()
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| A D | si_dma.c | 501 AMDGPU_RING_PRIO_DEFAULT, NULL); in si_dma_sw_init()
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| A D | mes_v12_0.c | 1267 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v12_0_ring_init()
1292 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v12_0_kiq_ring_init()
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| A D | uvd_v7_0.c | 451 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v7_0_sw_init()
473 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v7_0_sw_init()
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| A D | mes_v11_0.c | 1272 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v11_0_ring_init()
1297 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v11_0_kiq_ring_init()
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| A D | amdgpu_vpe.c | 284 AMDGPU_RING_PRIO_DEFAULT, NULL); in amdgpu_vpe_ring_init()
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| A D | amdgpu_umsch_mm.c | 571 return amdgpu_ring_init(adev, ring, 1024, NULL, 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in amdgpu_umsch_mm_ring_init()
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| A D | sdma_v4_4_2.c | 1406 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v4_4_2_sw_init()
1427 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v4_4_2_sw_init()
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| A D | sdma_v2_4.c | 861 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v2_4_sw_init()
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| A D | cik_sdma.c | 972 AMDGPU_RING_PRIO_DEFAULT, NULL); in cik_sdma_sw_init()
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| A D | jpeg_v4_0_3.c | 140 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v4_0_3_sw_init()
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| A D | vcn_v3_0.c | 234 AMDGPU_RING_PRIO_DEFAULT, in vcn_v3_0_sw_init()
1825 [AMDGPU_RING_PRIO_DEFAULT].sched; in vcn_v3_0_limit_sched()
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