Searched refs:BCS0 (Results 1 – 18 of 18) sorted by relevance
| /linux/drivers/gpu/drm/i915/ |
| A D | i915_pci.c | 265 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
313 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
381 .platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0),
448 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
500 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)
563 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
584 BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
653 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
671 BIT(RCS0) | BIT(BCS0) | BIT(VECS0) |
738 BIT(RCS0) | BIT(BCS0) | \
[all …]
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| A D | i915_drv.h | 639 ENGINE_INSTANCES_MASK(gt, BCS0, I915_MAX_BCS)
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| A D | i915_gpu_error.c | 1315 case BCS0: in engine_record_registers()
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| /linux/drivers/gpu/drm/i915/gvt/ |
| A D | mmio_context.c | 81 {BCS0, RING_GFX_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2229c */
82 {BCS0, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
83 {BCS0, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
84 {BCS0, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
85 {BCS0, RING_EXCC(BLT_RING_BASE), 0xffff, false}, /* 0x22028 */
137 {BCS0, RING_INSTPM(BLT_RING_BASE), 0xffff, false}, /* 0x220c0 */
138 {BCS0, RING_HWSTAM(BLT_RING_BASE), 0x0, false}, /* 0x22098 */
139 {BCS0, RING_EXCC(BLT_RING_BASE), 0xffff, false}, /* 0x22028 */
170 [BCS0] = 0xcc00,
357 [BCS0] = 0x426c,
[all …]
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| A D | execlist.c | 50 [BCS0] = BCS_AS_CONTEXT_SWITCH,
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| A D | cmd_parser.c | 431 #define R_BCS BIT(BCS0)
621 [BCS0] = {
1054 if (s->engine->id == BCS0 && in cmd_handler_lri()
1159 [BCS0] = {
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| A D | scheduler.c | 169 } else if (workload->engine->id == BCS0) in populate_shadow_context()
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| A D | handlers.c | 340 engine_mask |= BIT(BCS0); in gdrst_mmio_write()
2094 id = BCS0; in gvt_reg_tlb_control_handler()
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| /linux/drivers/gpu/drm/i915/gt/ |
| A D | intel_engine_types.h | 113 BCS0, enumerator
122 #define _BCS(n) (BCS0 + (n))
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| A D | intel_engine_user.c | 166 [COPY_ENGINE_CLASS] = { BCS0, 1 }, in legacy_ring_idx()
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| A D | intel_engine_cs.c | 71 [BCS0] = {
403 [BCS0] = GEN11_GRDOM_BLT, in get_reset_domain()
436 [BCS0] = GEN6_GRDOM_BLT, in get_reset_domain()
1466 if (i915_ggtt_require_binder(engine->i915) && engine->id == BCS0) { in engine_init_common()
1705 [BCS0] = MSG_IDLE_BCS, in __cs_pending_mi_force_wakes()
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| A D | intel_gt.c | 1040 struct intel_engine_cs *engine = gt->engine[BCS0]; in __intel_gt_bind_context_set_ready()
1079 struct intel_engine_cs *engine = gt->engine[BCS0]; in intel_gt_is_bind_context_ready()
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| A D | intel_mocs.c | 574 [BCS0] = __GEN9_BCS0_MOCS0, in mocs_offset()
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| A D | gen8_engine_cs.c | 173 case BCS0: in gen12_get_aux_inv_reg()
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| A D | intel_ring_submission.c | 96 case BCS0: in set_hwsp()
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| A D | intel_ggtt.c | 304 ce = gt->engine[BCS0]->bind_context; in gen8_ggtt_bind_get_ce()
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| A D | intel_execlists_submission.c | 3503 [BCS0] = GEN8_BCS_IRQ_SHIFT, in logical_ring_default_irqs()
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| /linux/drivers/gpu/drm/i915/gem/ |
| A D | i915_gem_execbuffer.c | 2474 [I915_EXEC_BLT] = BCS0,
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Completed in 62 milliseconds